Abstract: Examples described herein relate to a system including a first management system having a primary memory including a free memory, a used memory, and a loosely reserved memory, where the loosely reserved memory comprises cache memory having a reclaimable memory; and a processing resource coupled to the primary memory. The processing resource may monitor an amount of the used memory and an amount of an available memory during runtime of the first management system. Further, the processing resource may enable a synchronized reboot of the first management system if the amount of the used memory is greater than a memory exhaustion first threshold or the amount of the available memory is less than a memory exhaustion second threshold, wherein the memory exhaustion first threshold and the memory exhaustion second threshold are determined based on usage of the reclaimable memory and a number of major page faults.

Abstract: A technique for operating a cache is disclosed. The technique includes recording access data for a first set of memory accesses of a first frame; identifying parameters for a second set of memory accesses of a second frame subsequent to the first frame, based on the access data; and applying the parameters to the second set of memory accesses.

Abstract: A memory controller monitors memory command selected for dispatch to the memory and sends commands controlling a read clock state. A memory includes a read clock circuit and a mode register. The read clock circuit has an output for providing a hybrid read clock signal in response to a clock signal and a read clock mode signal. The mode register provides the read clock mode signal in response to a read clock mode, wherein the read clock circuit provides the hybrid read clock signal as a free-running clock signal that toggles continuously when the read clock mode is a first mode, and as a strobe signal that is active only in response to the memory receiving a read command when the read clock mode is a second mode.

Abstract: Multi-cache-based digital output generation is provided. A system receives data objects that include fields from a remote data source. The system sorts the data objects based on a field to generate a sorted data set. The system cleans the sorted data set to generate a clean data set based on a policy. The system receives a request for a type of digital output based on the data objects received from the data source and loads a portion of the clean data set to a first level cache. The system selects a machine learning model configured for the type of digital output, and loads a primary cache with a subset of fields stored in the first level cache selected based on the machine learning model. The system generates, based on the first level cache being complete, digital output corresponding to the type of digital output from data in the primary cache.

Abstract: A stream set classification process may be implemented to classify streams opened by a host device on a data storage device. The data storage device may internally classify the streams into different stream classifications using a set of performance metrics. Stream classifications that cause the data storage device to show the greatest gains when compared with a set of baseline performance metrics for the data storage device and/or when compared with other stream classifications, may be selected by the data storage device and/or the host device for subsequent write operations.

Abstract: A technical solution to the technical problem of how to reduce the undesirable side effects of offloading computations to memory uses read hints to preload results of memory-side processing into a processor-side cache. A cache controller, in response to identifying a read hint in a memory-side processing instruction, causes results of the memory-side processing to be preloaded into a processor-side cache. Implementations include, without limitation, enabling or disabling the preloading based upon cache thrashing levels, preloading results, or portions of results, of memory-side processing to particular destination caches, preloading results based upon priority and/or degree of confidence, and/or during periods of low data bus and/or command bus utilization, last stores considerations, and enforcing an ordering constraint to ensure that preloading occurs after memory-side processing results are complete.

Abstract: A storage unit has one or more processing devices, a solid-state drive and an open blocks cache memory. The open blocks cache memory holds open blocks of data or metadata and holds closed blocks of data or metadata pending writing to the solid-state drive. Closed blocks of data or metadata are written to the solid-state drive and open blocks of data or metadata are written to the open blocks cache memory. Values for open blocks in the open blocks cache memory are tracked. The values are adjusted in a first direction when an open block is written to the open blocks cache memory, and the values are adjusted in a second direction when an open block in the open blocks cache memory is closed and written from the open blocks cache memory to the solid-state drive.

Abstract: Embodiments of file restores in a Data Domain (DD) file system implementing a DD Bandwidth Optimized Open Storage Technology (DDBoost) library that translates application read and write request to DDBoost application program interfaces (APIs). A prefetch queue processor creates an intent to read the file. The application passes the file handle of the file, and the destination handle where the data must be read into. As the queue is processed, the prefetch for the request (handle/offset/length) is passed to the file server. The filesystem processes the request to open the file to load into memory. As the read request for the same file reaches the filesystem the file data is read from memory for writing to the destination handle. An extended DDBoost API expression is defined to pass the current path and destination path to the application.

Abstract: Embodiments of small file restore process in deduplication file system wherein restoration requires issuing a read request within an I/O request to the file system. A prefetch queue processor creates an intent to read the file, rather than opening the file upon receiving the request. During this step, the application passes the file handle of the file, and the destination handle where the data must be read into. As the queue is processed, the prefetch for the request (handle/offset/length) is passed to the file server. The filesystem processes the request to equivalently ‘open’ the file, and bring the data into memory. As the read request for the same file reaches the filesystem the file data is read from memory for writing to the destination handle.

Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality of memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.

Abstract: The present disclosure provides a method and apparatus for ingesting data, a device, a storage medium and a program product, and particularly to the field of computer technology, the field of intelligent traffic, and the like. A specific implementation comprises: deploying a first data ingestion system at a first data source, the first data ingestion system comprising a first read plugin, a first transmission plugin and a first write plugin; reading data from the first data source through the first read plugin; writing the data into a first transmission buffer queue through the first transmission plugin; and acquiring the data from the first transmission buffer queue through the first write plugin and writing the data into a first storage component. The data ingestion system in the present disclosure is divided into a read part, a transmission part and a write part. Each part works by means of a plugin.

Abstract: A method and apparatus for performing access control of a memory device with aid of multi-stage garbage collection (GC) management are provided. The method includes: during a first GC stage, sending a first simple read command to the NV memory in order to try reading first valid data from a first source block, sending the first valid data into an internal buffer of the NV memory, for being programed into a first destination block, sending a second simple read command to the NV memory in order to try reading second valid data from the first source block, and in response to reading the second valid data from the first source block being unsuccessful, preventing retrying reading the second valid data from the first source block; completing at least one host-triggered operation; and during a second GC stage, retrying reading the second valid data from the first source block.

Abstract: In an example, there is disclosed a host-fabric interface (HFI), including: an interconnect interface to communicatively couple the HFI to an interconnect; a network interface to communicatively couple the HFI to a network; network interface logic to provide communication between the interconnect and the network; a coprocessor configured to provide an offloaded function for the network; a memory; and a caching agent configured to: designate a region of the memory as a shared memory between the HFI and a core communicatively coupled to the HFI via the interconnect; receive a memory operation directed to the shared memory; and issue a memory instruction to the memory according to the memory operation.

Abstract: A dispatch element interfaces with a host processor and dispatches threads to one or more tiles of a hybrid threading fabric. Data structures in memory to be used by a tile may be identified by a starting address and a size, included as parameters provided by the host. The dispatch element sends a command to a memory interface to transfer the identified data to the tile that will use the data. Thus, when the tile begins processing the thread, the data is already available in local memory of the tile and does not need to be accessed from the memory controller. Data may be transferred by the dispatch element while the tile is performing operations for another thread, increasing the percentage of operations performed by the tile that are performing useful work and reducing the percentage that are merely retrieving data.

Abstract: The present technology relates to an electronic device. According to the present technology, a storage device includes a memory device configured to include memory cells for storing data and circuitry structured to generate voltage information indicating whether a voltage used for performing an operation on the memory cells is included in a preset voltage range; and a memory controller in communication with the memory device and configured to transmit, to the memory device, a status command requesting for a status response indicating a status of the operation, and control the memory device to change a voltage used for performing the operation based on the status response provided from the memory device and including the voltage information.

Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality of memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.

Abstract: An incremental backup is made of a source volume on a production host to on premise secondary storage. The incremental backup includes a bitmap specifying locations of blocks that have changed since a last backup of the source volume, and data of the changed blocks. First checksums are calculated from data of the changed blocks. The incremental backup, including the changed blocks and the bitmap, are moved to cloud storage. The changed blocks are merged, at the cloud storage, with the last backup of the source volume to generate a synthetic full backup of the source volume. The bitmap is consulted to identify locations of the changed blocks. Second checksums are calculated from data written to the locations on the synthetic full backup. The first and second checksums are compared. If the first and second checksums do not match, an indication is generated that the synthetic full backup is corrupt.

Abstract: This document describes apparatuses and techniques for cache memory with randomized eviction. In various aspects, a cache memory randomly selects a cache line for eviction and/or replacement. The cache memory may also support multi-occupancy whereby the cache memory enters data reused from another cache line to replace the data of the randomly evicted cache line. By so doing, the cache memory may operate in a nondeterministic fashion, which may increase a probability of data remaining in the cache memory for subsequent requests.

Abstract: Various implementations described herein relate to systems and methods for managing selective erasure in a Solid-State Drive (SSD) including receiving a selective erase command corresponding to erasing valid and invalid data mapped to a logical address and in response to receiving the selective erase command, erasing blocks in which one or more pages mapped to the logical address are located based on a mapping table that maps the logical address to the one or more pages. Both valid data and invalid data may be physically stored in one or more pages.

Abstract: A computer system monitors usage of an application on a computing device to identify one or more pre-fetch situations corresponding to a user of the computing device. The computer system determines whether the computing device is in a situation that corresponds to at least one of the identified one or more pre-fetch situations. In response to determining that the computing device is in the situation that corresponds to the at least one of the identified one or more pre-fetch situations, the computer system causes data corresponding to the application to be pre-fetched.