Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.

Abstract: This disclosure provides a hardware structure of a trusted computer, which comprises: a trusted socket and a trusted module compatible with TPM and TPCM specifications; a trusted management module connected to the trusted socket for measuring the credibility; a firmware memory of BIOS connected to the trusted socket. A firmware memory of BMC connected to the trusted socket through a switch module. When the trusted management module is in the standby status, the trusted management module measures the credibility of the firmware memory of the BIOS and the firmware memory of the BMC according to the output signal of the trusted module inserted to the trusted socket, and the computer is allowed being turning on as the measurement is pass. This disclosure further relates to a trusted booting method for a computer.

Abstract: Embodiments of the disclosure provide a method and apparatus for controlling a startup bootstrap program of an intelligent TV set, and relate to the field of an embedded system so as to shorten a period of time for startup boot while initializing a screen normally. In the disclosure, after a system is powered on, a first task of initializing a screen in a startup bootstrap program is executed, and the length of preset time required for executing the first task is obtained, wherein the startup bootstrap program is a bootstrap program for initializing pieces of software/hardware of the system; executing a second initialization task unrelated to initializing the screen in the startup bootstrap program is executed while the first task is being executed, thus addressing the problem in the related art.

Abstract: The application provides a Dynamic Voltage Frequency Scaling device. The Dynamic Voltage Frequency Scaling device in a convolutional operation device acquires working state information of the convolutional operation device and its internal units/modules in real time and scales working voltage or working frequency of the convolutional operation device and its internal units/modules according to the working state information of the convolutional operation device and its internal units/modules, so as to reduce the overall running power consumption of the convolutional operation device during the convolutional operation.

Abstract: Examples herein disclose determining whether a computing device should implement a zero watt state according to an engagement of a button. The examples disconnect a power source to the computing device based upon the determination the computing device should implement the zero watt state.

Abstract: In one embodiment an apparatus includes a multiplicity of processor components; one or more device components communicatively coupled to one or more processor components of the multiplicity of processor components; and a controller comprising logic at least a portion of which is in hardware, the logic to schedule one or more forced idle periods interspersed with one or more active periods, a forced idle period spanning a duration during which the multiplicity of processor components and the one or more device components are simultaneously placed in respective idle states that define a forced idle power state during isolated sub-periods of the forced idle period. Other embodiments are disclosed and claimed.

Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.

Abstract: A power management system having: a core rail, configured to provide a core voltage to a core; a GT rail, configured to provide a GT voltage to a graphic terminal; and a VR thermal indicative pin, coupled to a core thermal indicative pin of the core; wherein the VR thermal indicative pin is pulled down for a preset time duration once the core rail is commanded to exit a PS4 state, or for a time duration beginning when the core rail is commanded to exit the PS4 state ending when the GT rail is commanded to exit the PS4 state.

Abstract: An Ethernet transceiver is disclosed. The Ethernet transceiver includes transceiver circuitry including transmit circuitry, receive circuitry, and adaptive filters. The transceiver circuitry is configurable to operate in one of two low-power modes. A first low-power mode includes update operations for the adaptive filters. A second low-power mode includes turning off at least one of the transmit circuitry and the receive circuitry, and omitting update operations for the adaptive filters.

Abstract: Methods, systems and computer program products for remotely providing local server boot capabilities are provided. Aspects include receiving a command to boot a specified server of a plurality of servers by a rack level server boot device from remote user device. Aspects also include identifying a target emulated hard drive of a plurality of emulated hard drives of the rack level server boot device. The target emulated hard drive may be associated with a port of a plurality of ports of the rack level server that is connected to the specified server. Aspects also include selecting a specified OS boot image of one or more OS boot images stored by a memory of the rack level server boot device. Aspects further include causing the specified server to boot from the target emulated hard drive using the specified OS boot image.

Abstract: The application provides a Dynamic Voltage Frequency Scaling device including an information acquisition unit configured to acquire working state information or application scenario information of a chip connected with the Dynamic Voltage Frequency Scaling device in real time and a voltage frequency scaling unit configured to send voltage frequency scaling information to the chip according to the working state information or the application scenario information of the chip. The embodiment of the application dynamically scales the voltage frequency on chip-level and reduces the power consumption of chips.

Abstract: An apparatus is provided which includes: an input/output (I/O) port to be coupled to a device external to the apparatus; a battery having an output node; a voltage regulator to selectively supply power from the I/O port to the battery, to charge the battery; and a switch coupled between the I/O port and the output node, wherein the switch is to selectively allow flow of current from the device to the output node by bypassing the voltage regulator.

Abstract: A communication system according to an embodiment of the disclosure includes a transmission device and a reception device. The transmission device outputs a clock signal with a clock frequency corresponding to a transmission mode, and outputs a data signal corresponding to the transmission mode. The reception device receives the clock signal and the data signal, and determines the transmission mode on a basis of magnitude of the clock frequency of the received clock signal.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a service processor. The service processor generates a user interface on the service processor. The user interface providing access to platform specific configurations of the service processor. The service processor receives, through the user interface, an input for modifying a first configuration data item of the platform specific configurations. The service processor accordingly modifies the first configuration data item in accordance with the input.

Abstract: In one or more embodiments, a first operating system may receive, via a first non-volatile memory medium of an information handling system, an executable file from information handling system firmware; the executable file may provide configuration information to the first operating system; the first operating system may configure the information handling system based at least on the configuration information; a second operating system may be received; the second operating system may be installed to a second non-volatile memory medium; the executable file may provide the configuration information to the second operating system; and the second operating system may configure the information handling system based at least on the configuration information.

Abstract: In some embodiments, power may be temporarily removed from a first portion of a computer system (such as a display), and that power redirected to a second portion (such as a processor or System on a Chip), so that extra performance may be obtained from the second portion without exceeding the power budget for the system. If the first portion is a display, the time period of removed power may be short enough that the absence of luminance during that time period will not be noticeable to the human vision system. In a similar embodiment, power may be delivered to the first portion using pulse width modulation, using the time between pulses to redirect power to the other portion.

Abstract: A reboot control system includes an information processing device and a reboot management device connected over a network. The reboot management device includes a first storage unit that stores device management information including information related to each information processing device, a reboot time setting unit that sets a reboot time, and a reboot time notification unit that transmits the set reboot time to each information processing device. The information processing device includes a reboot information acquisition unit that acquires the transmitted reboot time, and a reboot execution unit that executes a reboot at the acquired reboot time. The reboot time setting unit takes Into account a positional relationship of multiple information processing devices existing in a predetermined neighboring relationship to set the reboot times of the multiple information processing devices existing in the predetermined neighboring relationship to mutually different times.

Abstract: The technology described herein is related to a two-phase deployment-initiated wakeup mechanism for a body-mountable electronic device. During a first phase of the two-phase wakeup mechanism, a motion sensor detects an acceleration event indicative of deployment of the device onto the body of the user. During a second phase of the two-phase mechanism, control circuitry can be adapted to be enabled by the acceleration event. Once enabled, the control circuitry can verify that the device has been launched onto the body of a user via a deployment applicator in which the device is retained until deployment. Once verified, the control circuitry can wake up the body-mountable electronic device by transitioning the device from a sleep state to a functional (or operational) state.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and a computer system are provided. The computer system includes a BMC. The BMC receives, through a management platform on the BMC, a first part of initialization data from an initialization component of a host of the BMC. The BMC also receives an indication of a location at an initialization storage device of the host. The BMC then obtains access to the initialization storage device. The BMC reads a second part of the initialization data from the location of the initialization storage device.

Abstract: An apparatus is provided which comprises: a first circuitry to estimate variation of an internal impedance of a battery; a second circuitry to estimate a high power that the battery can supply for a first time-period, based on the estimated variation of the impedance of the battery; and a third circuitry to facilitate operation of one or more components of the apparatus in accordance with the estimated high power for the first time-period.