Abstract: A method for manufacturing a mirror device, the method includes a first step of preparing a wafer having a support layer and a device layer; a second step of forming a slit in the wafer such that the movable portion becomes movable with respect to the base portion by removing a part of each of the support layer and the device layer from the wafer by etching and forming a plurality of parts each corresponding to the structure in the wafer, after the first step; a third step of performing wet cleaning for cleaning the wafer using a cleaning liquid after the second step; and a fourth step of cutting out each of the plurality of parts from the wafer after the third step. In the second step, a circulation hole penetrating the wafer is formed at a part other than the slit in the wafer by the etching.

Abstract: There is provided a technique that includes: etching a first film exposed on a surface of a substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: (a) forming a first modified layer in at least a portion of a surface of the first film by supplying a first gas to the substrate; and (b) etching at least a portion of the first film with an etching species, the etching species being generated by supplying a second gas having a molecular structure different from that of the first gas to the substrate to perform at least one selected from the group of causing the second gas to react with the first modified layer and activating the first modified layer with the second gas.

Abstract: Provided is an etching apparatus or an etching method which improves a processing yield in etching a film formed of SiO2. As means therefor, a semiconductor manufacturing apparatus, which includes an introduction port through which a processing gas containing respective vapors of hydrogen fluoride and an alcohol is introduced into a processing chamber inside a processing vessel, a sample table which is arranged in the processing chamber and on which a wafer to be processed is placed on an upper surface thereof, and an electrode which is arranged inside the sample table, and, when etching a first film formed on the upper surface of the wafer, configured to apply DC power that forms an electric field on a first layer formed on the upper surface of the wafer by the processing gas, is used.

Abstract: A semiconductor memory structure includes bottom electrodes formed over a substrate. The structure also includes first magnetic tunneling junction (MTJ) elements formed over the bottom electrodes in a first region and a second region of the substrate. The structure also includes second MTJ elements formed over the first MTJ elements in the first region and the second region. The structure also includes top electrodes formed over the second MTJ elements. The first MTJ elements in the first region are narrower than the second MTJ elements in the first region, and the second MTJ elements in the second region are narrower than the first MTJ elements in the second region.

Abstract: In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.

Abstract: The presently claimed invention relates to a chemical-mechanical polishing (CMP) composition and chemical-mechanical polishing (CMP) methods. The presently claimed invention particularly relates to a composition and process for chemical-mechanical polishing of substrates containing copper and ruthenium, specifically, semiconductor substrates containing copper and ruthenium.

Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.

Abstract: A substrate processing method is for processing a substrate that includes a first region and a second region with compositions different from each other. The substrate processing method includes (a) preferentially forming, by a substrate processing apparatus, a first deposit on the first region; (b) forming, after (a), a second deposit on the second region, the second deposit containing fluorine and the second deposit being different from the first deposit; and (c) removing, after (b), the second deposit and at least a part of the second region. The steps (a)-(c) are repeated, in order, in a case that a stop condition is not satisfied.

Abstract: Exemplary semiconductor processing methods may include depositing a boron-containing material on the substrate. The boron-containing material may extend along sidewalls of the one or more features in the substrate. The methods may include forming a plasma of an oxygen-containing precursor and contacting the substrate with plasma effluents of the oxygen-containing precursor. The contacting may etch a portion of the one or more features in the substrate. The contacting may oxidize the boron-containing material.

Abstract: A method includes performing a dry etch process to remove a portion of a first layer disposed on a second layer of a stack of alternating layers. The first layer includes a first material and the second layer includes a second material different from the first material, and the dry etch process forms a passivation layer including a byproduct on surfaces of the second material. A amount of first material of the portion of the first layer remains after performing the dry etch process, The method further includes introducing a halide gas to enhance the passivation layer on the surfaces of the second material.

Abstract: Exemplary methods of etching a silicon-containing material may include flowing a first fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. The methods may include flowing a sulfur-containing precursor into the remote plasma region of the semiconductor processing chamber. The methods may include forming a plasma within the remote plasma region to generate plasma effluents of the first fluorine-containing precursor and the sulfur-containing precursor. The methods may include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include isotropically etching the layers of silicon nitride while substantially maintaining the silicon oxide.

Abstract: A method for chemical mechanical polishing of a SiC wafer based on a magnetorheological elastic metal contact corrosion polishing pad, including following steps of: attaching a magnetorheological elastic metal contact corrosion polishing pad to a polishing disk adding an electrolyte solution onto the magnetorheological elastic metal contact corrosion polishing pad; wherein the electrolyte solution is non-corrosive, the electrolyte solution is added between the SiC wafer and the magnetorheological elastic metal contact corrosion polishing pad; applying a polishing magnetic field to the magnetorheological elastic metal contact corrosion polishing pad to control the contact state of the abrasive and metal powders on the SiC wafer; to achieve a control over a chemical reaction intensity of the metal powders on a SiC wafer surface in the electrolyte solution, and to achieve a mechanical removal of materials from the SiC wafer surface via the abrasive.

Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.

Abstract: Embodiments of the present disclosure generally relate to a method for etching a film stack with high selectivity and low etch recipe transition periods. In one embodiment, a method for etching a film stack having stacked pairs of oxide and nitride layers is described. The method includes transferring a substrate having a film stack formed thereon into a processing chamber, providing a first bias voltage to the substrate, etching an oxide layer of the film stack while providing the first bias voltage to the substrate, providing a second bias voltage to the substrate, the second bias voltage greater than the first bias voltage, and etching a nitride layer of the film stack while providing the second bias voltage to the substrate.

Abstract: A spectroscopic analysis method having improved accuracy and correlation, a method for fabricating a semiconductor device using the same, and a substrate process system using the same are provided. The spectroscopic analysis method includes receiving plasma light emitted from plasma to generate an emission spectrum, detecting n (here, n is a natural number of 2 or more) peak wavelengths from the emission spectrum, generating a plurality of correlation factor time series from correlation factors between the peak wavelengths, filtering the plurality of correlation factor time series, and analyzing the plasma, using the filtered correlation factor time series.

Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.

Abstract: A method comprises: introducing a vapor of an oxygen and iodine-containing etching compound into a chamber that contains a substrate having a silicon-containing film deposited thereon and a patterned mask layer deposited on the silicon-containing layer, wherein the oxygen and iodine-containing etching compound has the formula CnHxFyIzOe, wherein 0?n?10, 0?x?21, 0?y?21, 1?z?4 and 1?e?2; activating a plasma to produce an activated oxygen and iodine-containing etching compound; and allowing an etching reaction to proceed between the activated oxygen and iodine-containing etching compound and the silicon-containing film to selectively etch the silicon-containing film from the patterned mask layer, thereby forming a patterned structure.

Abstract: In an embodiment, a method includes: forming a photoresist over a target layer; performing a plasma-enhanced deposition process, the plasma-enhanced deposition process etching sidewalls of the photoresist while depositing a spacer layer on the sidewalls of the photoresist; patterning the spacer layer to form spacers on the sidewalls of the photoresist; and etching the target layer using the spacers and the photoresist as a combined etching mask.

Abstract: A method for atomic layer etching a metal containing layer is provided. At least a region of a surface of the metal containing layer is modified to form a modified metal containing region by exposing a surface of the metal containing layer to a modification gas, wherein adjacent to the modified metal containing region remains an unmodified metal containing region. The modified metal containing region is selectively removed with respect to the unmodified metal containing region by exposing the surface of the metal containing layer to an inert bombardment plasma generated from an inert gas.

Abstract: The problem to addressed by the present invention is that of providing a novel technique that can remove a strained layer introduced into a silicon carbide substrate by laser processing. The present silicon carbide substrate manufacturing method involves a processing step for performing laser processing to remove part of a silicon carbide substrate by irradiating the silicon carbide substrate with a laser, and a strained layer removal step for removing a strained layer that was introduced in the silicon carbide substrate by the aforementioned processing step involving heat treatment of the silicon carbide substrate. In this way, the present invention, which is a method of removing a strained layer introduced into a silicon carbide substrate by laser processing, involves a strained layer removal step for heat treating the silicon carbide substrate.