Patents Examined by Stephanie P Duclair
  • Patent number: 10319599
    Abstract: A method of planarizing a roughened surface of a SiC substrate includes: forming a sacrificial material on the roughened surface of the SiC substrate, the sacrificial material having a density between 35% and 120% of the density of the SiC substrate; implanting ions through the sacrificial material and into the roughened surface of the SiC substrate to form an amorphous region in the SiC substrate; and removing the sacrificial material and the amorphous region of the SiC substrate by wet etching.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: June 11, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Helmut Oefner, Roland Rupp
  • Patent number: 10312106
    Abstract: A method of manufacturing a semiconductor device includes exposing a material to a semi-aqueous etching solution. The semi-aqueous etching solution comprises a solvent which chelates with the material and acts as a catalyst between the etching driving force and the material. As such, the etching driving force may be used to remove the material.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: June 4, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Wen Hsu, Jian-Jou Lian, Neng-Jye Yang, Chia-Wei Wu, Kuan-Lin Chen, Kuo Bin Huang, Li-Min Chen
  • Patent number: 10297461
    Abstract: The present invention provides a CMP polishing agent containing polishing particles, a protective agent, and water, wherein the protective agent is a silsesquioxane polymer having a polar group. This provides a CMP polishing agent which can reduce polishing scratches produced due to polishing in a CMP process and has high polishing selectivity.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: May 21, 2019
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventor: Mitsuhito Takahashi
  • Patent number: 10290510
    Abstract: A plasma etching method is performed by forming a desired pattern of a mask into a film including a zirconium oxide film by plasma etching with plasma generated from a first gas. The first gas consists of at least one chloride-containing gas of the group of boron trichloride, tetrachloromethane, chloride and silicon tetrachloride, at least one hydrogen-containing gas of the group of hydrogen bromide, hydrogen and methane, and a noble gas. An underlying film of a silicon oxide film or an amorphous carbon film is provided underneath the zirconium oxide film, and an etching selectivity of the zirconium oxide film to the underlying film is greater than or equal to one.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: May 14, 2019
    Assignee: Tokyo Electron Limited
    Inventor: Shunichi Mikami
  • Patent number: 10290506
    Abstract: A method of patterning a gate stack on a substrate is described. The method includes preparing a gate stack on a substrate, wherein the gate stack includes a high-k layer and a gate layer formed on the high-k layer. The method further includes transferring a pattern formed in the gate layer to the high-k layer using a pulsed bias plasma etching process, and selecting a process condition for the pulsed bias plasma etching process to achieve a silicon recess formed in the substrate having a depth less than 2 nanometer (nm).
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: May 14, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Alok Ranjan, Akiteru Ko
  • Patent number: 10269574
    Abstract: Surface treatment processes for treating a workpiece with organic radicals are provided. In one example implementation, a method for processing a workpiece having a semiconductor material and a carbon containing layer (e.g., photoresist) can include a surface treatment process on the workpiece. The surface treatment process can include generating one or more species in a first chamber (e.g., a plasma chamber). The surface treatment process can include mixing one or more hydrocarbon radicals with the species to create a mixture. The surface treatment process can include exposing the carbon containing layer to the mixture in a second chamber (e.g., a processing chamber).
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: April 23, 2019
    Assignee: MATTSON TECHNOLOGY, INC.
    Inventors: Michael X. Yang, Hua Chung, Xinliang Lu
  • Patent number: 10265699
    Abstract: A fluid sampler includes: a sample cell that includes: a substrate comprising: a first port; a second port in fluid communication with the first port; a viewing reservoir in fluid communication with the first port and the second port and that receives the fluid from the first port and communicates the fluid to the second port, the viewing reservoir including: a first view membrane; a second view membrane; and a pillar interposed between the first view membrane and second view membrane, the pillar separating the first view membrane from the second view membrane at a substantially constant separation distance such that a volume of the viewing reservoir is substantially constant and invariable with respect to a temperature and invariable with respect to a pressure to which the sample cell is subjected.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: April 23, 2019
    Assignee: THE UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF COMMERCE
    Inventors: J. Alexander Liddle, Samuel M. Stavis, Glenn E. Holland
  • Patent number: 10260152
    Abstract: A method, and corresponding apparatus, of fabricating a structure by chemical wet etching starting from a material rod of millimetric or sub-millemetric size, the method comprising: dipping an end portion (170) of the material rod (128,129) into a vessel (105) containing an etchant liquid (110) and a protective overlayer (175) floating on top of the etchant liquid, imparting a relative rotational movement of the etchant liquid with respect to the end portion (170) of the material rod immersed therein, wherein said imparting a relative rotational movement comprises imparting to the etchant liquid a rotational movement component with respect to a static reference system.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: April 16, 2019
    Assignees: CONSIGLIO NAZIONALE DELLE RICHERCHE, CENTROFERMI MUSEO STORICO DELLA FISICA E CENTRO STUDI E RICERCHE
    Inventors: Andrea Barucci, Franco Cosi, Stefano Pelli, Giancarlo Righini, Silvia Soria, Gualtiero Nunzi Conti, Ambra Giannetti
  • Patent number: 10262910
    Abstract: Methods and systems for using a time-series of spectra to identify endpoint of an etch process. One method includes accessing a virtual carpet that is formed from a time-series of spectra for the etch process collected during a training operation. And, running a fabrication etch process on a fabrication wafer, such that while the fabrication etch process is performed portions of a carpet defined from a time-series of spectral is generated for the fabrication etch process. Then, comparing the portions of the carpet of the fabrication etch process to the virtual carpet. End pointing is processed for the fabrication etch process when said comparing indicates that a desired metric has been reached for the fabrication wafer. In one example, said portions of the carpet include a current frame of captured spectra and at least one previous frame of captured spectra.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: April 16, 2019
    Assignee: Lam Research Corporation
    Inventors: Ye Feng, Prashanth Kumar, Andrew D. Bailey, III
  • Patent number: 10256076
    Abstract: Methods of etching include cycles of low temperature etching of a material layer disposed on a substrate, with at least one of the cycles being followed by activation of unreacted etchant deposits during an inert gas plasma treatment. In some embodiments, a method includes: positioning a substrate in a processing chamber; generating, in a first etching cycle, a plasma from a gas mixture within the processing chamber to form a processing gas including an etchant; exposing, to the etchant, a portion of a material layer disposed on a substrate maintained at a first temperature; generating an inert gas plasma within the processing chamber; generating, in a second etching cycle, a plasma from a gas mixture within the processing chamber to form a processing gas including an etchant; and heating the substrate to a second temperature to sublimate a byproduct of reaction between the etchant and the material layer.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: April 9, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Shi Wei Toh, Avgerinos V. Gelatos, Vikash Banthia
  • Patent number: 10256108
    Abstract: A method for performing atomic layer etching (ALE) on a substrate, including the following method operations: performing a surface modification operation on a surface of the substrate, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer; performing a removal operation on the substrate surface, the removal operation configured to remove the modified layer from the substrate surface, wherein removing the modified layer occurs via a ligand exchange reaction that is configured to volatilize the modified layer; performing, following the removal operation, a plasma treatment on the substrate surface, the plasma treatment configured to remove residues generated by the removal operation from the substrate surface, wherein the residues are volatilized by the plasma treatment; repeating the foregoing operations until a predefined thickness has been etched from the substrate surface.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: April 9, 2019
    Assignee: Lam Research Corporation
    Inventors: Andreas Fischer, Thorsten Lill, Richard Janek, John Boniface
  • Patent number: 10256075
    Abstract: Techniques are disclosed for methods and apparatuses for delivering process gas for processing a substrate. In one embodiment, the method begins by injecting process gas into a processing chamber proximate an edge of a substrate disposed in the processing chamber from a first location. The method then continues by way of injecting the process gas into the processing chamber proximate the edge of the substrate disposed in the processing chamber from a second location while no gas is injected from the first location. Finally, the method finishes by way of processing the substrate in the presence of the processing gas injected from the first and second location.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: April 9, 2019
    Assignee: Applied Materials, Inc.
    Inventor: James Rogers
  • Patent number: 10247856
    Abstract: A method for producing an antireflection layer on a silicone surface is described. The method includes application of an organic layer, production of a nanostructure in the organic layer by a plasma etching process, and application of at least one cover layer onto the nanostructure. An optical element can be produced by the method.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: April 2, 2019
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FĂ–RDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Ulrike Schulz, Friedrich Rickelt, Peter Munzert, Norbert Kaiser
  • Patent number: 10242845
    Abstract: A substrate is positioned on a substrate support structure within a plasma processing volume of an inductively coupled plasma processing chamber. A first radiofrequency signal is supplied from a first radiofrequency signal generator to a coil disposed outside of the plasma processing volume to generate a plasma in exposure to the substrate. A second radiofrequency signal is supplied from a second radiofrequency signal generator to an electrode within the substrate support structure. The first and second radiofrequency signal generators are controlled independent of each other. The second radiofrequency signal has a frequency greater than or equal to about 27 megaHertz. The second radiofrequency signal generates supplemental plasma density at a level of the substrate within the plasma processing volume while generating a bias voltage of less than about 200 volts at the level of the substrate.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: March 26, 2019
    Assignee: Lam Research Corporation
    Inventors: Zhongkui Tan, Yiting Zhang, Qian Fu, Qing Xu, Ying Wu, Saravanapriyan Sriraman, Alex Paterson
  • Patent number: 10236186
    Abstract: The disclosure relates to methods for a multi-step plasma process to remove metal hard mask layer from an underlying hard mask layer that may be used to implement a sub-lithographic integration scheme. The sub-lithographic integration scheme may include iteratively patterning several features into the metal hard mask layer that may be transferred to the hard mask layer. However, the iterative process may leave remnants of previous films on top of the metal hard mask that may act as mini-masks that may interfere with the pattern transfer to the hard mask layer. One approach to remove the mini-masks may be to use a two-step plasma process that removes the mini-mask using a first gas mixture ratio of a carbon-containing gas and a chlorine-containing gas. The remaining metal hard mask layer may be removed using a second gas mixture ratio of the carbon-containing gas and the chlorine-containing gas.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: March 19, 2019
    Assignee: Tokyo Electron Limited
    Inventor: Nihar Mohanty
  • Patent number: 10211051
    Abstract: Methods of reversing the tone of a pattern having non-uniformly sized features. The methods include depositing a highly conformal hard mask layer over the patterned layer with a non-planar protective coating and etch schemes for minimizing critical dimension variations.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: February 19, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Niyaz Khusnatdinov, Dwayne L. LaBrake
  • Patent number: 10191215
    Abstract: A waveguide fabrication method including the steps of providing a substrate including at least one waveguide recess structure and a stress release recess structure for receiving a waveguide material, and depositing the waveguide material onto the substrate and into both the waveguide recess structure and the stress release recess structure.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: January 29, 2019
    Assignee: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
    Inventors: Tobias Kippenberg, Martin Hubert Peter Pfeiffer, Arne Kordts
  • Patent number: 10183375
    Abstract: A method for fabrication of diffractive optics by batch processing is disclosed, having applicability to high resolution ultra-high aspect ratio Fresnel Zone Plates for focusing of X-rays or gamma-rays having energies up to hundreds of keV. An array of precursor forms is etched into a planar substrate. Sidewalls of the forms are smoothed to a required surface roughness. A sequence of alternating layers of different complex refractive index, for binary or higher order diffractive optics, are deposited on the precursor forms by atomic layer deposition (ALD), to provide diffractive line patterns. Thinnest layers may have nanometer thicknesses. After front surface planarization and thinning of the substrate to expose first and second surfaces of the diffractive line patterns of the diffractive optic, the height h in the propagation direction provides a designed absorption difference and/or phase shift difference between adjacent diffractive lines.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: January 22, 2019
    Assignee: Alcorix Co.
    Inventor: Nicolaie A. Moldovan
  • Patent number: 10176980
    Abstract: Embodiments described herein generally provide a method for filling features formed on a substrate. In one embodiment, a method for selectively forming a silicon oxide layer on a substrate is provided. The method includes selectively depositing a silicon oxide layer within a patterned feature formed on a surface of a substrate, wherein the patterned feature comprises one or more sidewalls and a deposition surface at a bottom of the patterned feature, the one or more sidewalls comprise a silicon oxide, a silicon nitride, or a combination thereof, the deposition surface essentially consists of silicon, and the selectively deposited silicon oxide layer is formed on the deposition surface by flowing tetraethyl orthosilicate (TEOS) and ozone over the patterned feature.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: January 8, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Pramit Manna, Abhijit Basu Mallick
  • Patent number: 10163625
    Abstract: There is provided a method for manufacturing a semiconductor device, including: providing a substrate with an oxide film formed on a surface thereof; pre-processing a surface of the oxide film; and forming a nitride film containing carbon on the surface of the oxide film which has been pre-processed, by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas to the substrate; supplying a carbon-containing gas to the substrate; and supplying a nitrogen-containing gas to the substrate, or by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas to the substrate; and supplying a gas containing carbon and nitrogen to the substrate, or by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas containing carbon to the substrate; and supplying a nitrogen-containing gas to the substrate.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: December 25, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoshinobu Nakamura, Kiyohiko Maeda, Yoshiro Hirose, Ryota Horiike, Yoshitomo Hashimoto