Abstract: Described are finishing mediums for removing support material and/or for surface finishing of objects made via additive manufacturing techniques. The finishing medium is an aqueous solution containing 1-20% by weight a polyol, 1-20% by weight an anti-corrosion agent, 0.001-10% by weight a hydrotrope. The finishing medium may optionally suspend media particles, thereby forming a finishing suspension. Also described are methods of using the finishing media and finishing suspensions described herein.

Abstract: Methods of processing a feature on a semiconductor workpiece are disclosed. The method is performed after features have been created on the workpiece. An etching species may be directed toward the workpiece at a non-zero tilt angle. In certain embodiments, the tilt angle may be 30° or more. Further, the etching species may also be directed with a non-zero twist angle. In certain embodiments, the etching species may sputter material from the features, while in other embodiments, the etching species may be a chemically reactive species. By adjusting the tilt and twist angles, as well as the flow rate of the etching species and the exposure time, the LER and LWR of a feature may be reduced with minimal impact of the CD of the feature.

Abstract: The present disclosure relates to a fabricating procedure of a radio frequency device, in which a precursor wafer including active layers, SiGe layers, and a silicon handle substrate is firstly provided. Each active layer is formed from doped epitaxial silicon and underneath a corresponding SiGe layer. The silicon handle substrate is over each SiGe layer. Next, the silicon handle substrate is removed completely, and the SiGe layer is removed completely. An etch passivation film is then formed over each active layer. Herein, removing each SiGe layer and forming the etch passivation film over each active layer utilize a same reactive chemistry combination, which reacts differently to the SiGe layer and the active layer. The reactive chemistry combination is capable of producing a variable performance, which is an etching performance of the SiGe layer or a forming performance of the etch passivation film over the active layer.

Abstract: An article, apparatus, and method for detecting an etch material selectivity is provided. A device including a first layer and a second layer is placed in a processing chamber. The first layer includes a first sense material deposited on a first portion of the device and a second sense material deposited on a second portion of the device. The second layer deposited on the first layer includes an etch material. During an etch process based on an initial set of etch parameter settings, a first amount of time to etch the second layer at the first portion of the device and a second amount of time to etch the second layer at the second portion of the device are measured. A first etch rate and a second etch rate of the processing chamber is determined based on the measured first amount of time, the measured second amount of time, and a thickness of the second layer.

Abstract: A method of manufacturing a semiconductor, comprising: providing a stacked structure comprising a first oxide layer, a second oxide layer, and a metal layer stacked between the first oxide layer and the second oxide layer; forming a mask layer on the second oxide layer; introducing a gas mixture to the stacked structure, wherein the gas mixture comprises at least two hydrocarbon compounds and oxygen; and performing a pulsing plasma process to the stacked structure through the mask layer to pattern the second oxide layer and expose the metal layer through the patterned second oxide layer.

Abstract: An etching method includes forming a film on a surface of a substrate. The substrate has a region at least partially made of silicon oxide and a mask. The mask is provided on the region and includes an opening that partially exposes the region. The film is made of the same material as that of the region. The film is formed to correct a shape of a side wall defining the opening to a vertical shape. The etching method further includes etching the region.

Abstract: Atomic layer etching of a substrate using a wafer scale wave of precisely controlled electrons is presented. A volume of gaseous plasma including diluent and reactive species and electrons of a uniform steady state composition is generated in a positive column of a DC plasma proximate the substrate. A corrosion layer is formed on the substrate by adsorption of the reactive species to atoms at the surface of the substrate. The substrate is positively biased to draw electrons from the volume to the surface of the substrate and impart an energy to the electrons so to stimulate electron transitions in the corrosion layer species, resulting in ejection of the corrosion layer species via electron stimulation desorption (ESD). The substrate is negatively biased to repel the electrons from the surface of the substrate back to the volume, followed by a zero bias to restore the steady state composition of the volume.

Abstract: A method of high-throughput dry etching of a film by proton-mediated catalyst formation. The method includes providing a substrate having a film thereon containing silicon-oxygen components, silicon-nitrogen components, or both, introducing an etching gas in the process chamber, plasma-exciting the etching gas, and exposing the film to the plasma-excited etching gas to etch the film. In one example, the etching gas contains at least three different gases that include a fluorine-containing gas, a hydrogen-containing gas, and a nitrogen-containing gas, plasma-exciting the etching gas. In another example, the etching gas contains at least four different gases that include a fluorine-containing gas, a hydrogen-containing gas, an oxygen-containing gas, and a silicon-containing gas.

Abstract: The present disclosure provides chemical-mechanical polishing (CMP) particles exhibiting a high polishing rate and a high polishing quality of generating few defects or scratches due to their modified surface thereof. The present disclosure also provides a polishing slurry composition including the polishing particles.

Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.

Abstract: Thin tin oxide films can be used in semiconductor device manufacturing. In one implementation, a method of processing a semiconductor substrate includes: providing a semiconductor substrate having a plurality of protruding features residing on an etch stop layer material, and an exposed tin oxide layer in contact with both the protruding features and the etch stop layer material, where the tin oxide layer covers both sidewalls and horizontal surfaces of the protruding features; and then completely removing the tin oxide layer from horizontal surfaces of the semiconductor substrate without completely removing the tin oxide layer residing at the sidewalls of the protruding features. Next, the protruding features can be removed without completely removing the tin oxide layer that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers.

Abstract: A method for atomic layer etching may include a step of providing a substrate on which a material to be etched is formed, a modifying step of controlling the substrate at a first temperature and modifying a surface layer of the material to be removed by supplying a modifying gas to the substrate, and an etching step of controlling the substrate at a second temperature different from the first temperature and removing the modified surface layer by supplying an etching gas to the substrate.

Abstract: A plasma processing apparatus or a plasma processing method having an improved yield, the plasma processing apparatus includes: a processing chamber arranged inside a vacuum container; a processing gas supply line connecting to the vacuum container, communicating with the processing chamber, and configured to supply processing gas having adhesiveness to the processing chamber; and a gas exhaust line for the processing gas connecting and communicating the processing gas supply line with a processing chamber exhaust line that is connected to an exhaust pump and communicates with the processing chamber, in which the plasma processing apparatus exhausts the processing gas in the processing gas supply line through the gas exhaust line and the processing chamber exhaust line in a state where supplying of the processing gas to the processing chamber is stopped between one processing step of etching the wafer and a subsequent processing step.

Abstract: A method is described for patterning a dielectric layer disposed over a semiconductor substrate layer. The patterning process includes forming a patterned hard mask layer over the dielectric layer, the patterned hard mask layer exposing a portion of a major surface of the dielectric layer. A portion of the dielectric layer is removed by a cyclic etch process, where performing one cycle of the cyclic etch process comprises forming a capping layer selectively over the patterned hard mask layer and performing a timed etch process that removes material from the dielectric layer. In another method, the deposition over the hard mask and the removal of the portion of the dielectric layer are performed concurrently.

Abstract: Exemplary etching methods may include flowing an oxygen-containing precursor into a remote plasma region of a semiconductor processing chamber while striking a plasma to produce oxygen plasma effluents. The methods may include contacting a substrate housed in a processing region with the oxygen plasma effluents. The substrate may define an exposed region of titanium nitride. The contacting may produce an oxidized surface on the titanium nitride. The methods may include flowing a halogen-containing precursor into a remote plasma region of a semiconductor processing chamber while striking a plasma to produce halogen plasma effluents. The methods may include contacting the oxidized surface on the titanium nitride with the halogen plasma effluents. The methods may include removing the oxidized surface on the titanium nitride.

Abstract: The presently claimed invention relates to a chemical-mechanical polishing (CMP) composition and chemical-mechanical polishing (CMP) methods. The presently claimed invention particularly relates to a composition and process for chemical-mechanical polishing of substrates containing copper and ruthenium, specifically, semiconductor substrates containing copper and ruthenium.

Abstract: The etching method includes a modification process and a removal process. In the modification process, a fluorine containing gas is supplied to an object having a silicon oxide film, so that a modification layer is formed on the surface of the silicon oxide film. In the removal process, the object, on which the modification layer has been formed, is exposed to plasma of a gas that contains ammonia, so that the modification layer is removed from the object. In addition, the modification process and the removal process are alternately repeated a plurality of times.

Abstract: In this work is presented a method for fabrication of high-aspect ratio structures through spalling effect. The spalling is achieved through lithography, etching and sputtering processes, thus providing the flexibility to position the spalled structures according to the application requirements. This method has been successfully demonstrated for metal-oxides and metals. The width of the fabricated structures is dependent on the thickness of the film deposited by sputtering, where structures as small as 20 nm in width have been obtained.

Abstract: A method for preparing precise pattern of integrated circuits, which comprises the following steps: (S1) preparing a large pitch trench or circular through-hole structure with a hard mask in a first dielectric layer by lithography and etching; (S2) forming micro trench on the hard mask of the second dielectric layer at the bottom side wall of the trench or circular through-hole structure by plasma etching process; (S3) removing the first dielectric layer; (S4) opening the hard mask of the second dielectric layer at the micro trench formed on the hard mask of the second dielectric layer by plasma etching process; (S5) small pitch trench or circular through holes are prepared in the second dielectric layer.

Abstract: There is provided a technique that includes: etching a first film exposed on a surface of a substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: (a) forming a first modified layer in at least a portion of a surface of the first film by supplying a first gas to the substrate; and (b) etching at least a portion of the first film with an etching species, the etching species being generated by supplying a second gas having a molecular structure different from that of the first gas to the substrate to perform at least one selected from the group of causing the second gas to react with the first modified layer and activating the first modified layer with the second gas.