Abstract: In a semiconductor device including a low lifetime region of a depth within a range on both sides sandwiching a p-n junction of a p-type semiconductor region bottom portion, the low lifetime region includes a central region that has a portion coinciding with the semiconductor region as seen from one main surface side and is selectively formed as far as the position of a contact end portion of a region of the coinciding portion with which the semiconductor region and a metal electrode are in contact, a peripheral region wherein the central region extends as far as the position of an outer peripheral end of the semiconductor region, and an expanded end portion region wherein the peripheral region extends as far as an outer peripheral end of the innermost of guard rings. Because of this, it is possible to reduce leakage current while maintaining high reverse recovery current resistance.

Abstract: A method of forming an on-chip heat sink includes forming a device on a substrate. The method also includes forming a plurality of insulator layers over the device. The method further includes forming a heat sink in at least one of the plurality of insulator layers and proximate to the device. The heat sink includes a reservoir of phase change material having a melting point temperature that is less than an upper limit of a design operating temperature of the chip.

Abstract: The invention relates to a method for producing chips (13) by dividing a wafer along dividing lines (11, 12) defining dimensions of the chip, wherein a focus (18) of a preferably pulsed laser radiation (16) is moved along the dividing lines on a first and at least a second path (25, 26) within the wafer body, wherein the laser radiation is applied to the wafer from a rear side (17) of the wafer, and the power density for producing the defects (28) on the first path (25) is lower than the power density for producing the defects (29) on the second path (26), and/or the number of defects on the first path is smaller than the number of defects on the second path.

Abstract: Techniques are disclosed for methods and apparatuses for performing continuous-flow plasma enhanced atomic layer deposition (PEALD). Plasma gas, containing one or more component gases, is continuously flowed to a planar inductive coupled plasma source attached at an upper end of a cylindrical chamber. Plasma is separated from the ALD volume surrounding a wafer/substrate in the lower end of the chamber by a combination of a grounded metal plate and a ceramic plate. Each plate has a number of mutually aligned holes. The ceramic plate has holes with a diameter less than 2 Debye lengths and has a large aspect ratio. This prevents damaging plasma flux from entering the ALD volume into which a gaseous metal precursor is also pulsed. The self-limiting ALD reaction involving the heated substrate, the excited neutrals from the plasma gas, and the metal precursor produce an ultra-uniform, high quality film on the wafer. A batch configuration to simultaneously coat multiple wafers is also disclosed.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: Embodiments of forming an image sensor with an organic photodiode are provided. The organic photodiode uses dual electron-blocking layers formed next to the anode of the organic photodiode to reduce dark current. By using dual electron-blocking layers, the values of highest occupied molecular orbital (HOMO) for the neighboring anode layer and the organic electron-blocking layer are matched by one of the dual electron-blocking layers to form a photodiode with good performance. The values of the lowest occupied molecular orbital (LOMOs) of the dual electron-blocking layers are selected to be lower than the neighboring anode layer to reduce dark current.

Abstract: A transistor with favorable electrical characteristics is provided. A transistor with stable electrical characteristics is provided. A semiconductor device having a high degree of integration is provided. Side surfaces of an oxide semiconductor layer in which a channel is formed are covered with an oxide semiconductor layer, whereby impurity diffusion from the side surfaces of the oxide semiconductor into the inside can be prevented. A gate electrode is formed by a damascene process, whereby transistors can be miniaturized and formed at a high density.

Abstract: An organic light-emitting diode (OLED) display apparatus including a substrate, an insulation layer on the substrate, and an align mark formed of an insulation material, wherein an upper surface of the insulation layer contacts a lower surface of the align mark.

Abstract: Described is a 6T SRAM cell which comprises: a first n-type transistor with a gate terminal coupled to word-line, source/drain terminal coupled to a first bit-line and drain/source terminal coupled to a first node; and a second n-type transistor with a source terminal coupled to a first supply node, a drain terminal coupled to the first node, and a gate terminal for coupling to multiple terminals, wherein the gate terminal includes a capacitor to increase coupling capacitance of the second n-type transistor. Described is a method which comprises: forming a metal gate in a first direction; forming a first spacer in the first direction on one side of the metal gate, the first spacer having a first dimension; and forming a second spacer in the first direction on another side of the metal gate, the second spacer having a second dimension which is substantially different from the first dimension.

Abstract: A method of forming a semiconductor structure in which a III-V compound semiconductor channel fin portion is formed on a dielectric material is provided. The method includes forming a III-V material stack on a surface of a bulk semiconductor substrate. Patterning of the III-V material stack is then employed to provide a pre-fin structure that is located between, and in contact with, pre-pad structures. The pre-pad structures are used as an anchoring agent when a III-V compound semiconductor channel layer portion of the III-V material stack and of the pre-fin structure is suspended by removing a topmost III-V compound semiconductor buffer layer portion of the material stack from the pre-fin structure. A dielectric material is then formed within the gap provided by the suspending step and thereafter a fin cut process is employed.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the metal gate stack includes a metal gate electrode. The semiconductor device further includes a metal oxide structure formed over the insulating layer and in direct contact with the insulating layer. The metal oxide structure includes an oxidized material of the metal gate electrode.

Abstract: A photoelectrosynthetically active heterostructure (PAH) is manufactured by forming or providing cavities in an electrically insulating material; forming or providing an electrically conductive layer on a side of the electrically insulating material; depositing an electrocatalyst cathode layer in the cavities; depositing one or more layers of light-absorbing semiconductor material in the cavities; depositing an electrocatalyst anode layer in the cavities; removing the layer of electrically conductive metal; and forming a hydrogen permeable layer over the electrocatalyst cathode layer. The one or more layers of light-absorbing semiconductor material can form a p-n junction or Schottky junction. The PAH can be used in photoelectrosynthetic processes to produce desired products, such as reduction product (e.g., methane gas, methanol, or carbon monoxide) from carbon dioxide and liquid waste streams.

Abstract: A lighting device including an emissive material comprising quantum dots and a liquid medium disposed within a sealed container with at least a portion of a light guiding member disposed within the sealed container. Products including a lighting device in accordance with the invention are also disclosed.

Abstract: A method for forming a semiconductor device includes recessing a gate conductor in a gate structure to form a first divot, forming a gate cap in the first divot and recessing a dielectric fill that encapsulates the gate structures to a position below a top of the gate cap. An extension layer is deposited over the dielectric fill and the top of the gate cap and is planarized to the top of the gate cap. The extension layer is expanded to form a profile growth layer that is thicker than the extension layer and creates a second divot over the gate cap. A top cap is formed in the second divot to provide a cap with a thickness of the gate cap and the top cap.

Abstract: A method of producing a semiconductor light emitting element includes providing a semiconductor stack including a first semiconductor layer, an active layer, a second semiconductor layer, and a first insulating layer. An upper surface of the first insulating layer is partially covered with a mask. The semiconductor stack is etched to expose the first semiconductor layer in a region not covered by the mask. The mask is removed. A second insulating layer covering from the upper surface of the first insulating layer to an exposed region of the first semiconductor layer is provided. The second insulating layer is etched without masking to remove at least a portion of the second insulating layer covering the exposed region to expose the exposed region. A first conducting layer covering from the exposed region of the first semiconductor layer to a region above the upper surface of the first insulating layer is provided.

Abstract: Optical films for reducing color shift, and organic light-emitting display apparatuses, employing the same include a first lens pattern layer including a plurality of first grooves, and a second lens pattern layer on the first lens pattern layer having the plurality of first grooves. The second lens pattern layer has a plurality of second grooves crossing the plurality of first grooves. The plurality of first and second grooves are each shaped in the form of a stripe.

Abstract: A first and a second instance of a common structured stack are formed, respectively, on a first fin and a second fin. The common structured stack includes a work-function metal layer, and a barrier layer. The barrier layer of the first instance of the common structured stack is etched through, and the work-function metal layer of the first instance of the common structure is partially etched. The partial etch forms a thinner work-function metal layer, having an oxide of the work-function metal as a new barrier layer. A gate element is formed on the new barrier layer.

Abstract: A method for forming a fin on a substrate comprises patterning and etching a layer of a first semiconductor material to define a strained fin, depositing a layer of a second semiconductor material over the fin, the second semiconductor material operative to maintain the a strain in the strained fin, etching to remove a portion of the second semiconductor material to define a cavity that exposes a portion of the fin, etching to remove the exposed portion of the fin such that the fin is divided into a first segment and a second segment, and depositing an insulator material in the cavity, the insulator material contacting the first segment of the fin and the second segment of the fin.

Abstract: A device includes an n-doped InP layer and an ohmic contact, in contact with the n-doped InP layer. The ohmic contact includes an annealed stack of at least three, or preferably four alternating layers of Si and Ni, such that: (i) the n-doped InP layer and one of the layers of the stack in contact with the n-doped InP layer are at least partly intermixed; and (ii) any two adjacent layers of the stack are at least partly intermixed. Related fabrication methods are also disclosed.

Abstract: A light-emitting device according to an embodiment comprises: a substrate; a first buffer layer disposed on the substrate; a second buffer layer disposed on the first buffer layer and containing Al; a first conductive type semiconductor layer disposed on the second buffer layer; an active layer disposed on the first conductive type semiconductor layer; and a second conductive type semiconductor layer disposed on the active layer, wherein the second buffer layer comprises a first layer and a second layer which are horizontally disposed, the first layer having an increased Al composition ratio as the first layer becomes closer to the first conductive type semiconductor layer, and the second layer having an decreased Al composition ratio as the second layer becomes closer to the first conductive type semiconductor layer.