Patents Examined by Steven T Sawyer
  • Patent number: 10879682
    Abstract: An electrical connection box includes a case including a frame that holds electronic components and a cover that blocks an opening portion of the frame, a power supply connection portion provided inside the case, an external power supply being connected to the power supply connection portion, and a cover portion that covers the power supply connection portion from above, in which the cover portion has a hole portion that communicates a space portion on a side of the power supply connection portion with respect to the cover portion with a space portion above the cover portion inside the case, and is configured to detachably hold a component.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: December 29, 2020
    Assignee: YAZAKI CORPORATION
    Inventors: Daisuke Kawada, Yuki Komiya, Hirotaka Kiyota
  • Patent number: 10879632
    Abstract: The invention relates to a positioning element for twin axial cables as well as to a contacting element comprising a positioning element of said type. In an illustrative embodiment of a positioning element for twin axial cables, the positioning element is at least partially electroconductive. Furthermore, the positioning element has at least one recess which is arranged and designed to accommodate a twin axial cable in such a way that an electroconductive connection is established between an outer conductor of the twin axial cable and the positioning element.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: December 29, 2020
    Assignee: Leoni Kabel GmbH
    Inventors: Frank Jakobs, Nikolai Giske, Alexander Franck
  • Patent number: 10874022
    Abstract: A print circuit board and a manufacturing method thereof are disclosed. The print circuit board includes a first substrate, a first insulating layer and a metal sheet. The first insulating layer is formed between the first substrate and the metal sheet. The insulating layer includes silicon-based polymer compound. The manufacturing method for the print circuit board includes the following steps: coating a first substrate and a metal sheet with insulating material, placing the first substrate and the metal sheet into a heating device to bake the insulating material on the first substrate and the metal sheet, and bonding the metal sheet onto the first substrate through thermally pressing the baked insulating material. The insulating material includes silicon-based polymer compound.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: December 22, 2020
    Assignee: FULLPOWER TEK CO., LTD.
    Inventors: Ying-Chih Chen, Chao-Ming Lin
  • Patent number: 10873143
    Abstract: An electrical connection element for the electrical contacting of an electrically conductive structure on a substrate is described. The electrical connection element has at least two solid subelements made from different materials, the first subelement being adapted for soldering to the electrically conductive structure, and the second subelement being adapted for connection to an electrical connection cable. The first subelement and the second subelement are connected to one another by way of at least one rivet.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: December 22, 2020
    Assignees: SAINT-GOBAIN GLASS FRANCE, FEW FAHRZEUGELEKTRIK WERK GMBH & CO. KG
    Inventors: Klaus Schmalbuch, Mitja Rateiczak, Bernhard Reul, Bjoern Schneider
  • Patent number: 10869384
    Abstract: A circuit board heat dissipation assembly includes a circuit board, a heat sink, a metal back plate, a heat pipe, and a pressing member. The circuit board has a front side and a rear side, and the front side has at least one heat generating area. The heat sink is disposed in the heat generating area. The metal back plate is disposed at a spacing from the rear side of the circuit board. The heat pipe has a first end, a bend segment, and a second end. The first end is connected to the heat sink. The second end is in contact with the metal back plate. The bend segment connects the first end and the second end at a side edge of the circuit board. The pressing member is fixed on the metal back plate and presses the second end onto the metal back plate.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: December 15, 2020
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Hung-Cheng Chen, Tse-Hsien Liao
  • Patent number: 10869386
    Abstract: Disclosed are a method and a structure for layout and routing of a PCB. The method includes: arranging signal lines, a power plane and a ground plane of the PCB in combination, where a portion of a reference plane for the signal lines is configured as a ground plane for providing a reference plane and return paths for the signal lines, to save routing spates. Layout of regions for the power supply, the ground and signal lines is appropriately designed, thereby improving the design density of a board, reducing the number of layers of the PCB, and saving cost.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: December 15, 2020
    Assignee: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Deheng Li
  • Patent number: 10862232
    Abstract: A circuit board pad connector system includes a connector that is configured to mount to a connector pad that is included on a circuit board. The connector includes a connector lead frame. A lead portion is provided on the connector lead frame such that the lead portion is oriented substantially perpendicularly relative to the connector pad when the connector is mounted to the connector pad. A first mounting portion is provided on the connector lead frame, is configured to mount the connector to the connector pad, and extends in a first direction that is substantially perpendicular relative to the lead portion. A second mounting portion is provided on the connector lead frame, is configured to mount the connector to the connector pad, and extends in a second direction that is different than the first direction and that is substantially perpendicular relative to the lead portion.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: December 8, 2020
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav M. Mutnury
  • Patent number: 10861780
    Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, a lower encapsulant and an intermediate layer. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The lower encapsulant surrounds a lateral peripheral surface of the lower conductive structure. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure to bond the upper conductive structure and the lower conductive structure together. The upper conductive structure is electrically connected to the lower conductive structure.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: December 8, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Patent number: 10847382
    Abstract: Apparatuses and methods for formation of a bond site including an opening with a discontinuous profile are disclosed herein. An example apparatus may at least include a substrate, a contact on the substrate, and a mask layer formed on the substrate and at least a portion of the contact. The mask layer may also include an opening formed therein, with the opening having a discontinuous profile from a top surface of the mask layer to the contact.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: November 24, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Jaspreet S. Gandhi, Dale Arnold
  • Patent number: 10849226
    Abstract: A printed circuit board includes: an insulating layer having a via hole formed therein; a single layer metal pad disposed in the insulating layer and having a center portion that is exposed by the via hole, the center portion of the pad having a higher roughness than peripheral portions of the pad; and a via formed in the via hole and connected to the center portion of the pad.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: November 24, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Mi-Sun Hwang, Hye-Won Jung, Jae-Sung Sim, Byung-Duk Na, Hee-Joon Chun, Sun-A Kim, Deok-Man Kang
  • Patent number: 10847286
    Abstract: A Metal-Clad (MC) cable assembly includes a core having a plurality of power conductors cabled with a subassembly, each of the plurality of power conductors and the subassembly including an electrical conductor, a layer of insulation, and a jacket layer. The MC cable assembly further includes an assembly jacket layer disposed over the subassembly, and a metal sheath disposed over the core. In one approach, the subassembly is a cabled set of conductors (e.g., twisted pair) operating as class 2 or class 3 circuit conductors in accordance with Article 725 of the National Electrical CodeĀ®. In another approach, the MC cable assembly includes a protective layer disposed around the jacket layer of one or more of the plurality of power conductors and the subassembly. In yet another approach, a bonding/grounding conductor is cabled with the plurality of power conductors and the subassembly.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: November 24, 2020
    Assignee: AFC Cable Systems, Inc.
    Inventors: George Anthony Straniero, Paul R. Picard, Richard A. Ricci, Peter Lafreniere
  • Patent number: 10827604
    Abstract: A method for producing a high frequency circuit board includes forming an antenna pattern on an upper surface of the provisional substrate. The method includes performing hot-press in a state where a thermoplastic resin and a provisional conductor are stacked on the upper surface of the provisional substrate, to form a first dielectric layer portion covering the antenna pattern. The method includes removing the provisional conductor and shaving the first dielectric layer portion to form a cavity to house an electronic component. The method includes mounting the electronic component on the antenna pattern in the cavity. The method includes performing hot-press in a state where a thermosetting resin and a ground conductor are stacked at an opening side of the cavity in the first dielectric layer portion, to form a second dielectric layer portion to embed the electronic component in the cavity. The method includes removing the provisional substrate.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: November 3, 2020
    Assignee: NIPPON PILLAR PACKING CO., LTD.
    Inventors: Takeshi Okunaga, Akira Nakatsu, Kojiro Iwasa, Yusuke Natsuhara
  • Patent number: 10820408
    Abstract: A multi-layer circuit board comprising a carrier plate with an upper surface and a lower surface, and at least one electrically conductive upper inner layer located on the upper surface of the carrier plate and an electrically insulating upper intermediate layer located thereon, and an electrically conductive upper outer layer located thereon, forming the outermost layer of the upper surface. At least one electrically conductive lower inner layer is located on the lower surface of the carrier plate and an electrically insulating lower intermediate layer located thereon, and an electrically conductive lower outer layer located thereon, forming the outermost layer of the lower surface. The upper and/or lower outer layers are populated with components, and conductor paths in one of the inner layers are oriented in different directions from conductor paths in the other inner layer, and the region between the conductor paths is flooded with a voltage.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: October 27, 2020
    Assignee: ZF Friedrichshafen AG
    Inventor: Michael Sperber
  • Patent number: 10811190
    Abstract: A multilayer ceramic capacitor includes an element body in which a dielectric layer and an internal electrode layer are laminated; a first external electrode that is provided at one end of the element body and is connected to a part of the internal electrode layer; and a second external electrode that is provided at an other end of the element body and is connected to that part of the internal electrode layer which is not connected to the first external electrode, in which the first external electrode and the second external electrode each have a linear groove.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: October 20, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Hirokazu Orimo
  • Patent number: 10804008
    Abstract: An electrical component includes an insulating base, an insulating layer provided outside the insulating base, a shielding member provided between the insulating base and the insulating layer, and multiple conductive bodies accommodated in the insulating base. The conductive bodies include at least one power supply body. Each of the at least one power supply body is provided with a shielding layer outside the power supply body and an insulator between the power supply body and the shielding layer. The shielding layer is accommodated in the shielding member. In the electrical component, by providing a shielding layer and an insulator provided between the power supply body and the shielding layer outside the power supply body, shielding of the shielding layer from the power supply body is implemented, so as to reduce an interference of the power supply body on a signal body, thereby improving transmission quality of high-frequency signals.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: October 13, 2020
    Assignee: LOTES CO., LTD
    Inventors: Chin Chi Lin, Yu Sheng Chen
  • Patent number: 10798820
    Abstract: A connector-equipped circuit body includes a circuit body configured by a flexible board where a wiring pattern formed of a conductor for electric connection is provided, and a connector connected to the circuit body. At a connection portion of connection between the circuit body and the connector, an auxiliary conductive layer independent of the wiring pattern is provided so as to be multilayered for the wiring pattern.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: October 6, 2020
    Assignee: YAZAKI CORPORATION
    Inventors: Masahiro Takamatsu, Yoshiaki Ichikawa, Kimitoshi Makino, Makoto Kobayashi, Tomoji Yasuda
  • Patent number: 10790222
    Abstract: A microelectronic assembly including first and second laminated microelectronic elements is provided. A patterned bonding layer is disposed on a face of each of the first and second laminated microelectronic elements. The patterned bonding layers are mechanically and electrically bonded to form the microelectronic assembly.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: September 29, 2020
    Assignee: Invensas Corporation
    Inventors: Javier A. Delacruz, Belgacem Haba, Wael Zohni, Liang Wang, Akash Agrawal
  • Patent number: 10791628
    Abstract: A method of forming an multi-chip carrier that includes providing a trace structure using an additive forming method. The method includes forming a metal layer on a trace structure to provide electrically conductive lines. A dielectric material may then be formed on the electrically conductive lines to encapsulate a majority of the electrically conductive lines. The ends of the electrically conductive lines that are exposed through the upper surface of the dielectric material provide a top processor mount location and the ends of the electrically conductive lines that are exposed through the sidewalls of the dielectric material provide a sidewall processor mount location.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: September 29, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chad M. Albertson, Eric J. Campbell, Nicholas J. Ollerich, Christopher W. Steffen
  • Patent number: 10791621
    Abstract: A circuit substrate includes an insulating body, a wiring enclosed by the insulating body, a conductive layer formed within the insulating body on a same plane as the wiring, and electrically insulated from the wiring by the insulating body, and one or more conductive vias extending through an edge portion of the conductive layer in a thickness direction intersecting the plane. A first width of the insulating body between the wiring and the conductive layer at a first position in the plane direction that does not correspond to any of said one or more conductive vias is smaller than a second width of the insulating body between the wiring and the conductive layer at a second position in the plane direction that corresponds to one of said one or more conductive vias.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: September 29, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Satoru Fukuchi
  • Patent number: 10780847
    Abstract: A vehicular circuit body provided in a vehicle includes: a trunk line that extends in at least a front-and-rear direction of the vehicle; and a plurality of control boxes that are provided in the trunk line, wherein each of the plurality of control boxes is able to connect with a branch line that is directly or indirectly connected to an accessory, and the trunk line includes a power source line and a communication line.
    Type: Grant
    Filed: December 22, 2018
    Date of Patent: September 22, 2020
    Assignee: YAZAKI CORPORATION
    Inventors: Masahiro Takamatsu, Kousuke Kinoshita, Atsushi Nakata, Yasuyuki Saito, Kazuyuki Oiwa, Terumitsu Sugimoto, Taku Furuta, Noriaki Sasaki, Yukinari Naganishi, Sadaharu Okuda