Patents Examined by Steven T Sawyer
  • Patent number: 11871516
    Abstract: The disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. An electronic apparatus is provided. The electronic apparatus includes a printed circuit board (PCB), an antenna module mounted on a surface of the printed circuit board, and a radio frequency integrated circuit (RFIC) module mounted on another surface of the printed circuit. The printed circuit board includes a coaxial plated through-hole (PTH) electrically connected with the antenna module and the RFIC.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: January 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwanghyun Baek, Juneseok Lee, Dohyuk Ha, Youngju Lee, Jinsu Heo
  • Patent number: 11871525
    Abstract: A wiring board according to the present disclosure has at least a structure in which a wiring conductor layer is layered on a surface of an insulating layer containing particles of silica, and some particles of silica among the particles of silica contained in the insulating layer are partially exposed on the surface of the insulating layer. The wiring conductor layer includes a seed layer in contact with the insulating layer and a plated conductor layer formed on a surface of the seed layer. At a contact surface between the exposed portions of the particles of silica and the seed layer, an amorphous layer of silica derived from the particles of silica and an amorphous layer of metal derived from metal forming the seed layer are present.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: January 9, 2024
    Assignee: KYOCERA CORPORATION
    Inventor: Yoshihiro Hasegawa
  • Patent number: 11864313
    Abstract: A multilayer wiring substrate according to the present invention includes a dielectric base body, a signal line in or on the dielectric base body, a ground conductor in the dielectric base body, and a graphite sheet in the dielectric base body. The dielectric base body is a laminate including dielectric sheets stacked on top of each other. The ground conductor and the signal line face each other in a stacking direction of the dielectric sheets. The ground conductor overlaps the signal line when viewed in plan in the stacking direction. The graphite sheet and the signal line face each other in the stacking direction without the signal line being located between the graphite sheet and the ground conductor. An upper surface of the graphite sheet is coplanar with an upper surface of the ground conductor or is located below the upper surface of the ground conductor.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: January 2, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Atsushi Kishimoto, Masatoshi Kakue, Shuichi Kawata, Hiroshi Nishikawa
  • Patent number: 11864307
    Abstract: A printed circuit board includes a first substrate portion including a plurality of first insulating layers, a plurality of first wiring layers respectively disposed on the plurality of first insulating layers, and a plurality of first adhesive layers respectively disposed between the plurality of first insulating layers to respectively cover the plurality of first wiring layers; and a second substrate portion disposed on the first substrate portion, and including a plurality of second insulating layers, a plurality of second wiring layers respectively disposed on the plurality of second insulating layers, and a plurality of second adhesive layers respectively disposed between the plurality of second insulating layers to respectively cover the plurality of second wiring layers.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Jung Byun, Jung Soo Kim, Sang Hyun Sim, Chang Min Ha, Tae Hong Min, Jin Won Lee
  • Patent number: 11864327
    Abstract: An inductor structure is provided that is positioned within a via of a printed circuit board. The inductor structure includes a via extending through a printed circuit board. The inductor structure includes at least one coil of an electrically conductive material beginning at a first opening to the via continuously present on a sidewall of the via encircling a center of the via extending to a second opening of the via opposite the first opening of the via. It further includes at least electrode present in contact with an end of the coil at said first or second opening.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: January 2, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gerald Bartley, Darryl Becker, Matthew Doyle, Mark Jeanson
  • Patent number: 11844178
    Abstract: An electronic device and a method of forming such an electronic device are disclosed. The electronic device can include an integrated device package and a component. The integrated device package includes a substrate and a package body over the substrate, and a hole formed through the package body to expose a conductive pad of the substrate. The component is mounted over the package body, and includes a component body and a lead extending from the component body through the hole. The lead includes an insulated portion and a distal exposed portion, and the insulated portion includes a conductor and an insulating layer disposed about the conductor, wherein the distal exposed portion is uncovered by the insulating layer such that the conductor is exposed at the distal portion. The electronic device can also include a conductive material that electrically connects the distal exposed portion to the conductive pad of the substrate.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: December 12, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: John David Brazzle, Sok Mun Chew
  • Patent number: 11837641
    Abstract: Gate-all-around integrated circuit structures having adjacent deep via substrate contact for sub-fin electrical contact are described. For example, an integrated circuit structure includes a conductive via on a semiconductor substrate. A vertical arrangement of horizontal nanowires is above a fin protruding from the semiconductor substrate. A channel region of the vertical arrangement of horizontal nanowires is electrically isolated from the fin. The fin is electrically coupled to the conductive via. A gate stack is over the vertical arrangement of horizontal nanowires.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: December 5, 2023
    Assignee: Intel Corporation
    Inventors: Biswajeet Guha, William Hsu, Chung-Hsun Lin, Kinyip Phoa, Oleg Golonzka, Tahir Ghani, Kalyan Kolluru, Nathan Jack, Nicholas Thomson, Ayan Kar, Benjamin Orr
  • Patent number: 11826169
    Abstract: A mouth guard senses impact forces and determines if the forces exceed an impact threshold. If so, the mouth guard notifies the user of the risk for injury by haptic feedback, vibratory feedback, and/or audible feedback. The mouth guard system may also remotely communicate the status of risk and the potential injury. The mouth guard uses a local memory device to store impact thresholds based on personal biometric information obtained from the user and compares the sensed forces relative to those threshold values. The mouth guard and its electrical components on the printed circuit board are custom manufactured for the user such that the mouth guard provides a comfortable and reliable fit, while ensuring exceptional performance.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: November 28, 2023
    Assignee: Force Impact Technologies, Inc.
    Inventors: Anthony M. Gonzales, Robert M. Merriman, Susan M. Merriman, Christopher T. Cooper
  • Patent number: 11819341
    Abstract: A mouth guard senses impact forces and determines if the forces exceed an impact threshold. If so, the mouth guard notifies the user of the risk for injury by haptic feedback, vibratory feedback, and/or audible feedback. The mouth guard system may also remotely communicate the status of risk and the potential injury. The mouth guard uses a local memory device to store impact thresholds based on personal biometric information obtained from the user and compares the sensed forces relative to those threshold values. The mouth guard and its electrical components on the printed circuit board are custom manufactured for the user such that the mouth guard provides a comfortable and reliable fit, while ensuring exceptional performance.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: November 21, 2023
    Assignee: Force Impact Technologies, Inc.
    Inventors: Anthony M. Gonzales, Robert M. Merriman, Susan M. Merriman, Christopher T. Cooper
  • Patent number: 11812552
    Abstract: A printed circuit board, includes: a first insulating layer on which a wiring line is disposed; a second insulating layer covering an upper portion of the wiring line; a first conductive shield wall spaced apart from two opposing sides of the wiring line in a width direction of the wiring line, and extending in a length direction of the wiring line; and a second conductive shield wall spaced apart from two opposing ends of the first conductive shield wall in the length direction, and extending the a width direction. At least one of the first conductive shield wall or the second conductive shield wall includes a plurality of via walls each extending in a thickness direction of the first insulating layer and the second insulating layer and having a gap is disposed therebetween.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: November 7, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chul Mun Kang, Sang Jong Lee, Hyun Sang Kwak, Chi Hyeon Jeong, Seong Hwan Lee
  • Patent number: 11800642
    Abstract: A bonding pad structure includes a substrate, a flexible printed circuit board, and a plurality of bonding pins. The bonding pins include at least one central bonding pin and at least two first bonding pins. The at least one central bonding pin is located at a center of bonding pins. The at least two first bonding pins are located farthest away from the at least one central bonding pin and have mirror symmetry with respect to the at least one central bonding pin. The at least one central bonding pin includes a first end and a second end. A first width A of the first end and a second width B of the second end satisfy 0<A/B?1. A tilt angle ? is formed between one of the at least two first bonding pins and one side of the substrate and satisfies 0<??90.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: October 24, 2023
    Assignee: TPK Advanced Solutions Inc.
    Inventors: Xian-Bin Xu, He Luo, Ming-Qiang Fu, Xiong-Min Zhang, Chen-Hsin Chang
  • Patent number: 11800644
    Abstract: A production method and a power electronic connecting device for a power semiconductor module, wherein the connecting device is designed as a flexible film stack of a first and a second electrically conductive film and an electrically insulating film arranged therebetween, wherein at least one of the electrically conductive films is structured in itself and thus forms a plurality of film conductor tracks, wherein a first one of these film conductor tracks has, in a first section, a first average thickness and, in a second section, a second average thickness which is at least 10%, preferably at least 20%, smaller than the first average thickness.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: October 24, 2023
    Assignee: SEMIKRON ELEKTRONIK GMBH & CO. KG
    Inventors: Markus Düsel, Michael Schatz, Alexander Wehner, Ingo Bogen, Jürgen Steger
  • Patent number: 11792945
    Abstract: A rollable display device includes a rollable screen, including a non-display part and a display part; and a telescopic mechanism. The rollable screen is laid surrounding the telescopic mechanism. The display part includes a fixed display portion and a rollable display portion. The fixed display portion is fixed on a first plane, and the non-display part is connected to the side of the rollable display portion away from the fixed display portion. The side of the non-display part away from the display part is connected to the telescopic mechanism. In a process of extension or retraction, the telescopic mechanism is configured to drive the rollable display portion to slide and bend. In the retracted state, the orthogonal projection of the rollable display portion at least partially overlaps with the fixed display portion. In the extended state, the orthogonal projection of the rollable display portion unoverlaps with the fixed display portion.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 17, 2023
    Assignee: HUBEI YANGTZE INDUSTRIAL INNOVATION CENTER OF ADVANCED DISPLAY CO., LTD.
    Inventor: Qijun Yao
  • Patent number: 11785715
    Abstract: An article for a power inverter, includes a multilayer printed circuit board having a first and second electrically conductive wiring layer and at least a first dielectric layer interposed between the first and second electrically conductive wiring layers. Each conductive wiring layer includes a common input and output line, the common input and output lines at least partially overlapping one another in a projection along a thickness of the multilayer printed circuit board. A set of input mounting pads is carried by the first common input line and a set of input mounting pads is carried by the second common input line, the input mounting pads of the second set of input mounting pads are interleaved with the input mounting pads of the first set of input mounting pads along a first axis. The article further includes a set output mounting pads carried by the common output line.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: October 10, 2023
    Assignee: Exro Technologies Inc.
    Inventor: Eric Hustedt
  • Patent number: 11780767
    Abstract: A glass ceramic sintered body having a small dielectric loss in a high frequency band of 10 GHz or higher and a wiring substrate using the same are provided. The glass ceramic sintered body contains crystallized glass, an alumina filler, and silica. The content of the crystallized glass is 45 mass % to 85 mass %, the content of the alumina filler is 14.8 mass % to 50.1 mass % in terms of Al2O3, and the content of silica is 0.2 mass % to 4.9 mass % in terms of SiO2.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: October 10, 2023
    Assignee: TDK CORPORATION
    Inventors: Shin Takane, Yousuke Futamata, Kenichi Sakai, Yasuharu Miyauchi
  • Patent number: 11778731
    Abstract: A multi-layer printed circuit board having a first landing pad in a first layer and along a first axis arranged to receive a positive signal and a second landing pad in the first layer and along a second axis that is spaced away from the first axis longitudinally in the first layer and where the second landing pad arranged to receive a negative signal. A first buried in a second layer and along the first axis is spaced away from the first landing pad along the first axis. A second buried in the second layer and along the second axis is spaced away from the second landing pad along the second axis. A first signal connector provides a first electrical connection between the first landing pad and the second buried via and a second signal connector provides a second electrical connection between the second landing pad and the first buried via.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: October 3, 2023
    Assignee: RAYTHEON COMPANY
    Inventors: Thanh Tran, David G. Haedge, Alton Moore, Paul Ingerson
  • Patent number: 11778742
    Abstract: A through-hole via penetrating, in a thickness direction, through a circuit board provided with multiple wiring layers in which a conductor pattern is formed on a surface of an insulating layer, wherein the through-hole via has a first through-hole conductor that is disposed inside a hole penetrating through the circuit board and that is formed from a conductor; a second through-hole conductor that is disposed inside the hole so as to be spaced, in a circumferential direction of the hole, from the first through-hole conductor; a first land portion that connects the first through-hole conductor to the conductor pattern on one insulating layer; and a second land portion that connects the first through-hole conductor with the second through-hole conductor on another insulating layer different from the one insulating layer.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: October 3, 2023
    Assignee: NEC Corporation
    Inventor: Takuya Nakamura
  • Patent number: 11778293
    Abstract: A sensor package that is configured by molding a frame to a mounting substrate by insert molding and that prevents adhering to components and terminals and reduces damage to the mounting substrate. The sensor package includes an image sensor, a mounting substrate to which the image sensor is mounted, a frame provided in the mounting substrate so as to surround the image sensor, and a cover attached to the frame so as to cover the image sensor. The mounting substrate includes terminals electrically connected with the image sensor and a groove provided in a predetermined depth between an area in which the frame is provided and the terminals.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: October 3, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Dai Naito
  • Patent number: 11775121
    Abstract: An electronic device includes a window having a modulus of about 55 GPa to about 80 GPa, an panel including an electronic element, and a plurality of adhesive layers between the window and the panel, wherein a sum of thicknesses of the adhesive layers is less than about 200 ?m, wherein the adhesive layers include a first adhesive layer contacting the panel, and a second adhesive layer contacting the window, and wherein a thickness of the first adhesive layer is equal to or less than about ½ of the sum of the thicknesses of the adhesive layers.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: October 3, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jaiku Shin, Hansun Ryou, Soyoun Jung, Jiwon Han, Dongwoo Seo, Youngeun Oh
  • Patent number: 11770898
    Abstract: A substrate structure includes a first printed circuit board having a first side and a second side opposing each other, and a plurality of passive components connected to the first side of the first printed circuit board. The plurality of passive components includes a first group, including a plurality of first passive components disposed adjacent to each other, and a second group, including a plurality of second passive components disposed adjacent to each other. A smallest distance between the first and second groups is greater than at least one of a smallest distance between adjacent first passive components of the plurality of first passive components and a smallest distance between adjacent second passive components of the plurality of second passive components. An electronic device includes a first printed circuit board disposed on a mainboard and having, on opposite sides thereof, a semiconductor chip and a plurality of passive components.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: September 26, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Eun Lee, Yong Hoon Kim, Jin Won Lee