Patents Examined by Steven T Sawyer
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Patent number: 12221383Abstract: An electrical system that includes a power source, a load, and an electrical connection operable to conduct electricity between the power source and the load, the electrical connection including an outer casing comprising a non-conducting material, and a material disposed within the outer casing, wherein the material is electrically conductive, the material including a boron-containing material and metal oxide nanoparticles, wherein the electrical connection includes a wire or cable.Type: GrantFiled: August 2, 2024Date of Patent: February 11, 2025Inventor: Saban Akyildiz
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Patent number: 12213805Abstract: A mouth guard senses impact forces and determines if the forces exceed an impact threshold. If so, the mouth guard notifies the user of the risk for injury by haptic feedback, vibratory feedback, and/or audible feedback. The mouth guard system may also remotely communicate the status of risk and the potential injury. The mouth guard uses a local memory device to store impact thresholds based on personal biometric information obtained from the user and compares the sensed forces relative to those threshold values. The mouth guard and its electrical components on the printed circuit board are custom manufactured for the user such that the mouth guard provides a comfortable and reliable fit, while ensuring exceptional performance.Type: GrantFiled: November 15, 2023Date of Patent: February 4, 2025Assignee: Force Impact Technologies, Inc.Inventors: Anthony M. Gonzales, Robert M. Merriman, Susan M. Merriman, Christopher T. Cooper
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Patent number: 12219700Abstract: A circuit board according to an embodiment includes a first insulating portion including at least one insulating layer; a second insulating portion disposed on the first insulating portion and including at least one insulating layer; and a third insulating portion disposed under the first insulating portion and including at least one insulating layer; wherein the insulating layer constituting the first insulating portion includes a prepreg containing glass fibers, and wherein each of the insulating layers constituting the second and third insulating portions is made of resin coated copper (RCC).Type: GrantFiled: August 25, 2020Date of Patent: February 4, 2025Assignee: LG INNOTEK CO., LTD.Inventors: Yong Suk Kim, Dong Hwa Lee
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Patent number: 12219692Abstract: A printed circuit board includes a first substrate portion including a plurality of first insulating layers, a plurality of first wiring layers respectively disposed on the plurality of first insulating layers, and a plurality of first adhesive layers respectively disposed between the plurality of first insulating layers to respectively cover the plurality of first wiring layers; and a second substrate portion disposed on the first substrate portion, and including a plurality of second insulating layers, a plurality of second wiring layers respectively disposed on the plurality of second insulating layers, and a plurality of second adhesive layers respectively disposed between the plurality of second insulating layers to respectively cover the plurality of second wiring layers.Type: GrantFiled: November 22, 2023Date of Patent: February 4, 2025Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dae Jung Byun, Jung Soo Kim, Sang Hyun Sim, Chang Min Ha, Tae Hong Min, Jin Won Lee
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Patent number: 12207409Abstract: An embodiment of an electronic system comprises a main board, and a modular capacitor subassembly mechanically and electrically coupled to the main board, wherein the modular capacitor subassembly provides backup power for the main board, and wherein the main board is adapted for use in at least two housing form factors. Other embodiments are disclosed and claimed.Type: GrantFiled: October 27, 2020Date of Patent: January 21, 2025Assignee: Intel CorporationInventors: John Hung, Andrew Morning-Smith, Kai-Uwe Schmidt, Nan Allison Yao
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Patent number: 12200861Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, at least one second build-up circuit layer, at least one conductive through hole, and a fine redistribution layer (RDL). The embedded block is fixed in a through cavity of the dielectric substrate. The electronic component is disposed in an opening of the embedded block. The first build-up circuit layer is disposed on a top surface of the dielectric substrate and electrically connected with the electronic component. The second build-up circuit layer is disposed on a bottom surface of the dielectric substrate and covers the embedded block. The conductive through hole is disposed in a via of the embedded block and electrically connects the first and the second build-up circuit layers. The fine RDL is disposed on and electrically connected to the first build-up circuit layer.Type: GrantFiled: November 2, 2022Date of Patent: January 14, 2025Assignee: Unimicron Technology Corp.Inventors: Guang-Hwa Ma, Chin-Sheng Wang, Ra-Min Tain
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Patent number: 12184017Abstract: A bus bar assembly comprises a first bus bar and a second bus bar. Each bus bar comprises a bridge flange having a first side and a second side, top and bottom flanges extending from the first side of the bridge flange, and an interface flange extending from the second side of the bridge flange. The bus bar assembly further comprises a first insulation layer positioned between the top flanges of the first and second bus bars and a second insulation layer positioned between the bottom flanges of the first and second bus bars. Each of the top and bottom flanges comprises a plurality of mating devices coupled thereto. The top flanges of the first and second bus bars and the first insulation layer are fixedly joined together. The bottom flanges of the first and second bus bars and the second insulation layer are fixedly joined together.Type: GrantFiled: May 31, 2021Date of Patent: December 31, 2024Assignee: AES Global Holdings PTE Ltd.Inventors: Angelito Hatol, Romano Iniego
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Patent number: 12185459Abstract: A flexible circuit board comprises: a first dielectric which has a first signal line in contact with an upper surface or lower surface thereof, has a greater width than the first signal line, and extends along an extension direction of the first signal line; a second dielectric which is located below the first dielectric, has a second signal line in contact with the upper or lower surface thereof, has a greater width than the second signal line, and extends along an extension direction of the second signal line; a vertical section in which the first signal line and the second signal line are located on a same vertical line and the first signal line and the second signal line extend in parallel; and a horizontal section in which the position of the first signal line or the second signal line is changed through a via hole.Type: GrantFiled: March 31, 2020Date of Patent: December 31, 2024Assignee: GigaLane Co., Ltd.Inventors: Sang Pil Kim, Ik Soo Kim, Byung Yeol Kim, Hee Seok Jung
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Patent number: 12183999Abstract: A semiconductor package provides a low profile connection to a bottom side of the semi-conductor package. The semi-conductor package includes a computer processor die and a substrate. The computer processor die is mounted on to a top surface of the substrate. The substrate is mounted on to a printed circuit board. A voltage regulator is coupled to the printed circuit board. A top surface of the voltage regulator is coupled to a bottom surface of the substrate. The package also includes a connector device. The connector device includes a cable configured to conduct power from an upstream source, and a low-profile connector module attached to an end of the cable. The connector module is configured to interface to a bottom surface of the voltage regulator.Type: GrantFiled: December 17, 2021Date of Patent: December 31, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Xin Zhang, Todd Edward Takken, Yuan Yao, Andrew Ferencz
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Patent number: 12176315Abstract: An electrical connection member (1, 301, 401, 501, 601) includes a clad material (10, 110, 610) including at least both a first Cu layer (12) made of a Cu material and a low thermal expansion layer (11) made of an Fe material or Ni material having an average thermal expansion coefficient from room temperature to 300° C. smaller than that of the first Cu layer, the first Cu layer and the low thermal expansion layer being bonded to each other.Type: GrantFiled: November 30, 2018Date of Patent: December 24, 2024Assignee: Hitachi Metals, Ltd.Inventors: Junya Nishina, Masaaki Ishio
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Patent number: 12177977Abstract: A flexible printed circuit board includes a base film having an insulating property and a plurality of interconnects laminated to at least one surface side of the base film. The plurality of interconnects includes a first interconnect and a second interconnect in a same plane. An average thickness of the second interconnect being greater than an average thickness of the first interconnect. A ratio of the average thickness of the second interconnect to the average thickness of the first interconnect is greater than or equal to 1.5 and less than or equal to 50. The first interconnect includes a first conductive underlayer and a first plating layer, and the second interconnect includes a second conductive underlayer, a second plating layer, and a third plating layer.Type: GrantFiled: April 10, 2023Date of Patent: December 24, 2024Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Koji Nitta, Yasushi Mochida, Yoshio Oka, Shoichiro Sakai, Tadahiro Kaibuki, Junichi Okaue
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Patent number: 12166324Abstract: To provide a connected structure of a substrate and an electric wire with high connection reliability even when a carbon nanotube wire with an average diameter of 0.05 mm to 3.00 mm is used as the electric wire. The connected structure of the substrate and the carbon nanotube wire includes a substrate; a carbon nanotube wire made of one or more carbon nanotube aggregates each including a plurality of carbon nanotubes, the carbon nanotube wire having an average diameter of 0.05 mm to 3.00 mm; a conductive fixing member, part of which is provided between the substrate and the carbon nanotube wire; and a conductive member that electrically connects the carbon nanotube wire and the fixing member.Type: GrantFiled: September 24, 2021Date of Patent: December 10, 2024Assignee: Furukawa Electric Co., Ltd.Inventors: Satoshi Yamashita, Kenji Hatamoto
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Patent number: 12160949Abstract: A wiring board, comprising: wiring patterns that are buried in the wiring board, in which a region positioned between wiring patterns disposed in an in-plane direction of the same plane has an elastic modulus at 140° C. equal to or less than 0.1 MPa, and a dielectric loss tangent is equal to or less than 0.006.Type: GrantFiled: May 25, 2022Date of Patent: December 3, 2024Assignee: FUJIFILM CorporationInventors: Genya Tanaka, Yasuyuki Sasada
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Patent number: 12142392Abstract: The present disclosure relates to a bushing comprising a conductor tube, a support tube, arranged within the conductor tube, a draw-rod configured to run through the support tube, and a contact arrangement arranged to be drawn into the conductor tube by the draw-rod. The contact arrangement comprises a sealing plug arranged for sealingly engaging an inside wall of the conductor tube to prevent liquid from passing the sealing plug into the conductor tube.Type: GrantFiled: November 20, 2020Date of Patent: November 12, 2024Assignee: HITACHI ENERGY LTDInventors: Fredrik Graas, Jesper Calpson, Alejandra Ravanal, David Emilsson, Peter Sjöberg, Zoltan Repasi
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Patent number: 12144108Abstract: A wiring board includes a substrate, wiring, and a reinforcing part. The substrate is stretchable, and includes a first surface and a second surface located opposite to the first surface. The wiring is located at the first surface side of the substrate. The reinforcing part overlaps the wiring when viewed in a direction normal to the first surface of the substrate. The substrate has a control region and a non-control region. The control region overlaps the reinforcing part. The non-control region does not overlap the reinforcing part. The non-control region is positioned to sandwich the control region in a direction orthogonal to the direction in which the wiring extends.Type: GrantFiled: October 31, 2019Date of Patent: November 12, 2024Assignee: DAI NIPPON PRINTING CO., LTD.Inventors: Naoko Okimoto, Kenichi Ogawa, Mitsutaka Nagae, Makiko Sakata, Toru Miyoshi
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Patent number: 12131846Abstract: A connecting cable includes a first end, a second end and a heat dissipation channel in communication with the first end and the second end. The first end is adapted to connect with a first component. The second end is adapted to connect with a second component. The present disclosure also discloses a cable connector, a charger, and a charger assembly having the connecting cable. Compared with the prior art, in the present disclosure, by providing the heat dissipation channel in the connecting cable, the heat generated by the electronic device can be discharged in time through the heat dissipation channel. Therefore, the heat dissipation performance is improved.Type: GrantFiled: October 13, 2021Date of Patent: October 29, 2024Assignee: LUXSHARE ELECTRONIC TECHNOLOGY (KUNSHAN) LTD.Inventors: Tao Wang, Qinghong Zhao, Xiaolong Liu, Ji Wei
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Patent number: 12132301Abstract: An electrical junction box includes a case body having a plurality of connector portions, a power supply side circuit board accommodated in the case body and a spare connector mounting portion provided in an upper portion of the case body and configured such that a spare connector is attached to and detached from the spare connector mounting portion. The spare connector includes a fuse configured to electrically connect the power supply side circuit board to a device side terminal connected to an end of an electric wire configured to be electrically connected to an electronic device.Type: GrantFiled: August 23, 2022Date of Patent: October 29, 2024Assignee: YAZAKI CORPORATIONInventors: Akinori Nakashima, Hiroki Goto, Takao Nogaki
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Patent number: 12132302Abstract: Disclosed is a circuit assembly having a novel structure that enables circuit components to be laid out in a lower case with high design flexibility and higher spatial efficiency. A circuit assembly includes: a lower case for accommodating lower circuit components; an upper case for covering the lower case; upper circuit components attached to the upper case, and a fastening member holder for holding a fastening member for fixing the upper circuit components to the upper case, the fastening member holder being provided in the upper case.Type: GrantFiled: January 12, 2021Date of Patent: October 29, 2024Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Yusuke Isaji, Hitoshi Takeda
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Patent number: 12127343Abstract: A printed circuit board includes a first insulating layer; a first circuit pattern embedded in the first insulating layer; a second insulating layer disposed on the first insulating layer; a via hole penetrating at least a portion of each of the first and second insulating layers; and an adhesive layer disposed on at least a portion of a side surface of the via hole.Type: GrantFiled: December 24, 2020Date of Patent: October 22, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Dong Joo Shin
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Patent number: 12114416Abstract: A semiconductor device assembly (10) includes a multi-layer printed circuit board (PCB—40), a thermoelectric cooler (TEC—30), a chip (22), and packaged integrated circuitry (IC—26). The multi-layer PCB includes a lateral heat conducting path (60) formed in a recessed area (44) of the PCB. The TEC and the chip are disposed on the PCB, side-by-side to one another over the lateral heat conducting path. The TEC is configured to evacuate heat from the chip via the lateral heat conducting path, and to dissipate the evacuated heat via a first end of a heat sink (33) in thermal contact with the TEC. The packaged IC is disposed on an un-recessed area of the PCB, wherein the packaged IC is configured to dissipate heat via a second end of the heat sink that is in thermal contact with the packaged IC.Type: GrantFiled: November 3, 2021Date of Patent: October 8, 2024Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Elad Mentovich, Anna Sandomirsky, Dimitrios Kalavrouziotis