Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate. The semiconductor device structure also includes a source/drain structure over the semiconductor substrate, and the source/drain structure includes a dopant. The semiconductor device structure further includes a channel region under the gate stack. In addition, the semiconductor device structure includes a semiconductor layer surrounding the source/drain structure. The semiconductor layer is configured to prevent the dopant from entering the channel region.

Abstract: A light blocking sheet includes a first outer layer, a second outer layer, an inner substrate layer and a central axis. The first outer layer includes a first opening. The second outer layer includes a second opening. The inner substrate layer is disposed between the first outer layer and the second outer layer. The inner substrate layer connects the first outer layer to the second outer layer, and the inner substrate layer includes a substrate opening. The central axis is coaxial with the first opening, the second opening and the substrate opening.

Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

Abstract: An optoelectronic component includes a housing having a first cavity open toward an upper side of the housing, and a second cavity open toward the upper side of the housing, wherein the first cavity and the second cavity connect by a connecting channel, an optoelectronic semiconductor chip is arranged in the first cavity, a potting material is arranged in a region of the first cavity enclosing the optoelectronic semiconductor chip, a bond wire is arranged between an electrical contact surface of the optoelectronic semiconductor chip and a bond surface of the housing, and the bond surface is arranged in the connecting channel.

Abstract: An image sensor structure is provided. The image sensor device structure includes a substrate, and the substrate includes an array region and a peripheral region. The image sensor device structure includes an anti-reflection layer formed on the substrate and a buffer layer formed on the anti-reflection layer. The image sensor device structure includes a first etch stop layer formed on the buffer layer and a metal grid structure formed on the first etch stop layer. The image sensor device structure also includes a dielectric layer formed on the metal grid structure.

Abstract: An imaging device is provided, in which the dynamic range of still pictures can be suppressed from being decreased. In the imaging device, a photodiode including an n-type impurity region and a photodiode including an n-type impurity region are formed in a p-type well. An n-type impurity region is formed between the n-type impurity region on one side and that on the other side so as to contact each of the two. The impurity concentration of the last-formed n-type impurity region is set to be lower than those of the first-formed n-type impurity regions.

Abstract: A method of manufacturing an Organic Light Emitting Diode (OLED). The method comprises using a solution or a solvent for removing a photo-resist used for patterning, which photo-resist is at least partly covered with a material other than photo-resist. The method of manufacturing the OLED thus comprises a lift-off process. The new method provides the benefits of low cost manufacturing and high OLED performance.

Abstract: An LED package structure includes a ceramic substrate, a ceramic board, a light-emitting unit, a first adhesive layer, a second adhesive layer, and a cover. The ceramic board having a thru-hole is disposed on the ceramic substrate. The light-emitting unit is disposed on the ceramic substrate and is arranged in the thru-hole of the ceramic board. The first and second adhesive layers are disposed on the ceramic board, and the second adhesive layer covers the first adhesive layer. The cover is fixed on the ceramic board by the first and second adhesive layers. Thus, the shearing force of the LED package structure of the instant disclosure is increased by having the first and second adhesive layers, which are connected to each other.

Abstract: A method comprises implanting ions in a substrate to form a plurality of photo diodes, forming an interconnect layer over a first side of the substrate and applying a first halogen treatment process to a second side of the substrate and forming a first silicon-halogen compound layer over the second side of the substrate as a result of applying the first halogen treatment process.

Abstract: An image sensor structure and a method for forming the same are provided. The image sensor structure includes a first substrate including a first radiation sensing region and a first interconnect structure formed over a front side of the first substrate. The image sensor structure further includes a second substrate including a second radiation sensing region and a second interconnect structure formed over a front side of the second substrate. In addition, the first interconnect structure is bonded with the second interconnect structure.

Abstract: A semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, and an oxide insulating film covering the transistor. The multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film contains more oxygen than that in the stoichiometric composition, and in the transistor, by a bias-temperature stress test, threshold voltage does not change or the amount of the change in a positive direction or a negative direction is less than or equal to 1.0 V, preferably less than or equal to 0.5 V.

Abstract: An insulating film provided between adjacent pixels is referred to as a bank, a partition, a barrier, an embankment or the like, and is provided above a source wiring or a drain wiring for a thin film transistor, or a power supply line. In particular, at an intersection portion of these wirings provided in different layers, a larger step is formed there than in other portions. Even when the insulating film provided between adjacent pixels is formed by a coating method, thin portions are problematically partially formed due to this step and the withstand pressure is reduced. In the present invention, a dummy material is arranged near the large step portion, particularly, around the intersection portion of wirings, so as to alleviate unevenness formed thereover. The upper wiring and the lower wiring are arranged in a misaligned manner so as not to align the end portions.

Abstract: Disclosed are CMOS device and CMOS inverter. The CMOS device includes a substrate having active lines extending in a first direction and defined by a device isolation layer, the substrate being divided into an NMOS area, a PMOS area and a boundary area interposed between the NMOS and the PMOS areas and having the device isolation layer without the active line, a gate line extending in a second direction across the active lines and having a first gate structure on the active line in the first area, a second gate structure on the active line in the second and a third gate structure on the device isolation layer in the third area. The electrical resistance and parasitic capacitance of the third gate structure are smaller than those of the NMOS and the PMOS gate structures. Accordingly, better AC and DC performance of the CMOS device can be obtained.

Abstract: Disclosed is a thin film transistor, including a gate electrode, a source electrode and a drain electrode. The source electrode includes a loop structure with an opening, and a width of the opening is less than a maximum width of an inner ring of the loop structure of the source electrode in a direction identical to a direction of the width of the opening. The drain electrode is surrounded by the loop structure, and is not in contact with the source electrode. The drain electrode is distant from the inner ring of the loop structure of the source electrode at a same interval.

Abstract: A method of forming a transistor having a gate electrode includes forming a sacrificial layer over a semiconductor substrate, forming a patterning layer over the sacrificial layer, patterning the patterning layer to form patterned structures, forming spacers adjacent to sidewalls of the patterned structures, removing the patterned structures, etching through the sacrificial layer using the spacers as an etching mask and etching into the semiconductor substrate, thereby forming trenches in the semiconductor substrate, and filling a conductive material in the trenches in the semiconductor substrate to form the gate electrode.

Abstract: Methods form an electronic semiconductor device that includes a body having a first side and a second side opposite to one another and including a first structural region facing the second side, and a second structural region extending over the first structural region and facing the first side. A body region extends in the second structural region at the first side. A source region extends inside the body region and a lightly-doped drain region faces the first side of the body. A gate electrode is formed over the body region. A trench dielectric region extends through the second structural region in a first trench conductive region immediately adjacent to the trench dielectric region. A second trench conductive region is in electrical contact with the body region and source region. An electrical contact on the body is in electrical contact with the drain region through the first structural region.

Abstract: A semiconductor device includes an insulating substrate on which semiconductor elements are mounted and a surrounding case in which the insulating substrate is housed. Two terminal conductors, both ends of each of which are fixed in sidewalls of the surrounding case, are provided between the sidewalls, and connection terminals protruding toward the insulating substrate side are provided on the respective terminal conductors. The connection terminals and a conductive foil on the insulating substrate are soldered together. Insulating blocks for keeping the distance between the adjacent terminal conductors at a fixed distance or greater are provided in the vicinity of the central portion of the terminal conductor. The insulating blocks suppress the terminal conductor being deformed by being thermally expanded when soldering. Because of this, it is possible to stabilize solderability, and it is possible to prevent an occurrence of defective connection.

Abstract: A plurality of pixels P and a plurality of light-transmitting regions L are alternately disposed such that a light-transmitting region M1 is disposed between two pixels closest to each other in a X-direction and a light-transmitting region M2 is disposed between two pixels closest to each other in a Y-direction. Each of the light-transmitting regions is divided into a plurality of divided regions by a plurality of wirings WX and a plurality of wirings WY. The divided regions include first regions and second regions that are different from each other in widths in at least one of the X-direction and the Y-direction.

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first conductive layer provided on the first insulating film, a second insulating film provided on the semiconductor layer and the first conductive layer, a second conductive layer provided on the second insulating film, a first contact portion connecting the semiconductor layer and the second conductive layer, and a second contact portion connecting the first conductive layer and the second conductive layer. A distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the second contact portion is greater than a distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the first contact portion. The second contact portion has a larger width than the first contact portion.

Abstract: A semiconductor device includes: a substrate having a rear side on which a grounded electrode is disposed; a semiconductor layer disposed on a front side of the substrate and including an active region and an inactive region; a plurality of source electrodes disposed in the active region; a drain electrode including a plurality of first portions disposed in the active region and a second portion disposed in the inactive region; a gate electrode including a plurality of first portions disposed in the active region and a second portion disposed in the inactive region; and a plurality of source electrode pads having the same number as the plurality of source electrodes and disposed in the inactive region and each being connected to a corresponding source electrode directly. A plurality of through holes electrically connecting the plurality of source electrodes and the grounded electrode respectively are disposed in the plurality of source electrode pads.