Abstract: The present application discloses a display panel and a display apparatus. The display panel includes: a first display area and a second display area, a transmittance of the first display area is greater than a transmittance of the second display area; and a plurality of first sub-pixels located in the first display area and each of the plurality of the first sub-pixels includes a first electrode, a first light-emitting structure located on the first electrode, and a second electrode located on the first light-emitting structure, in which a ratio of a total area of first electrodes of the plurality of the first sub-pixels located in the first display area to an area of the first display area is in a range from 8% to 23%.

Abstract: A three-dimensional AND flash memory device includes a gate stack structure and a silt. The silt extends along a first direction and divides the gate stack structure into a plurality of sub-blocks. Each sub-block includes a plurality of rows, and each row includes a plurality of channel pillars, a plurality of charge storage structures, and a plurality of pairs of conductive pillars. The plurality of pairs of conductive pillars are arranged in the plurality of channel pillars and penetrate the gate stack structure, and are respectively connected to the plurality of channel pillars. Each pair of conductive pillars includes a first conductive pillar and a second conductive pillar separated from each other along a second direction. There is an acute angle between the second direction and the first direction.

Abstract: An integrated microwave photonics (IMWP) apparatus is provided using sapphire as a platform. The IMWP apparatus includes: a sapphire substrate having a step-terrace surface; and a III-V stack layer epitaxially grown on the sapphire substrate. The III-V stack layer includes: a first III-V layer disposed on the sapphire substrate; a low temperature (LT) III-V buffer layer disposed on the first III-V layer; multiple second III-V layers disposed and stacked on the LT III-V buffer layer; a third III-V layer disposed on the second III-V layers; a III-V quantum well layer disposed on the third III-V layers; and a fourth III-V layer disposed on the III-V quantum well layer. The second III-V layers are respectively annealed. A growth temperature of the LT III-V layer and a growth temperature of the III-V quantum well layer are lower than a growth temperature of each of the first, second, third and fourth III-V layers.

Abstract: A display apparatus including a main display area, a component area, and a peripheral area includes: a main sub-pixel including a main display element on a substrate to correspond to the main display area, an auxiliary sub-pixel including an auxiliary display element on the substrate to correspond to the component area, wherein the main display area and the component area have a first boundary portion, a second boundary portion, and a third boundary portion as boundary portions where at least three edges of each of the main display area and the component area are in contact with each other, and a main sub-pixel arranged at an innermost portion of the main display area and an auxiliary sub-pixel arranged at an outermost portion of the component area have a mutually identical arrangement to correspond to each of the first boundary portion, the second boundary portion, and the third boundary portion.

Abstract: A display device includes a plurality of subpixels arranged along a first direction and a second direction crossing the first direction, where each of the subpixels includes an emission area, a plurality of electrodes located in the emission area, extending in the first direction and spaced from one another in the second direction, and a plurality of light-emitting elements located on electrodes spaced from one another in the second direction, and where the subpixels include a plurality of first-type subpixels and a plurality of second-type subpixels, the second-type subpixels having a different number of electrodes in the emission area from the first-type subpixels.

Abstract: Disclosed is a light-emitting diode chip. A first electrode and a second electrode of the light-emitting diode chip face towards a front side. A back side of a first conduction layer is directly connected to a front side of a base. A portion of the first conduction layer is at least exposed from the front side to be used for the arrangement of the first electrode. A portion of a second conduction layer is at least exposed from the front side to be used for the arrangement of the second electrode. The exposed first conduction layer and the exposed second conduction layer are of equal height. An insulating layer extending from a recess covers a back side of the second conductive layer.

Abstract: A display panel disposes a first display area and a second display area. The display panel includes a plurality of OLED pixel units disposed in the first display area, and a plurality of Micro LED pixel units disposed in the second display area. By replacing the OLED pixel units corresponding to the under-screen camera or used to display a fixed picture with the Micro LED pixel units, the image quality of an under-screen camera can be improved, and the burning screen problem caused by displaying the same picture for a long time can be solved.

Abstract: Semiconductor devices with antennas and electromagnetic interference (EMI) shielding, and associated systems and methods, are described herein. In one embodiment, a semiconductor device includes a semiconductor die coupled to a package substrate. An antenna structure is disposed over and/or adjacent the semiconductor die. An electromagnetic interference (EMI) shield is disposed between the semiconductor die and the antenna structure to shield at least the semiconductor die from electromagnetic radiation generated by the antenna structure and/or to shield the antenna structure from interference generated by the semiconductor die. A first dielectric material and/or a thermal interface material can be positioned between the semiconductor die and the EMI shield, and a second dielectric material can be positioned between the EMI shield and the antenna structure.

Abstract: Light emitting diode (LED) constructions comprise an LED having a pair of electrical contacts along a bottom surface. A lens is disposed over the LED and covers a portion of the LED bottom surface. A pair of electrical terminals is connected with respective LED contacts, are sized larger than the contacts, and connect with the lens material along the LED bottom surface. A wavelength converting material may be interposed between the LED and the lens. LED constructions may comprise a number of LEDs, where the light emitted by each LED differs from one another by about 2.5 nm or less. LED constructions are made by attaching 2 or more LEDs to a common wafer by adhesive layer, forming a lens on a wafer level over each LED to provide a rigid structure, removing the common wafer, forming the electrical contacts on a wafer level, and then separating the LEDs.

Abstract: Embodiments of the present disclosure relate to a thin film transistor array substrate and display device in which a semiconductor layer has a heterogeneous conductorization structure including heterogeneous conductorization portions having different electrical conductivity, and the gate insulator layer is not etched enough to expose the semiconductor layer between the source electrode part and the gate electrode part and between the drain electrode part and the gate electrode part, so that the possibility of damage to the semiconductor layer can be eliminated or reduced.

Abstract: The disclosure relates to a method for regulating photocurrent of IGZO based on a two-dimensional black phosphorus material, and belongs to the field of semiconductor devices. The disclosure provides a method for preparing an IGZO-black phosphorus heterostructure by dry transfer technology, and by changing the contact mode between IGZO and black phosphorus, photocurrent response of the IGZO to different laser light wavelengths can be regulated. In the method, both a channel and electrodes of the IGZO are magnetron sputtered by means of masks, and the method has good repeatability and can realize preparation of large-area multi-devices. A black phosphorus sample is prepared by a mechanical exfoliation method, and has controllable thickness and size. A heterojunction is prepared by dry transfer technology, and the technology is easy to operate and highly controllable. The disclosure is beneficial to promote development of IGZO thin films in the micro-nano field and the semiconductor industry.

Abstract: A semiconductor device includes first channel layers disposed over a substrate, a first source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the first channel layers, a gate electrode layer disposed on the gate dielectric layer and wrapping each of the first channel layers, and a liner semiconductor layer disposed between the first channel layers and the first source/drain region.

Abstract: A photodetector includes a photodiode that has a germanium junction formed between an n-doped region and a p-doped region. The germanium junction is formed to have an input interface at a light input end of the germanium junction. The input interface has a substantially flat shape or a convex-faceted shape. The photodetector also includes an input waveguide connected to the input interface of the germanium junction. The input waveguide has a substantially linear shape along a lengthwise centerline of the input waveguide. The input waveguide is oriented so that the lengthwise centerline of the input waveguide is positioned at a non-zero angle relative to input interface of the germanium junction.

Abstract: A display panel and driving method thereof and a display apparatus. The display panel has a first display area and a second display area, a transmittance of the first display area is greater than a transmittance of the second display area, the display panel includes an array substrate, and a light-emitting layer arranged on the array substrate and includes a first sub-pixel density distribution area arranged corresponding to the first display area, a second sub-pixel density distribution area arranged corresponding to the second display area and a third sub-pixel density distribution area on at least one of the first display area and the second display area and arranged adjacent to a boundary between the first display area and the second display area, in which a third sub-pixel distribution density is between a first sub-pixel distribution density and a second sub-pixel distribution density.

Abstract: The present application discloses a display panel and a display apparatus, where the display panel has a first display area and a second display area, and a boundary is provided between the first display area and the second display area, and the display panel comprises: a pixel unit layer comprising a first pixel group positioned in a first display area, a second pixel group positioned in a second display area and a third pixel group positioned in at least one of the first display area and the second display area and adjacent to a boundary, wherein the first pixel group comprises a plurality of first pixel units, and the first pixel unit comprises a first sub-pixel and a first virtual sub-pixel; the third pixel group comprises two third pixel units which correspond to one first pixel unit.

Abstract: A device for detecting UV radiation, comprising: a SiC substrate having an N doping; a SiC drift layer having an N doping, which extends over the substrate; a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region having a P doping, which extends in the drift layer; and an ohmic-contact region including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region. The ohmic-contact region is transparent to the UV radiation to be detected.

Abstract: The present disclosure relates a display panel. The display device includes a plurality of first pixels disposed in a first area, a plurality of second pixels disposed in a second area surrounded by the first area, and a plurality of third pixels disposed in a third area between the first area and the second area.

Abstract: A photodetector including: an amplification region that includes a PN junction provided in a depth direction in a semiconductor layer and that is to be electrically coupled to a cathode; a separation region that defines a pixel region including the amplification region; a hole accumulation region that is provided along a side surface of the separation region and that is to be electrically coupled to an anode; and a gate electrode provided in a region between the amplification region and the hole accumulation region and stacked over the semiconductor layer with a gate insulating film interposed therebetween.

Abstract: According to one embodiment, a display device comprises a pixel circuit, an insulating layer that covers the pixel circuit and includes a first trench, a first electrode disposed on the insulating layer, an organic layer disposed on the first electrode, a second electrode disposed on the organic layer, and a first filling layer that fills at least a part of the first trench. An end portion of the first electrode is located inside the first trench and is covered with the first filling layer.

Abstract: Light detecting structures comprising a Si base having a pyramidal shape with a wide incoming light-facing pyramid bottom and a narrower pyramid top and a Ge photodiode formed on the Si pyramid top, wherein the Ge photodiode is operable to detect light in the short wavelength infrared range, and methods for forming such structures. A light detecting structure as above may be repeated spatially and fabricated in the form of a focal plane array of Ge photodetectors on silicon.