Abstract: The invention discloses a display panel, comprising: a first substrate including a display region and a peripheral region adjacent to each other; a plurality of pixel units disposed on the first substrate and located in the display region; a planarization layer disposed on the first substrate and located in the display region and the peripheral region; and an organic passivation layer disposed on the first substrate, covering the planarization layer and located in the display region and the peripheral region; wherein the planarization layer further comprises a first region planarization layer located in the display region, and a second region planarization layer located in the peripheral region, the first region planarization layer is formed with a first sidewall in a boundary region between the display region and the peripheral region, and a height of the first sidewall is greater than a height of the first region planarization layer.

Abstract: A display device according to an embodiment of the present invention includes: an insulating sheet provided from a display region to a drive portion forming region, including, in a curved region, a first film-thickness region having a first film thickness thinner than a film thickness at the display region and a film thickness at the drive portion forming region, and including a first step portion disposed between the display region and the first film-thickness region and a second step portion disposed between the drive portion forming region and the first film-thickness region, first and second wiring lines crossing the first step portion and the second step portion above the insulating sheet and electrically connecting a pixel array portion with a drive portion, and an insulating wall extending from the first step portion to the second step portion between the first wiring line and the second wiring line.

Abstract: An integrated optical device fabricated in the back end of line process located within the vertical span of the metal stack and having one or more advantages over a corresponding integrated optical device fabricated in the silicon on insulator layer.

Abstract: An organic light-emitting diode display panel includes a substrate and a light-emitting pixel array disposed on the substrate, and the light-emitting pixel array includes a plurality of light-emitting pixels. Each of the plurality of light-emitting pixels comprises a convex structure layer, a light-emitting element, a planarization layer and a microlens structure which are sequentially stacked on the substrate. The convex structure layer comprises at least one convex structure which is convex in a direction facing away from the substrate and at least one convex surface where each of the at least one convex structure is in contact with the light-emitting element. The microlens structure and convex structure are aligned each other that their vertical projections on the substrate overlap with a vertical projection of the light-emitting element on the substrate.

Abstract: An apparatus is described that includes a light emitting diode (LED) display and a sensor. The LED display includes pixel emissive areas that are each coupled by a corresponding conductive trace to a corresponding pixel circuit that drives the respective pixel emissive area. The LED display has a high density region, a low density region, and a transition region between the high density region and the low density region. A pattern of the pixel circuits in the transition region matches a pattern of pixel circuits in the low density region, with at least some conductive traces that couple pixel emissive areas to pixel circuits in the transition region being longer than corresponding conductive traces that couple pixel emissive areas to pixel circuits in the low density region. The sensor is arranged to receive electromagnetic radiation transmitted through the low density region of the LED display.

Abstract: In examples, a sensor package includes a semiconductor die, a sensor on the semiconductor die, and a mold compound covering the semiconductor die. The mold compound includes a sensor cavity over the sensor. The sensor package includes a polymer film member on the sensor and circumscribed by a wall of the mold compound forming the sensor cavity. The polymer film member is exposed to an exterior environment of the sensor package.

Abstract: According to an embodiment, a single photon detector configured to reduce a dark current comprises a buffer layer, a light absorption layer, a grading layer, an electric field control layer, and a window layer sequentially formed on a substrate. An active area may be formed in the window layer. A barrier junction may be formed through the window layer up to at least a portion of the light absorption layer, around the active area.

Abstract: A method for manufacturing an image display device includes: preparing a substrate, the substrate comprising a semiconductor layer, the semiconductor layer comprising a light emitting layer, the semiconductor layer being formed on a first substrate; bonding the semiconductor layer to a second substrate, the second substrate comprising a circuit that comprises a circuit element; forming a light emitting element by etching the semiconductor layer; forming an insulating film covering the light emitting element; forming a via reaching the circuit through the insulating film; and electrically connecting the light emitting element and the circuit element through the via, the via connecting the light emitting element and the circuit element provided in different layers.

Abstract: On a substrate, a wiring layer is arranged by sequentially stacking a first insulation film, a lower electrode, a second insulation film, an intermediate electrode, a third insulation film, and an upper electrode in this order. A capacitor includes a first capacitor having the lower electrode and the intermediate electrode, and a second capacitor having the intermediate electrode and the upper electrode. The first capacitor and the second capacitor are connected in parallel to each other by electrically connecting the lower electrode and the upper electrode. Further, the intermediate electrode has a higher potential than the lower layer electrode and the upper electrode.

Abstract: A display device capable of reducing a non-display area is disclosed. The disclosed display device includes a first through hole not overlapping with an organic cover layer surrounding at least one hole area disposed within an active area, and a second through hole passing through a substrate. Accordingly, it is possible to minimize a bezel area, which is a non-display area, and to prevent damage to a light emitting stack caused by a stripping process.

Abstract: In a floating gate semiconductor nanostructure biosensor and a method for manufacturing the biosensor, the nanostructure biosensor includes a substrate, an insulating layer, a nanostructure, a source electrode and a drain electrode, a floating gate and a biological sensing material. The insulating layer is formed on the substrate. The nanostructure is protruded from the insulating layer. The source electrode and the drain electrode are formed on the insulating layer and dispose the nanostructure therebetween. The floating gate has a metal pattern or a polysilicon pattern, and extends with contacting the nanostructure. The biological sensing material has a first end combined with an immobile molecule on the floating gate, and a second end combined with a bio molecule.

Abstract: An image device includes a first active region and a second active region disposed on a substrate. Each of the first active region and the second active region includes a gate insulating layer disposed on the substrate and a gate electrode disposed on the gate insulating layer. At least one of the first active region and the second active region further includes a first passivation layer containing fluorine (F) disposed between the gate insulating layer and the gate electrode. A concentration of fluorine in the gate insulating layer is higher than a concentration of fluorine in the gate electrode.

Abstract: An image sensor package includes a plastic packaging structure; and a transparent plastic window disposed in the plastic packaging structure, wherein material of the transparent plastic window includes plastic and an additive, and the additive is selected from the group consisting of germanium, silicon, potassium bromide, potassium chloride, sodium chloride, zinc sulfide, and zinc selenide.

Abstract: A hyperbolic metamaterial assembly comprising alternating one or more first layers and one or more second layers forming a hyperbolic metamaterial, the one or more first layers comprising an intrinsic or non-degenerate extrinsic semiconductor and the one or more second layers comprising a two-dimensional electron or hole gas, wherein one of in-plane or out-of-plane permittivity of the hyperbolic metamaterial assembly is negative and the other is positive.

Abstract: The present disclosure provides a display panel including gate lines and data lines disposed on a base substrate. The base substrate is further divided into pixel regions including transparent regions and pixel circuit regions having pixel circuits. The pixel circuit regions of at least two adjacent pixel regions are disposed next to each other and form a pixel circuit joining region, so that the pixel circuit regions of a same row or a same column of the pixel regions are arranged spaced apart from each other. Two adjacent pixel circuit joining regions are spaced apart by the transparent regions.

Abstract: A display panel and an electronic equipment are provided. By setting micro light-emitting diodes in a transparent display area, the transparent display area has high light transmittance and high display brightness, and a technical problem of an inferior display performance of the display panel and the electronic equipment is prevented.

Abstract: A semiconductor component may include a semiconductor body having a first semiconductor layer and a second semiconductor layer, a first main face and a second main face, opposite from the first main face, the first main face being formed by a surface of the first semiconductor layer and the second main face being formed by a surface of the second semiconductor layer. At least one side face may join the first main face to the second main face, an electrically conducting carrier layer, which covers the second main face at least in certain regions and extends from the second main face to at least one side face of the semiconductor body. An electrically conducting continuous deformation layer may cover the second main face at least in certain regions. The electrically conducting deformation layer may have an elasticity that is identical to or higher than the electrically conducting carrier layer.

Abstract: A light-emitting device, includes: a semiconductor stack, including a top surface, wherein the top surface includes a first region and a second region which are coplanar; a current barrier layer formed on the first region, wherein the current barrier layer includes an insulating material; and a transparent conductive layer formed on the current barrier layer and the second region; and a first electrode formed on the transparent conductive layer; wherein the current barrier layer includes: an electrode region at a position corresponding to the first electrode, having a shape substantially the same as the first electrode; and a plurality of extension regions extending from the electrode region and not covered by the first electrode.

Abstract: An image sensing chip package structure includes a chip, an adhesive loop and a light-transmissible substrate member. The chip includes an image sensing region. The adhesive loop is connected to the chip, and has an inner peripheral surface that defines a plurality of protrusions which surround the image sensing region of the chip. The light-transmissible substrate member is connected to the adhesive loop oppositely of the chip to cover the image sensing region of the chip. Methods of manufacturing the image sensing chip package structures are also provided.

Abstract: The system-on-chip camera comprises a semiconductor body (1) with an integrated circuit (40), a sensor substrate (2), sensor elements (3) arranged in the sensor substrate according to an array of pixels, a light sensor (4) in the sensor substrate apart from the sensor elements, and a lens or an array of lenses (15) on a surface of incidence (30). Filter elements (11, 12, 13), which may especially be interference filters for red, green or blue, are arranged between the sensor elements and the surface of incidence.