Abstract: An inflatable divergent Fresnel lens and non-imaging CPC based non-tracking high concentration ratio solar concentrator system comprises a flexible domed divergent Fresnel lens, and an inflatable non-imaging CPC concentrator with a domed transparent top cover and a flat transparent bottom cover. Where, the flexible domed divergent Fresnel lens is attached onto the said domed transparent cover of the said inflatable non-imaging CPC concentrator. When in operation, the oblique incident sunlight including beam light and diffuse light onto the domed divergent Fresnel lens, is deflected to change its direction, and consequently change its original incident angle relative to the said CPC concentrator from large to small, then eventually fall in the acceptance half-angle to be concentrated by the said CPC in large concentration ratio.

Abstract: A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals in the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.

Abstract: A memory device is provided. The memory device includes an array of memory cells arranged in a plurality of rows, a plurality of word lines respectively coupled to the plurality of rows of the memory cells; and a peripheral circuit coupled to the word lines and configured to perform multi-pass programming on a selected row of memory cells coupled to a selected word line of the word lines. The multi-pass programming includes a plurality of programming passes, each of the programming passes having a programming operation and a verify operation. To perform the multi-pass programming, the peripheral circuit is configured to, in a non-last programming pass, perform a negative gate stress (NGS) operation on each memory cell in the selected row of memory cells between the programming operation and the verify operation.

Abstract: Shade house for casting an adjustable shadow over a surface, the shade house including: at least one frame extending in a longitudinal direction; a first set of photovoltaic panels mounted on the frame substantially orthogonally to a same orientation axis; a second set of opaque panels, for preference photovoltaic, mounted on the frame and movable in longitudinal translation relative to the frame at least between an open configuration, in which the panels are at least partially superposed over the panels in a view along the orientation axis, and a closed configuration, in which the panels at least partially extend beyond the panels in a view along the orientation axis; and an actuation system configured to actuate the second set at least from the open configuration to the closed configuration, and vice versa, the actuation system including pulleys mounted on the frame.

Abstract: A motor drive device of an embodiment includes a first drive circuit, a second drive circuit, a first detection circuit, a second detection circuit, a third detection circuit, a fourth detection circuit, and an output circuit. The first drive circuit drives a first phase of a motor. The second drive circuit drives a second phase of the motor. The first detection circuit detects a first anomaly of the first phase. The second detection circuit detects the first anomaly of the second phase. The third detection circuit detects a second anomaly of the first phase. The fourth detection circuit detects the second anomaly of the second phase. The output circuit outputs an occurred anomaly as a flag signal based on results of detection by the first to fourth detection circuits.

Abstract: An electronic device includes: a board that includes an insulating film, a wiring layer and a via provided in the insulating film, and a plurality of power source pads and a plurality of ground pads which are provided in the insulating film so as to surround a capacitor region in which a capacitor is provided and to which a plurality of bumps is coupled; and an electronic component that is mounted at the board, and is electrically coupled to the plurality of power source pads and the plurality of ground pads through the wiring layer and the via. Further, a method for supporting design of the electronic device is provided.

Abstract: A hybrid solar thermal and photovoltaic power generation system with a pumped thermal storage system with a mode switchable heat pump/heat engine apparatus realizes utility scale stabilized power generation with low cost thermal storage, ultra-high conversion efficiency with hybrid solar thermal and photovoltaic cogeneration system, and low capital cost with the mode switchable heat pump/heat engine apparatus. The present system heat, cool, and supply power to buildings simultaneously over the four seasons. The synergistically combination of the hybrid solar thermal and photovoltaic cogeneration and the pumped thermal storage of the present invention is to make a transformative change of power supply landscape.

Abstract: Memory might include a plurality of series-connected non-volatile memory cells, a plurality of series-connected first field-effect transistors connected in series with the plurality of series-connected non-volatile memory cells, and a second field-effect transistor, wherein the channel of the second field-effect transistor is capacitively coupled to channels of the plurality of series-connected first field-effect transistors.

Abstract: An Internet of Things (IoT) apparatus including a plurality of boards and one or more connectors to couple IoT modules to one or more of the plurality of boards and to couple the plurality of boards to each other. The connectors include stacking connectors on both sides of at least some of the boards and at least some of the IoT modules to be coupled to the boards.

Abstract: Integrated circuit assemblies, electronic systems, and methods for fabricating the same are disclosed. An integrated circuit assembly is formed by thermally contacting at least two integrated circuit packages to opposite sides of a shared heat dissipation device. In one embodiment, the at least two integrated circuit packages are electrically attached to an electronic card to form an intermediate integrated circuit assembly. In a further embodiment, the integrated circuit assembly includes at least one intermediate integrated circuit assembly electrically attached to an electronic board.

Abstract: A memory macro includes a first memory cell array, a first tracking circuit, a first and a second transistor. The first memory cell array includes rows of memory cells and columns of memory cells. The first tracking circuit includes a first set of memory cells configured as a first set of loading cells responsive to a first control signal, a second set of memory cells configured as a first set of pull-down cells responsive to a second control signal, and a first tracking bit line coupled to the first and second set of memory cells. The first set of pull-down cells or loading cells is configured to track a memory cell of the first memory cell array. The first and second transistor are coupled to the first tracking bit line, and configured to charge the first tracking bit line to a pre-charge voltage level responsive to a tracking enable signal.

Abstract: A method of attaching an integrated circuit (IC) package to a printed circuit board (PCB) with a set of direct current (DC) blocking capacitors includes: applying a conductive attachment material to a first set of attachment pads located on a first planar surface of the IC package; aligning the set of DC blocking capacitors in accordance with corresponding positions of the first set of attachment pads; attaching the set of DC blocking capacitors to the IC package by: positioning the aligned set of DC blocking capacitors so that a first surface of a first DC blocking capacitor of the set of DC blocking capacitors is adjacent to a corresponding attachment pad of the first set of attachment pads; and connecting the conductive attachment material to the IC package and to the first surface of the first DC blocking capacitor to create an IC package assembly.

Abstract: A sensor module for a vehicle includes a housing structured to be mounted along a sidewall of a cargo door, and a pressure-sensitive sensor mounted in the housing so as to be extendible from the housing and retractable into the housing. A sensor deployment mechanism is operatively coupled to the sensor and is structured to be operable to extend the sensor from the housing and to retract the sensor into the housing.

Abstract: An electronic device package is disclosed. The electronic device package includes a board on which an electronic device is mounted, a molded portion formed to cover the electronic device on the board, and a conductive layer disposed on a surface of the molded portion and extended in a trench formed on the board.

Abstract: One embodiment provides a drive system that includes a drive device with at least one drum for spooling at least one wire rope. A mounting device is connected to the drive device and a single-axis tracker. At least one partial pulley is connected to a torque tube. The at least one partial pulley is configured to accept the at least one wire rope and to transfer leveraged drive forces to the torque tube.

Abstract: A data storage system includes a plurality of memory dies and interface circuitry, including a receiver configured to receive pulses of a read clock signal; an I/O contact pad coupled to the receiver via a signal path of an interface channel; and on-die-termination (ODT) circuitry coupled to the I/O contact pad and the receiver. The ODT circuitry includes a plurality of resistor pairs, each including a pull-up resistor selectively coupled to the signal path via a first switch, and a pull-down resistor selectively coupled to the signal path via a second switch; and ODT control circuitry configured to enable ODT at the interface circuitry by causing each of the switches to be closed during a first stage of the read operation, and disable ODT at the interface circuitry by causing each of the switches to be open during a final stage of the read operation.

Abstract: The present disclosure is related to a power module power structure and an assembling method thereof. The power module structure includes a first printed-circuit-board (PCB) assembly, a second PCB assembly, and a conductive connection component. The first PCB assembly includes a first circuit board, a power switch and a magnetic component. The first circuit board includes a first side, a second side and a through hole. The power switch is disposed on the first circuit board. The magnetic component includes a first magnetic core and a second magnetic core fastened on the first circuit board through the through hole. The second PCB assembly includes a second circuit board having a third side, a fourth side and at least one opening. The second magnetic core is exposed through the opening. The conductive connection component is disposed and electrically connected between the first PCB assembly and the second PCB assembly.

Abstract: The present application relates to the technical field of memories, in particular to a flash memory programming check circuit, comprising: a memory cell, wherein a bit line is led out from the memory cell, and a pulse sequence signal with a gradually increasing voltage amplitude is applied to the bit line, so that during a high level period of the pulse sequence signal, the memory cell undergoes a program operation, and during a low level period of the pulse sequence signal, the memory cell undergoes a read detection operation; a pulse sequence generation unit used to generate the pulse sequence signal with a gradually increasing voltage amplitude to the bit line; and a reset unit used to control, when a programming control signal starts to be generated, a voltage of the bit line to drop.

Abstract: The present invention includes a phase angle detection unit generating a phase angle signal switched at a timing at which a cogging torque generated with the rotation of a rotor of a brushless DC motor reaches near a peak on a negative side hindering the rotation of the rotor, an inverter circuit energizing coils of respective phases of the brushless DC motor by switching elements according to an input of a driving signal, an energization period calculation unit calculating an energization period Tw from a target rotation speed set for the brushless DC motor, and a drive control unit energizing the coils sequentially by outputting the driving signal to the respective switching elements for each energization period, gradually increasing a duty of the driving signals to the switching elements at a start of each energization period, and decreasing the duty after the phase angle signal is switched.

Abstract: A drain cleaning machine includes a brushless direct current (DC) motor configured to rotate a snake about the snake axis. An electronic processor is configured to control power switching elements to drive the brushless DC motor. In a first operating range when a load experienced by the brushless DC motor is less than or equal to a predetermined load, the electronic processor is configured to control the power switching elements to drive the brushless DC motor at an approximately constant speed regardless of the load experienced by the brushless DC motor. In a second operating range when the load experienced by the brushless DC motor is greater than the predetermined load, the electronic processor is configured to control the power switching elements to drive the brushless DC motor at a decreasing speed as the load experienced by the brushless DC motor increases.