Abstract: A power conversion module and method of forming the same includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module. The motherboard includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node and a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power module includes a first daughterboard mounted on the first surface of the motherboard and a second daughterboard mounted on the second surface of the motherboard.

Abstract: The present invention relates to a motor controller providing a dual-channel func-tional-safety (FS) safe-torque-off (STO) function when controlling a motor. The motor controller includes an inverter with low-side switches and high-side switches, a low-side gate drive connected to the low-side switches, a high-side gate drive connected to the high-side switches, a first functional-safety safe-torque-off circuit connected to the high-side gate drive and a second functional-safety safe-torque-off circuit connected to the low-side gate drive, and a non-reinforced high-voltage isolation barrier.

Abstract: The internal temperate of a transistor is determined by detecting a voltage though a terminal of an integrated circuit that is also used by an overcurrent detection circuit of the integrated circuit for detecting an overcurrent condition of the system. The overcurrent detection circuit is coupled to a current electrode of the transistor through the terminal of the integrated circuit. A determination of internal temperature is based on a voltage measurement taken from the terminal during an on phase of the transistor. The voltage measurement is converted to a digital value and is used to determine an internal temperature of the transistor.

Abstract: A semiconductor memory device includes first and second memory cell transistors between first and second select transistors, third and fourth memory cell transistors between third and fourth select transistors, a first word line for first and third memory cell transistors, a second word line for second and fourth memory cell transistors, first to fourth selection gate lines respectively for first through fourth select transistors, a bit line, and a source line. During a read operation, while a voltage applied to the second word line is boosted, voltages applied to the first word line and the third and fourth selection gate line are also boosted, after which the voltage applied to the first word line is lowered, and the third and fourth selection gate lines are discharged. After the time the third and fourth selection gate lines are discharged, voltages applied to the bit line and the source line are boosted.

Abstract: Some embodiments include apparatus and methods using access lines, first memory cells coupled to an access line of the access lines, and a control unit including circuitry. The control unit is configured to apply a first voltage to the access line; check first threshold voltages of the first memory cells after applying the first voltage; obtain offset information based on a determination that at least one of the first threshold voltages is greater than a selected voltage; generate a second voltage, the second voltage being a function of the first voltage and the offset information; and apply the second voltage to one of the access lines during an operation of storing information in second memory cells.

Abstract: A frame for supporting a photovoltaic module (PV) includes a plurality of sidewalls, which are arranged to support the PV module at a spaced distance from an installation surface. The sidewalls define an interior volume having an open top and open bottom. One sidewall has a plurality of openings defined therethrough along a portion of a length thereof. A plenum is disposed adjacent to an exterior surface of the first sidewall and extends along at least the portion of the length of the first sidewall having the plurality of openings defined therethrough. The plenum has an inlet port for receiving a flow of warmed air from a source of warmed air, and is configured to distribute the flow of warmed air through at least some of the plurality of openings in the first sidewall and into the interior volume.

Abstract: In certain aspects, a memory device includes a memory cell array having rows of memory cells, word lines respectively coupled to the rows of memory cells, and a peripheral circuit coupled to the memory cell array through the word lines. Each memory cell is configured to store a piece of N-bits data in one of 2N levels, where N is an integer greater than 1. The level corresponds to one of 2N pieces of N-bits data. The peripheral circuit is configured to program, in a first pass, a row of target memory cells, such that each of the row of target memory cells is programmed into one of 2N/m intermediate levels based on the piece of N-bits data to be stored in the target memory cell, where m is an integer greater than 1. The peripheral circuit is also configured to program, in a second pass after the first pass, the row of target memory cells, such that each target memory cell is programmed into one of the 2N levels based on the piece of N-bits data to be stored in the target memory cell.

Abstract: Provided is a high-density multi-component package comprising a first module interconnect pad and a second module interconnect pad. At least two electronic components are mounted to and between the first module interconnect pad and the second module interconnect pad wherein a first electronic component is vertically oriented relative to the first module interconnect pad. A second electronic component is vertically oriented relative to the second module interconnect pad.

Abstract: An electronic component module includes a board, an electronic component, a sealing portion, a metal layer, and a magnetic layer. The board has a first main surface. The electronic component is provided on a first main surface of the board. The sealing portion seals the electronic component. The metal layer covers the sealing portion. The magnetic layer is provided between the sealing portion and the metal layer. The magnetic layer has a magnetic main body and a first cover sheet. The first cover sheet is provided between the magnetic main body and the metal layer. The first cover sheet has a first main surface and a second main surface. The first main surface faces the magnetic main body. The second main surface faces the metal layer. The second outer peripheral end of the second main surface is located inside the first outer peripheral end of the first main surface.

Abstract: A thermoelectric conversion material includes: a base material that is a semiconductor composed of a base material element; a first additional element that is an element different from the base material element, has a vacant orbital in a d orbital or f orbital located internal to an outermost shell of the first additional element and forms a first additional level in a forbidden band of the base material; and a second additional element that is an element different from both of the base material element and the first additional element and forms a second additional level in the forbidden band of the base material. A difference is 1 between the number of electrons in an outermost shell of the second additional element and the number of electrons in at least one outermost shell of the base material element.

Abstract: In an actuator, an unnecessarily large load is prevented from being applied to a shaft and a workpiece. There are included a force sensor, an output of which is according to a force applied to a connecting member connected to the shaft, an amplifier that amplifies the output of the force sensor, and a low-pass filter, and a load applied to the shaft is detected based on an output from the amplifier until the shaft or a member associated with the shaft comes in contact with another member, and thereafter, the load applied to the shaft is detected based on an output from the low-pass filter.

Abstract: Methods, systems, and devices for programming techniques for polarity-based memory cells are described. A method may include writing memory cells to an intermediate state based on receiving a write command. Writing the intermediate state may include applying a first pulse having a first polarity to the memory cell. The method may include isolating a first access line coupled with the memory cell from a voltage source based on applying the first pulse. The method may also include applying a second pulse to a second access line coupled with the memory cell based on isolating the first access line.

Abstract: Disclosed are a photoelectric conversion device, and a sensor and an electronic device including the same. The photoelectric conversion device may include a first electrode and a second electrode and a photoelectric conversion layer between the first electrode and the second electrode. The photoelectric conversion layer includes a first material and a second material, which form a pn junction, and a third material that is different from the first material and the second material. The third material is configured to modify a distribution of energy levels of the first material or the second material.

Abstract: According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate.

Abstract: A power adapter includes a first output port, a second output port, a motherboard, a first flyback power module, a second flyback power module, a bus capacitor and an EMI module. The first flyback power module has a first circuit board and is electrically connected to the first output port. The second flyback power module has a second circuit board and is electrically connected to the second output port. The EMI module has a third circuit board and is arranged on the motherboard. The first circuit board and the second circuit board are arranged in parallel with each other, and are arranged substantially perpendicular to the motherboard on a first side of the motherboard.

Abstract: An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.

Abstract: A controller is adapted to be coupled to a brushless direct current (DC) motor and includes an analog-to-digital converter (ADC), a computing device, and a driver. The ADC is configured to receive an analog back electromotive force (BEMF) waveform from the brushless DC motor and sample the analog BEMF waveform to produce a digital BEMF waveform. The computing device is coupled to the ADC and is configured to receive the digital BEMF waveform and determine a position and a speed of the rotor based on the digital BEMF waveform. The driver is coupled to the ADC and the computing device and is configured to receive the position and the speed of the rotor and provide a drive signal based on the position and the speed of the rotor of the brushless DC motor.

Abstract: Examples include a method of control implemented in a variable speed drive for controlling an electric motor during backspin, wherein the method includes: determining, by the variable speed drive, a mechanical power value occurring at a backspin speed and an estimated load torque; determining, by the variable speed drive, a specific electrical losses profile occurring at a motor flux level, wherein the specific electrical losses profile coincides with the mechanical power value; determining, by the variable speed drive, a flux reference and a speed reference to be applied to the motor to coincide with the specific electrical losses profile; and controlling, by the variable speed drive, the backspin speed of the motor to maintain the coincidence with the specific electrical losses profile.

Abstract: In a drive system and method for operating a drive system, in which the drive systems includes an electromagnetically operable brake, an electric motor, e.g., a three-phase motor, and an electronic circuit, the brake has an energizable coil, e.g., a brake coil, the electronic circuit has a rectifier, an upper controllable semiconductor switch, a freewheeling diode, and a varistor, a direct voltage provided by a rectifier is able to be made available by closing or by a pulse-width-modulated actuation of an upper controllable semiconductor switch of the coil, and by opening the upper controllable semiconductor switch, a current driven by the coil in the de-excitation of the coil is freewheeling and/or flowing through the freewheeling diode and the varistor or through a component connected in parallel with the varistor.

Abstract: A compressor assembly includes a compressor motor having a main winding coupled with a line terminal to receive power from a line voltage source, and an auxiliary winding. The assembly includes first and second capacitors each coupled between the line terminal and the auxiliary winding, a first relay to selectively couple the first capacitor and the second capacitor in parallel, a second relay coupled to selectively inhibit the supply of power from the line voltage source to the auxiliary winding via the first capacitor, and a control circuit configured to close the first relay in response detection of excess load condition criteria, and to subsequently open the first relay in response to detection of normal load condition criteria. The excess load condition criteria and the normal load condition criteria each include at least one of a voltage of the main winding and a voltage of the auxiliary winding.