Abstract: A measurement device for in-situ measurement of processing parameters, in accordance with the present invention, includes a semiconductor wafer having at least one processed chip formed thereon. The processed chip further includes at least one sensor for measuring process parameters. A memory storage device for storing the process parameters as the process parameters are measured by the at least one sensor is also included. A timing device is provided for tracking the process parameters as a function of time, and a power supply is included for providing power to the at least one sensor, the memory storage device and the timing device. Also, a method is described for making measurements with the measurement device.

Abstract: A method and an apparatus for providing non-contact measurement of waveforms proximate to a surface of a sample. In one embodiment, the described apparatus includes a composite probe waveform generator configured to provide a composite probe waveform having a plurality of overlapping component probe waveforms. Each of the overlapping component probe waveforms have a repetition rate substantially equal to the repetition rate of the sample waveform to be measured from the sample. The apparatus includes a cantilever with a signal path to carry the composite probe waveform to a position above the sample surface where the sample waveform is to be measured. In one embodiment, each of the component probe waveforms of the composite probe waveform is modulated at a frequency near a mechanical resonance frequency of the cantilever.

Abstract: An assembly ring includes a collar for removable assembly of the ring on a test head. The assembly ring further includes a disk having an open central portion and meant for supporting a periphery of a wafer, which provides an interface of electrical contact transfer between a test head and a circuit to be tested. A rotatable connection including a ball bearing is provided between the disk and the collar.

Abstract: A test fixture assembly apparatus includes a removable loading plate with attached loading towers. The loading towers have guide plate shoulders oriented in a stair step fashion. The test fixture includes a bottom plate, plural guide plates and a target plate. The guide plates are removably loaded onto the loading towers with the towers extending through holes bored through the guide plates and sized such that the guide plates rest at a predetermined level on guide plate shoulders. The test fixture is fixed in place with cylindrical separator posts having slots that engage aligned notches on the guide plates and which are secured to the bottom and target plates. The loading plate and the loading tower are then removed from the assembled test fixture.

Abstract: A test socket for testing a vertical surface mount packaged semiconductor device, the test socket including a test substrate, a support member, and clamps. The test substrate includes terminals which are electrically connectable to a testing device. The shape of the support member is complementary to the shape of the bottom surface of leads extending from the vertical surface mount packaged semiconductor device. The shape of the clamps is complementary to the top surface of the leads. The test substrate may also define lead alignment notches around one or more of the terminals. Upon placement of a vertical surface mount packaged semiconductor device on the test substrate, the leads are aligned with their corresponding terminals, then placed against the terminals and the support member. The clamps are then placed against the leads, biasing each of the leads against the support member and its corresponding terminal.

Abstract: Disclosed are a method and an apparatus for detecting a defect in a dielectric film. The dielectric film is electrified in an electrolyte solution containing a metal in such a manner the dielectric film is charged negative, thereby the metal is deposited on the dielectric film at a position corresponding to the defect. The detecting method has a first deposition step for forming a first metal deposit on the dielectric film in an annular form surrounding the position corresponding to the defect; and a second deposition step for forming a second metal deposit located on the position corresponding to the defect, on the dielectric film. The detecting apparatus has a vessel for accommodating the electrolyte solution; a first electrode for electrifying the dielectric film and a second electrode; and an electric power source for controlably applying a voltage to electrifying between the first electrode and the second electrode in which a value and a direction of the applied voltage is variable.

Abstract: A probe tip structure is disclosed which is obtained from a solid piece of material having a bore machined therein which extends from a first end where the probe tip is attached to a coaxial transmission line to a second end where contact points are machined therein. The inner conductor of the transmission line extends into the bore to the second end of the probe tip where another contact point is formed. All contact points are adapted to contact a device under test. A rigid insulating structure is placed within the bore of the probe tip to hold the inner conductor securely in a fixed position.

Abstract: A method and apparatus for maintaining a uniform temperature of semiconductor devices mounted on a burn-in board. A cover is positioned on the burn-in board to enclose all of the semiconductor devices mounted on the board. A plurality of such burn-in boards are then placed in a burn-in oven of conventional design for burn-in testing of the semiconductor devices. The cover prevents a non-uniform airflow along the semiconductor devices which would cause the semiconductor devices to have a non-uniform temperature distribution.

Abstract: In the contact probe 1 having an array of leads 3 densely attached to a surface of an insulative film 2, pressure contact ends are formed by one end of the leads 3 being arranged in an array along one end edge portion of the insulative film 3. Slots are formed in the one end edge portion of the insulative film 2 such that the slots 9 are open between adjacent contact ends. When the lead ends arranged in the array on the surface of the insulative film are contacted under pressure with a given electronic part, a sufficient degree of freedom of flexure of the contact ends is obtained, so that the contact ends are contacted under pressure with the external terminals of the electronic part.

Abstract: A measuring apparatus has a capacitor incorporated in a handy measuring tool electrically connected to a voltage meter, and a sharp leading end of the capacitor is brought into contact with a lead of a large scale integrated circuit device for accumulating movable electric charge induced in the presence of a charged insulating package into the capacitor so that the amount of the accumulated movable electric charge is calculated from a potential difference produced between electrodes of the capacitor.

Abstract: An apparatus and method for testing the integrity of an electrical connection (222) to a device (205) using an onboard controllable signal source (300). The onboard controllable signal source provides a test signal output (310) via an electrical signal path (305) without having to directly probe the signal path or the electrical connection. The test signal has a selectable frequency that can be selected to be harmonically unrelated to any other signal from the device. A capacitive sensor (215) positioned over the device (205) and the connector (225) detects the energy of the test signal coupled through the electrical connection. The sensor compares the detected amplitude of the test signal to a threshold value and the outcome of the comparison is indicative of the integrity of the electrical connection.

Abstract: Provided is a universal decoder test board (UDTB) capable of performing the package interface and pin scrambling functions of a conventional DUT board with a variety of different package designs. The UDTB is designed such that it is capable of interfacing with a variety of different tester interface boards, each tester interface board associated with its own hardware manufacturer tester. The UDTB significantly reduces the time and expense invested in test boards required for testing semiconductor device packages for a variety of different manufacturers'platforms by allowing a given package type to be tested with a plurality of testers on the same UDTB.

Abstract: A vehicle starting battery cold-cranking amps meter and associated method includes providing a current source, a voltage meter, a current meter and a control. The current source produces a current pulse during a brief time interval at a known magnitude that is less than rated cold-cranking amps of the vehicle starting battery being tested. The volt meter measures battery terminal voltage of the vehicle storage battery being tested while the current source is sourcing current to or sinking current from the vehicle starting battery being tested. The control determines internal impedance of the vehicle starting battery being tested from the terminal voltage of the vehicle starting battery while the current source is sourcing current to or sinking current from the vehicle starting battery being tested and determines cold-cranking amps from the internal impedance and an output of the temperature meter.

Abstract: The present invention provides an inexpensive and reliable circuit-board inspection apparatus and method applicable to a densely wired circuit board. A sensor module 50 is disposed on a pad section 38 on an inspected circuit board. The sensor module 50 is formed by integrating four sensor units 52, 54, 56, and 58 together. Each sensor unit is capacitively coupled to a plurality of corresponding pads so that a signal can be independently obtained from each sensor unit. By selecting a pad 36b of a pad section 36 and a sensor unit 54 and providing a predetermined signal between them to inspect the continuity, it can be determined whether a printed pattern 34x is open-circuited between a pad 38 b and a pad 38x. This invention enables the continuity of dense complicated and irregular printed patterns to be inspected accurately and inexpensively.

Abstract: A method for testing printed circuit boards (PCBs). The PCBs are initially transported to a reorienting apparatus that aligns the PCBs to accommodate automated test equipment (ATE). The ATE consists essentially of two stations interconnected by a conveyor. At the first station testing of PCBs occurs sequentially at two test wells that are vertically movable between respective idle and testing positions. Upon being discharged from the first test station, a predetermined number of PCBs are concatenated along the conveyor that connects the first test station to the second test station. The concatenated PCBs are delivered to the second test station that simultaneously performs a second test on the predetermined number of PCBs. Inasmuch as the first test is of a duration substantially shorter than the second test, the concatenation of a number of PCBs prior to performance of the second test compensates for the difference in respective durations.

Abstract: A method and apparatus for processing in output of an inductive sensor, including integrating the output of the inductive sensor with an integrator, having a transfer function with at least two zeros, and at least three poles having characteristic frequencies above the zeros, having a greater number of said poles than said zeros, wherein an integration is performed at frequencies above the characteristic frequencies of the poles, and low frequency noise is substantially rejected at frequencies below the poles. The inductive sensor may be, for example, a Rogowski coil.

Abstract: An apparatus for making and verifying electrical contact with the backside of a semiconductor wafer having a bulk portion covered with an insulating layer of oxide includes a contact probe, a wafer chuck having at least one probe vacuum groove and a probe aperture and a probe cylinder having a low pressure and a high pressure portion. The low pressure portion communicates with the probe vacuum groove and the probe aperture. The apparatus further includes a piston movably located between the low pressure and high pressure portions. The contact probe is attached to the piston and adapted to be protrudable from the probe aperture. The groove, aperture and low pressure portion are adapted to form a low pressure chamber with the wafer. The probe is urgeable to pierce the oxide and make electrical contact with the bulk portion of the wafer.

Abstract: Current consumption of a device under test (DUT) is measured using a tester including a device power supply (DPS) having force and return lines terminating in respective power supply terminals. The DUT is removably received by a load board having contact elements which are in electrically conductive pressure contact with the power supply terminals of the force and return lines and are connected to power supply pins of the DUT. A circuit branch including a bypass capacitor and an nMOSFET is connected between the force and return lines.

Abstract: A verification gauge for verifying the operation of an inspection system for inspecting the leads of an electronic package, particularly a ball grid array. The gauge has a predetermined mechanical relationship to a mechanical parameter of the leads of the electronic package so that when the inspection system is used to inspect the gauge, a reading will indicate whether the inspection system is properly set up for the mechanical parameter. The gauge may be configured to substantially emulate the structural configuration, including the particular size, shape and lead pattern, of the electronic package. The gauge may be used to verify the calibration or the predefined limit of the inspection system for the mechanical parameter, including lead coplanarity, lead pitch, missing lead and lead deformation parameters.

Abstract: An ultrasonic wave beam producing device scans an ultrasonic wave beam 5 across a semiconductor integrated circuit chip 2 while detecting a voltage applied across the semiconductor integrated circuit chip 2 from a constant voltage source 1. In this way the semiconductor integrated circuit chip is tested without creating electron-hole pairs.