Abstract: A method and module for programmable power management and a system on chip are disclosed. The module includes: a token ring and an operation unit. The token ring is provided with a cyclically running token and forming a clock information. The operation unit is configured to perform a corresponding power management operation according to a predetermined operation step register and the token; wherein the step register records a time sequence for performing power management operations, the time sequence being represented by the clock information.

Abstract: A method and an information handling system (IHS) for authenticating boot path updates in an IHS. The method includes initializing, by an image loader of the IHS, a current boot path associated with a first image. The method also includes detecting, by a processor of the IHS, detecting an attempt to update the current boot path to utilize a second image that is different from the first image. The method further includes, in response to detecting the attempt to update the current boot path, initializing a pre-authentication process to authenticate the second image. The method further includes, in response to the pre-authentication process authenticating the second image, updating the current boot path to utilize the second image and enabling a subsequent boot of the IHS using the second image.

Abstract: In an embodiment, a processor includes a first power rail, a first component coupled to the first power rail, and a compensation control unit. The compensation control unit is to: detect a request to change a voltage level of the first power rail by a first voltage change amount; in response to detecting the request, determine that the first voltage change amount exceeds a first threshold level associated with the first component; and in response to determining that the first voltage change amount exceeds the first threshold level, initiate a first compensation action prior to changing the voltage level of the first power rail. Other embodiments are described and claimed.

Abstract: Techniques are disclosed relating a computer system in a power-down state receiving a communication from a remote computer system and performing a task indicated by the communication. The computer system in a power-down state performs the task without transitioning from the power-down state into a power-up state. Exemplary tasks performed in the power-down state include uploading one or more files to a remote computer system, downloading one or more files from a remote computer system, deleting one or more files from the computer system, accessing input/output devices, disabling the computer system, and performing a memory check on the computer system.

Abstract: An in-band remote access controller access system includes a remote access controller. A Basic Input/Output System (BIOS) that is coupled to the remote access controller and includes a BIOS storage that stores a configuration table including a plurality of function definitions that are configured to provide for the management of an in-band communication session with the remote access controller. A secure storage system includes boot security information that is configured to provide for the performance of a managed boot of the BIOS. A processing system provides, to the remote access controller using at least one of the plurality of function definitions, application security information provided by an application requesting access to the remote access controller. The remote access controller authenticates the application security information using the boot security information and, in response, establishes a communication session with the application.

Abstract: An apparatus includes a circuit that has a normal mode of operation and a low-power mode of operation. The circuit consumes more power in the normal mode of operation than in the low-power mode of operation. The apparatus further includes a power-supply circuit. The power-supply circuit provides a normal supply voltage to the circuit in the normal mode of operation. The power-supply circuit includes a non-linear circuit to provide a compressed supply voltage to the circuit in the low-power mode of operation, wherein the normal supply voltage is greater than the compressed supply voltage.

Abstract: A method of transitioning between a sleep mode for a storage device to reduce power consumption and to increase responsiveness includes collecting one or more recent parameters related to host-storage device workload. The host-storage device workload is correlated to project a next host idle time. A transition between a storage sleep mode is determined.

Abstract: A data storage device includes a power input port, a nonvolatile memory module, a controller for the nonvolatile memory module, and a power analyzer electrically coupled to the power input port. The power analyzer is configured to receive input power from the power input port, determine power data associated with the data storage device based on the input power, and store the power data in a memory of the power analyzer.

Abstract: The disclosed method may include (1) monitoring, while a computing device receives power from an external power supply, (A) the amount of power consumed by the computing device and (B) the amount of power provided to the computing device by the external power supply, (2) detecting that the amount of power provided to the computing device exceeds the amount of power consumed by the computing device by at least a certain threshold, (3) determining, based on the amount of power provided to the computing device exceeding the amount of power consumed by the computing device by the certain threshold, that the computing device is experiencing a malfunction, and then (4) mitigating potential damage to the computing device due to the malfunction by at least partially reducing the amount of power provided to the computing device from the external power supply. Various other apparatuses, systems, and methods are disclosed.

Abstract: According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.

Abstract: A circuit system may include a first stage circuit configured to generate two pairs of signals in response to an input signal. The circuit system may also include a second stage circuit that is configured to combine a first signal of a first pair with a first signal of a second pair to generate a first combined signal, and to combine a second signal of the first pair with a second signal of the second pair to generate a second combined signal. Transistors of the second stage circuit may be sized in relation to transition timings of the first and second pairs of signals such that skew and duty cycle distortion is minimized between the first and second combined signals.

Abstract: Data storage system power shedding for vaulting and/or backup is provided herein. A data storage system can include a processor that executes computer-executable components, at least one memory, and a basic input/output system device that stores respective ones of the computer-executable components executed by the processor. The computer-executable components comprise a power monitor component that monitors an input alternating current power level of the data storage system, a processor management component that causes the processor to transition from a multiple-core operating mode to a single-core operating mode in response to an indication from the power monitor component that the input AC power level has decreased below a threshold, and a backup component that initiates a transfer of data stored by the at least one memory to at least one backup storage device in response to the processor being configured to operate in the single-core operating mode.

Abstract: A spare capacity status of each of multiple computing systems in a data center is monitored. Temporary workloads are assigned to these computing systems if there exists sufficient additional electrical power supply and capacity on power distribution lines. Thus, computing systems that are typically not productively used, such as those that are about to be decommissioned, have not yet been assigned for normal servicing, are reserved for special circumstances, or that are assigned to services that are currently in low demand, are temporarily used for productive data center purposes.

Abstract: A system for battery current monitoring includes a system power throttle stored in memory and executable by the one or more processors to place a battery of an electronic device into a state of expected zero-drain throughout a time interval while the electronic device remains active, and a battery leakage monitor stored in the memory and executable by the one or more processors to detect a battery charge leak based on a series of time-separated parameter measurements for the battery collected during the time interval.

Abstract: A network switch with: Power-over-Ethernet ports to connect to twisted-pair wires and transmit signals with a data packet comprising a target address and direct-current electric power via the twisted-pair wires; a first Powerline Communication port to connect to a pair of line wires supplying alternating-current electric power and to transmit signals with a data packet via the pair of line wires; a controller; and a memory storing target addresses by data packet. The controller may: receive a signal from one of the Power-over-Ethernet ports or the Powerline Communication port; demodulate the inbound signal; produce a data packet from the demodulated inbound signal; determine the target address of the data packet; look up the determined target address; produce an outbound signal modulated for the target port; and send the modulated outbound signal to the target port.

Abstract: A hearing assistance system including a hearing instrument designated as a master device and at least another hearing instrument designated as a slave device. The master device is communicatively coupled to the slave device via a wireless link. The master device has a master clock and generates master time stamps for specified events timed by the master clock. The master time stamps are sent to the slave device via the wireless link. The slave device has a slave clock and generates slave time stamps for specified events timed by the slave clock. The slave clock is adjusted for synchronization to the master clock using the master time stamps and the slave time stamps.

Abstract: Embodiments provide a method to control a power-on phase of an electronic device is provided. The method includes transmitting, by a processing device, a request to a plurality of sensors, the request to read a measurement related to an environmental condition; receiving, by the processing device, the measurement from each of the plurality of sensors; and when the measurement is equal to or above a threshold value, commencing, by the processing device, the power-on phase of the electronic device.

Abstract: In one or more embodiments, one or more systems, methods, and/or processes may determine a temperature change associated with a first battery system; may determine if a temperature change is increasing; if the temperature change associated with the first battery is increasing: may determine if the temperature change is above a maximum threshold; if the temperature change is not above the maximum threshold, may charge the first battery system; if the temperature change is above the maximum threshold: may determine that a second battery system is fully charged; and may charge the first battery system at a reduced charge rate; and if the temperature change is not increasing: may determine if the temperature change is above a minimum threshold; if the temperature change is above the minimum threshold, may charge the first battery; and if the temperature change is not above the minimum threshold, may charge the second battery system.

Abstract: Embodiments provide a method to control a power-on phase of an electronic device is provided. The method includes transmitting, by a processing device, a request to a plurality of sensors, the request to read a measurement related to an environmental condition; receiving, by the processing device, the measurement from each of the plurality of sensors; and when the measurement is equal to or above a threshold value, commencing, by the processing device, the power-on phase of the electronic device.

Abstract: The described embodiments provide a graceful power transition system that can be configured as part of an enterprise computing system, workstations, a carrier grade computing system, and other similar computing systems is described. Power failure can cause potential problems that relate to data integrity, data loss, processing operations completion and timeliness, componentry reliability, and componentry failures, as well as other potential problems. The graceful power transition system recognizes these issues and provides numerous configurable embodiments that allow for smooth power down and power up transitions when power failures, power fluctuations, and return of power events occur. Embodiments of this system can be particularly useful in regions where power failure and power fluctuations are frequent.