Abstract: The present invention discloses a TFT array substrate (and method for making the same) having the large storage capacitance for use in a liquid crystal display device. In a four-mask process, the conventional storage capacitor of the TFT array substrate includes the capacitor electrodes and the insulation layer and semiconductor layer as a dielectric layer. However, the present invention includes the capacitor electrodes and the insulation layer as a dielectric layer so that the thickness of the dielectric layer becomes thinner. Therefore, much more electric charges can be stored in the storage capacitor. That means the liquid crystal display device can have a high picture quality and a high definition. Moreover, the present invention has a structure that can achieve the high manufacturing yield.

Abstract: On a transparent electrically insulating substrate, formed are a scanning line, and a gate electrode of a switching element, further formed are a gate insulating film, a semiconductor layer, an n+-Si layer to be formed into a source electrode and a drain electrode. After the patterning of the foregoing structure, the dielectric film is formed, and the portion corresponding to the contact hole is removed by etching, and photosensitive resin is applied to form the interlayer insulating film. Then, the transparent electrode is extended from the pixel electrode over the switching element, whereon a conversion layer and a gold layer for use in electrode are vapor-deposited. In this structure, an increase in capacitor between the pixel electrode and the signal line can be suppressed by the interlayer insulating film, and the transparent electrode functions as a top gate and release excessive electric charge.

Abstract: To improve performance, a capacitor is provided between storage nodes of an SRAM and a device having an analog capacitor on a single substrate, a plug is formed in a silicon oxide film on a pair of n channel type MISFETs in a memory cell forming area, and a local wiring LIc for connecting respective gate electrodes and drains of the pair of n channel type MISFETs is formed over the silicon oxide film and the plug. Thereafter, a capacitive insulating film and an upper electrode are formed over the local wiring LIc.

Abstract: A field-effect transistor including a gate electrode, silicon layers, and source and drain regions at a surface of a silicon substrate. Sidewall insulating films on the opposite side surfaces of the gate electrode are located between the gate electrode and the silicon layers and contain respective voids.

Abstract: A semiconductor device is to be mounted on a packaging substrate. The semiconductor device includes a first semiconductor chip, a plurality of first electrode pads provided on a surface of the first semiconductor chip on a side of the packaging substrate, for electrically connecting the first semiconductor chip to the packaging substrate, a second semiconductor chip mounted on the first semiconductor chip so as to be surrounded by the plurality of first electrode pads, and protruding electrodes respectively provided so as to protrude from the first electrode pads toward the packaging substrate so that their surfaces are substantially flush with a surface of the second semiconductor chip on a side of the packaging substrate.

Abstract: A semiconductor device and a method of manufacturing thereof can be gained wherein the occurrence of defects can be prevented and it is possible to reduce the manufacturing cost. The semiconductor device includes a capacitor electrode, an insulating layer and a wiring layer. The capacitor electrode is formed on the semiconductor substrate. The insulating film which is formed on the capacitor electrode has a trench which exposes part of the capacitor electrode and has an upper surface. The wiring layer fills in the inside of the trench, has an upper surface and is connected with the capacitor electrode. The upper surface of the wiring layer is located on approximately the same plane as the upper surface of the insulating film.

Abstract: A system and method for providing Value-Added Services (VAS) in an integrated telecommunications network having a packet-switched network portion (PSN) operable with Session Initiation Protocol (SIP). The integrated telecommunications network includes a SIPext SSP server, a trigger server, and a service node having a Service Logic Program (SLP) that is operable with Intelligent Network Application Protocol (INAP). The SIPext SSP and service nodes are provided with the capability to communicate using SIP-compliant messaging. New header fields are provided that specify operations to be performed by the service node with respect to a service. INAP service parametric data is also provided in the header fields in a sequential form. When a call is received in the SIPext SSP server for a user having a subscription for a VAS, it queries the user profile stored in the trigger server.

Abstract: Unsolicited grants are allocated a selected time interval for scheduling transmission of audio packets at a network endpoint. A network processing node switches from outputting unsolicited grants to polling for packet transmission requests when Voice Activity Detection (VAD) at the transmitting endpoint stops generating audio packets. The network processing node switches back to outputting unsolicited grants when the endpoint resumes generation of audio packets. The unsolicited grants include one or more additional grants within the selected time interval that flush out one or more audio packets that may already be queued for transmitting. These additional grants reduce the latency normally caused when Voice Activity Detection (VAD) stops and then restarts audio packet transmission.

Abstract: A Fiber Channel host bus adapter has a low power, high speed serial to parallel data converter for converting asynchronous serial data into clock aligned, framed, parallel data utilizing a serial in, parallel out register for receiving asynchronous serial data and for providing unframed parallel data. An array of parallel in, parallel out registers is configured to receive parallel data from the serial in, parallel out data register and move the data in a parallel fashion between the parallel in, parallel out registers thereof. A pattern detection circuit identifies a location of a delimiter character within the array of a parallel in, parallel out registers. A selection circuit reads desired data bits from the array of parallel in, parallel out registers in a parallel fashion, based upon the location of the delimiter character, to define a framed parallel output word.

Abstract: A stackable network unit comprises a ‘down’ port and an ‘up’ port, an arbitration path for data packets from the down port to the up port, a repeat path for data packets from the up port to the down port, a link detector for detecting tile absence of another operative unit connected to the down port to cause data packets on the return pat to bypass the down port and proceed on the arbitration path and for detecting the absence of another operative unit connected to the up port to cause data packets on the arbitration path to bypass the up port and proceed on the repeat path.

Abstract: A method and apparatus for inter-domain routing of calls in a network, where the network represents a first wide area network. A routing node of the network advertises its access to a range of addresses in a second wide area network and a cost for access to the range of addresses to all adjacent nodes in the network. Each of the adjacent nodes inserts an entry in its own routing table associating access to the range of addresses in the second wide area network with the network address of the routing node and the cost for access. Each adjacent node then modifies the cost for access by adding its own cost and advertises its access to the range of addresses in the second wide area network and the modified cost for access to all of its adjacent nodes.

Abstract: The apparatus for converting a first data stream supplied from a first buffer for accumulating the first data stream into a second data stream, and supplying the second data stream to a second buffer for accumulating the second data stream, is provided. The first data stream includes a plurality of first data groups each including significant data. Further, the first data stream includes a plurality of time values each indicating a point of time corresponding to a position of respective one of the plurality of first data groups within the first data stream.

Abstract: A network switch having switch ports for communication of data packets with respective computer network nodes according to CSMA/CD protocol that resets a retry counter for counting data packet transmission attempts within any one of the respective switch ports if backpressure is asserted by that port. A retry limit value for the retry counter is modified to ensure that the total number of retrys does not exceed a maximum total number of allowable retrys. The resetting of the retry counter within a port after assertion of backpressure affords the port a greater probability of transmitting earlier under the CSMA/CD protocol, thus more quickly relieving congestion which may occur in the network switch. The modification of the retry limit value ensures that the number of retrys for the port does not exceed industry standards.

Abstract: In a mobile ATM communications network, upstream ATM cells and downstream ATM cells are transmitted between a mobile site and a fixed site over a first communication link and a handoff request message is sent from the mobile site to the fixed site when the first communication link is likely to become unavailable. In response, the upstream ATM cells are held in a first buffer and the location of a cell that is to be transmitted first when transmission of upstream cells is resumed is determined and an address pointer indicating that location is stored in a first memory. An end-of-stream OAM cell is sent from the mobile site to the fixed site over the first communication link, so that in the fixed site, the downstream ATM cells are held in a second buffer and the location of a cell within the second buffer which is to be transmitted first when transmission of downstream cells is resumed is determined and an address pointer indicating that location is stored in a second memory.

Abstract: An apparatus for handling back-to-back maintenance messages in extended superframe t1 telephone circuits includes a FIFO, a byte counter, and a message length register. According toga method of the invention, when messages are placed in the. FIFO, the byte counter counts the message length and places the message length in the message length register. A host controller is required to read the message length register in the time interval following complete receipt of a first message before complete receipt of a second message, but is only required to read the contents of the FIFO before it overflows. According to a presently preferred embodiment of the apparatus, a second register is provided for indicating the current depth of the FIFO. The second register sends an interrupt to the host controller when the contents of the FIFO exceed a threshold.

Abstract: In the present invention, the overhead data transmission rate in a multicarrier communication system (1) may be changed and/or selected. More specifically, this rate may be selected during an initial negotiation process and/or during a steady state mode of operation.

Abstract: The invention relates to a method for identifying base stations of a time division cellular network in a mobile station. An object of the invention is to speed up the identification of new base stations. In accordance with the invention frame timing difference data for the neighbor base stations (301) and/or the broadcast control channel time slot data for the neighbor base stations are transmitted from the serving base station to the mobile station; reception times for the neighbor base stations' system data are determined in the mobile station on the basis of said frame timing differences and/or the broadcast control channel time slot data (302) and system data are read and neighbor base stations are identified (303). The invention is also directed to a mobile station applying the method.

Abstract: An interface apparatus of PDH network and ATM network, which includes a line interface unit for interfacing between the PDH network and the ATM network to receive bipolar analog data of T1 or E1 and provide PDH digital data when the ATM network receives data from the PDH network, and to receive PDH digital data and provide primary bipolar analog data of T1 or E1 when the PDH network receives data from the ATM network; a framer for framing received multiple T1/E1 channelized data of the PDH network to generate frames and provide T1/E1 PDH data in one of a T1 and a E1 unchannelized mode, and to provide synchronization information and signaling information in one of a T1 and a E1 channelized mode; an interface controller which, in one of the T1 and E1 channelized mode, receives the synchronization information and signaling information to distinguish time slot from said framer, and provides an interface signal containing information of frame overhead; an ATM Adaption Layer type 1—Segmentation and Reassembly

Abstract: The invention provides a method and apparatus for end-users to allocate a communication medium locally without requiring a central arbitration device while guaranteeing access to the end-users. The end-users bid for control of an upstream data channel by concurrently transmitting auction data and address data on a first upstream signaling channel and a second upstream signaling channel. An end-user gains control of the upstream data channel when data received from the first and second downstream signaling channels match the auction and address bits. When it is determined that the end-user lost the bid, the end-user backs off from the first and second upstream signaling channels and refrains from bidding until the first and second upstream signaling channels become quiet.

Abstract: A method for prioritized data transmission to a common transmission medium from a plurality of interface modules coupled to it, for interfacing at least one input bitstream with said common transmission medium, whereby access is arbitrated on the basis of a module priority of each interface module, is such that, for at least one interface module, the module priority is dependent on at least one connection parameter associated to packets of said at least one input bitstream. An arrangement for performing this method is described as well as several variant implementations of the method and the arrangement.