Abstract: An apparatus includes a first control unit configured to shift to at least a first power mode and a second power mode where power saving is greater than that in the first power mode, a detection unit configured to detect a predetermined return factor and output a first signal, a second control unit, which includes a storage unit storing information about input of the first signal, configured to output a second signal based on the stored information, and a third control unit configured to output a third signal for shifting the first control unit from the second power mode to the first power mode based on the second signal. The third control unit sets a predetermined value in the storage unit when the first control unit shifts to the second power mode.

Abstract: An electronic device includes a first battery, a second battery, and a serial-parallel conversion circuit. The serial-parallel conversion circuit is coupled to the first battery and the second battery, and is configured to, according to a control signal, couple the first battery and the second battery in series so as to reversely charge on a to-be-charged device by the first battery and the second battery, or couple the first battery and the second battery in parallel so as to supply power to the electronic device by the first battery and the second battery.

Abstract: A multi-chip system and a data transmission method thereof are provided. The multi-chip system includes a first chip, a link unit, and a second chip. The first chip includes multiple transmitter (TX) channels and a first data processing module. The TX channels are configured to provide at least one transaction information. The first data processing module converts the at least one transaction information into at least one first data packet according to a general packet format and packs the at least one first data packet according to a specific packet format to generate a second data packet. The first data processing module merges two sets of second data packets into a third data packet and transmits the third data packet to the link unit. The second chip receives the third data packet through the link unit.

Abstract: An apparatus includes a connector port configured to be selectably connected with and disconnected from a peripheral device. A detector is configured to provide an output indicating the connection of the peripheral device with the connector port with a time delay between connection of the peripheral device with the connector port and outputting the signal. A data switch is operatively coupled with the detector and a communication pin of the connector port and to selectably enable and disable data communication between the communication pin and a computer board in response to the output of the detector. A power switch is operatively coupled with the detector, the power supply pin, and a DC power supply and is configured to selectably connect and disconnect the power supply and the power supply pin in response to the output of the detector.

Abstract: A technique includes communicating with a plurality of input/output (I/O) modules to cause a firmware image to be transferred to the I/O modules. The I/O modules are each associated with the plurality of storage device enclosures, and the I/O modules are serially coupled together in a chain establishing a processing order among the I/O modules. The technique includes rebooting the I/O modules to cause the I/O modules to use the communicated firmware images, where the rebooting includes rebooting the I/O modules in a second order counter to the processing order.

Abstract: The examples include methods and apparatuses to power a peripheral device through a PUSB port. Powering a peripheral device through a PUSB port includes receiving a request for a plurality of PUSB power options for a PUSB port coupled to a device, providing the plurality of PUSB power options in a hardware initialization system, receiving a selection PUSB power option from the plurality of PUSB power options, and providing a power, corresponding to the selection PUSB power option, to the PUSB port.

Abstract: An electronic device and a power distribution method are provided. The electronic device obtains operating power information of a first power receiving device, operating power information of a power supply device, and operating power information of at least one second power receiving device. The electronic device further dynamically adjusts power supplied from the power supply device to the first power receiving device and power supplied to the at least one second power receiving device according to the operating power information of the power supply device, the operating power information of the first power receiving device, and the operating power information of the at least one second power receiving device.

Abstract: A storage system controller chip includes routing circuitry comprising a host interface for coupling to a host device and an extension interface for coupling to a secondary controller chip. A host controller is coupled to a logical interface of the routing circuitry for receiving a host data access command from the host device via the host interface and logical interface. The routing circuitry transfers the host data access command to the secondary controller chip via the extension interface. The storage system controller chip further includes processor circuitry coupled to the logical interface of the routing circuitry. The processor circuitry receives an indication from the secondary controller chip via the extension interface that execution of the host data access command has been completed by the secondary controller chip and instructs the host controller to notify the host device that execution of the host data access command has been completed.

Abstract: An aircraft-based power system includes at least one smart universal serial bus (USB-PD (Power Delivery)) outlet. The at least one smart universal serial bus (USB-PD (Power Delivery)) outlet being configured to connect to a power bus that receives power from a power source system. The at least one smart universal serial bus (USB-PD (Power Delivery)) outlet is further configured to control power delivery.

Abstract: A storage system comprises one or more storage devices, power supplies supplying power to the storage device, a processor that performs in response to determining that the total power consumption of the one or more storage devices is less than a first percentage threshold of a load of the active power supplies, deactivating one or more of the active power supplies until the total power consumption is equal to or greater than the first percentage threshold of a load of each of the active power supplies, and in response to determining that the total power consumption is equal to or greater than a second percentage threshold of a load of each of the active power supplies, activating one or more of the deactivated ones of the power supplies until the total power consumption is less than the second percentage threshold of the load of each of the active power supplies.

Abstract: A system-on-a-chip (SoC) comprises a power supply circuit coupled to an energy harvesting transducer and configured to operate using energy from the energy harvesting transducer; a microcontroller coupled to a system bus of the SoC; an interface configured to communicate with the microcontroller via the system bus of the SoC, the interface configured to generate data upon occurrence of an event; and a computation accelerator configured to establish, based on an energy consumption level of the SoC, a data path between the interface and the computation accelerator that at least partially bypasses the system bus such that the data is transmitted to the computation accelerator via the data path.

Abstract: In various embodiments, rail decoupling circuits that are powered by an always on voltage rail allow a core voltage rail to power up independently of an I/O voltage rail without jeopardizing I/O pad circuits that are powered by the I/O voltage rail. In an embodiment, when the always on voltage rail is powered-up and a chip reset signal is asserted, the rail decoupling circuits drive control inputs of the I/O pad circuits based on default values. When the chip reset signal is de-asserted, the rail decoupling circuits drive the control inputs of the I/O pad circuits based on signals received from circuits powered by the core voltage rail. Because the rail decoupling circuits maintain control of the I/O pad circuits until the chip-reset is de-asserted, the core voltage rail can power up at any time before the chip-reset signal is de-asserted irrespective of when the I/O voltage rail powers up.

Abstract: A computing device includes a control system that communicates with multiple sensors that capture data regarding a user. The control system communicates with each of the sensors to obtain information regarding the capabilities of each sensor, and uses this capability information to determine how to configure each of the sensors. The control system also selects one of the multiple sensors to be the master sensor, and the rest of the multiple sensors are slave sensors, and notifies the multiple sensors of whether they are a slave sensor or a master sensor. The master sensor collects sensor data for the multiple sensors, capturing data itself as well as receiving data captured by the slave sensors from the slave sensors. The master sensor sends an indication of the collected data (e.g., the collected data itself or data resulting from processing the collected data) to the control system for analysis and/or processing.

Abstract: The present invention solves a new problem that may occur when Try.SRC or Try.SNK is adopted. A controller is used to implement a DRP-compliant device that can be both power supply side and power reception side according to the USB Type-C standard. The controller is configured to be able to execute a first process of determining whether or not the Port Power Role of the opposing device is Try.SRC when the Power Role of the own device is determined to be Sink meaning the power receiver according to the sequence with the opposing device, which is the connected device, and a second process of switching the Port Power Role of the own device to SRC only and continuing the sequence with the opposing device if the Port Power Role of the opposing device is Try.SRC.

Abstract: In a power supply having a control circuit for regulating the power supply output and a load switch for connecting the output to a load device, a method for reducing standby power includes determining if a load device is connected to the power supply. If no load device is connected, the load switch is turned off, and the power supply enters a standby mode, which includes alternating first time period of power-saving mode and second time period of regulating mode. In the power-saving mode, the control circuit stops regulating the output of the power supply and turns off one or more functional blocks to allow the output to drop, until the output reaches a pre-set low output limit. In the regulating mode, the control circuit turns on the functional blocks and regulates the power supply to allow the output to increase, until the output reaches a pre-set high output limit.

Abstract: A method includes detecting a micro start of frame packet (?SOF) on a data bus. If there is at least one data packet contained in a microframe during the first threshold period after the ?SOF, transmitters are held in an active state. If there is no data packet in the first threshold period after the ?SOF, the transmitters are transitioned from the active state to an OFF state. The method also includes transitioning the transmitters from the OFF state to the active state prior to a switchback period before the end of the microframe. The method also includes transitioning the transmitters from the OFF state to the active state if a data packet is received in the OFF state. The method also includes dropping the data packet received in the OFF state and transitioning from the OFF state to the active state when the data packet is dropped.

Abstract: Disclosed is a method for a USB power receiving device selecting a power supply option. The method is performed by the USB power receiving device and includes: receiving N power data object(s) (PDO(s)) from a USB power supplying device, in which the N is a positive integer; checking whether at least one of M PDO(s) of the USB power receiving device matches at least one of the N PDO(s) according to a selection rule including a voltage requirement and a current-related requirement and accordingly generating a request data object (RDO), in which the M is a positive integer; and transmitting the RDO to the USB power supplying device to request the USB power supplying device to supply power to the USB power receiving device according to the RDO.

Abstract: Examples described herein include systems and methods for bare metal management of computing devices. Firmware of the computing device can be configured to contact a network location as part of an HTTP boot and download a boot agent. The boot agent can be prioritized to execute before a primary OS boot loader. The boot agent can download an OS configuration including a package that is inserted into the primary OS. The primary OS, as configured, can then boot. The boot agent can also attest to OS health and device compliance on subsequent boots. For example, the boot agent can cause the firmware to track how many boots have occurred since compliance verification. If a threshold number of boots occur without verification, the boot agent can initiate restoration. Alternatively, if a decommission flag is set, the boot agent can cause the computing device to boot into its original configuration.

Abstract: An electronic device including a PDIC, a charging IC, and a processor. The PDIC determines whether an external device is connected to the USB port, through a first pin of a USB port. The charging IC outputs a first voltage, which is a voltage obtained by boosting a voltage provided by a battery, to the external device through a second pin, when the external device is connected to the USB port. The processor is configured to determine whether the external device connected to the USB port is a first external device having a specified VID and a specified PID, through a third pin of the USB port, and to transmit a first signal, which controls the charging IC to output a second voltage having a magnitude less than the first voltage, to the charging IC when the first external device is connected to the USB port.

Abstract: A computing device includes a control system that communicates with multiple sensors that capture data regarding a user. The control system communicates with each of the sensors to obtain information regarding the capabilities of each sensor, and uses this capability information to determine how to configure each of the sensors. The control system also selects one of the multiple sensors to be the master sensor, and the rest of the multiple sensors are slave sensors, and notifies the multiple sensors of whether they are a slave sensor or a master sensor. The master sensor collects sensor data for the multiple sensors, capturing data itself as well as receiving data captured by the slave sensors from the slave sensors. The master sensor sends an indication of the collected data (e.g., the collected data itself or data resulting from processing the collected data) to the control system for analysis and/or processing.