Abstract: Embodiments of systems and methods for managing battery runtime based upon power source activity are described. In some embodiments, a method may include determining, based at least in part upon location and context information, that a battery of an Information Handling System (IHS) is expected to be charged by a given alternating current (AC) adapter; and modifying one or more IHS settings to reduce a power consumption of the IHS in response to the determination.

Abstract: The present disclosure generally relates to limiting bandwidth in storage devices. One or more bandwidth quality of services levels may be selected and associated with commands according to service level agreements, which may prioritize some commands over others. A storage device fetches and executes one or more the commands. Each of the commands is associated with a bandwidth quality of service level. After executing the commands and transferring the data to a host device, the storage device may delay writing a completion entry corresponding to the executed commands to a completion queue based on the associated bandwidth quality of service level of the commands. The device may then delay revealing the completion entry by delaying updating a completion queue head pointer. The device may further delay sending an interrupt signal to the host device based on the associated bandwidth quality of service level of the commands.

Abstract: Methods and apparatus for power management of embedded devices are provided. An example apparatus includes a primary power management integrated circuit (PMIC) to communicate with an embedded system to determine a power state. The example primary PMIC is to include a first power state sequence controller and a first power supply controller. The example first power state sequence controller is to drive a first power supply controller according to the power state. The example first power supply controller is to activate a first set of rails to apply power to the embedded system. The example apparatus includes a secondary PMIC including a second power state sequence controller and a second power supply controller. The example second power sequence controller is to drive a second power supply controller according to the power state. The example second power supply controller is to activate a second set of rails to apply power to the embedded system.

Abstract: A method of controlling a docking station (21) to wake a mobile device (23) from a sleep mode, the mobile device (23) having a data module that is powered off in sleep mode and is capable of transferring data to/from the docking station (21) over a data connection. The mobile device (23) also includes at least one of a power module (211) that is powered on in sleep mode and that is capable of receiving power over a power transfer connection (29b) from a power source (28) in the docking station (21) and a sort-range wireless communication module (46) that is powered on in sleep mode and that is capable of transferring data over a short-range wireless connection (45).

Abstract: An example meter to monitor a media device disclosed herein includes a circuit having (i) a circuit input to electrically couple with a reference capacitor and an input power line of the meter that is to electrically couple with an output power line of the media device, and (ii) a circuit output to provide a first value based on the reference capacitor when the input power line of the meter is not electrically coupled with the output power line of the media device, and a second value when the input power line of the meter is electrically coupled with the output power line of the media device. The disclosed example meter also includes a processor to determine whether the input power line of the meter is electrically coupled with the output power line of the media device based on whether the circuit output provides second value.

Abstract: The present disclosure relates to a method applied to an electronic device with a screen. The screen displays a display interface. In one example method, a current value of a current sampling point is obtained. Based on the current value, whether power consumption of the electronic device meets a criterion is determined. The display interface is adjusted when the power consumption of the electronic device does not meet the criterion.

Abstract: A computing system can be dynamically configured to operate with an eGPU that is connected to the computing system via a USB-C port. An eGPU manager, which may be a BIOS service, can be provided on a computing system and configured to detect when an eGPU has been connected to a USB-C port. When the eGPU manager detects an eGPU, it can employ an identifier of the eGPU and possibly characteristics of the eGPU and/or the computing system to query a lookup table for values for configuration settings that are optimal for the particular eGPU. The eGPU manager can then set the configuration settings to the obtained values so that the computing system will boot and/or operate properly while the eGPU is connected.

Abstract: A circuit device includes a control circuit configured to instruct, when a detection circuit detects that an amplitude level of a packet exceeds a disconnecting detection level, a packet output circuit to lower an amplitude level of a part or all of packets, and after the instruction, to determine that, when the detection circuit detects that an amplitude level of a packet again exceeds the disconnecting detection level, a USB device connected to a bus is disconnected.

Abstract: Systems, methods and devices are provided to improve management and accuracy of timestamps associated with sensor-based data. An indication is received of a sensor event associated with data samples provided from a sensor having an output data rate. A respective timestamp is assigned to each of the data samples. Assigning the respective timestamp may include, responsive to a determination that the indicated event is an interrupt event, calculating an actual data sampling interval based at least in part on time intervals between previous sensor events and a on a quantity of the one or more data samples.

Abstract: An electrical connector can have a switch module connected to a first interface, a second interface, and a third interface with a computing device connected to the first interface, a first peripheral device connected to the second interface, and a second peripheral device connected to the third interface. The first peripheral device may communicate with the computing device via a first conduit that extends through the switch module prior to the switch module activating a second conduit that extends through the switch module in response to detection of an operational condition of the computing device.

Abstract: The present disclosure relates to a communication apparatus, a communication method, a program, and a communication system that enable more reliable communication. An I3C master receives a max read length and a max write length from an I3C slave. Then, when transmitting/receiving data to/from the I3C slave, the I3C master controls transmission/reception of the data so that the data to be transferred in one data transfer has a data length equal to or shorter than the max read length and the max write length, and transmits transfer length information indicating the data length of the data to be transferred, prior to data transfer of the data. The present technology is applicable to a bus IF, for example.

Abstract: A technical installation having at least one measurement point, wherein the measurement point has a plurality of IO signals, to which in each case a data container is assigned in a control system of the technical installation.

Abstract: An apparatus and a method for managing power consumption for each power consumption element in an electronic device and updating a power profile is disclosed. The electronic device estimates current power consumption of the electronic device based on unit power consumption corresponding to each target hardware component set in the power profile and monitors whether an update of the power profile is required. If it is determined that the update of the power profile is required, the electronic device may update the power profile corresponding each target hardware component by consumption estimated in accordance with each target hardware component and consumption measured in accordance with each target hardware component.

Abstract: Concepts for a link interface of a communication protocol are presented. Where the communication protocol provides for Idle Flits of first and second sizes for maintaining link continuity, the first size being smaller than the second size, such concepts are configured to remove Idle flits of the first size.

Abstract: A storage system controller chip includes routing circuitry comprising a host interface for coupling to a host device and an extension interface for coupling to a secondary controller chip. A host controller is coupled to a logical interface of the routing circuitry for receiving a host data access command from the host device via the host interface and logical interface. The routing circuitry transfers the host data access command to the secondary controller chip via the extension interface. The storage system controller chip further includes processor circuitry coupled to the logical interface of the routing circuitry. The processor circuitry receives an indication from the secondary controller chip via the extension interface that execution of the host data access command has been completed by the secondary controller chip and instructs the host controller to notify the host device that execution of the host data access command has been completed.

Abstract: A system may include a switchable power domain configured to selectively be powered on and powered off during operation of the system and an always-on power domain configured to remain powered on during operation of the system, the always-on power domain including a power management unit. The power management unit may be configured to, in response to a shut down condition for powering down the switchable power domain, determine a state of a bus transaction on a communication bus between the switchable power domain and the always-on power domain and control one or more control signals for controlling the communication bus in order to manipulate completion of the bus transaction to prevent at least one of corruption of data of the bus transaction and a system freeze associated with the bus transaction.

Abstract: Provided is an arithmetic processing to reduce a number of parts as it is not necessary to prepare an operation device for each input processing logic. A plurality of types of input processing logics is stored in the ROM, and CPU selects one of the plurality of types of input processing logics and executes input processing according to the selected input processing logic. As a result, there is no need to prepare the ECU for each input processing logic, reducing the number of parts.

Abstract: A computerized system is disclosed. The computerized system may include one or more processors configured to perform the operations stored in a memory. The operations may include sorting a subset of a plurality of endpoints for communication during a communication frame first based on service interval time assigned to each endpoint and then resorting based on a concurrency score of each peripheral device corresponding to the subset of the plurality of endpoints. The operations may include determining available bandwidth and a number of packets to be communicated with the each endpoint of the subset of the plurality of endpoints. The operations may include generating a scheduling table that includes the number of packets and an order of communication of the packets to be communicated with the each endpoint of the subset of the plurality of endpoints.

Abstract: A system-on-a-chip (SoC) comprises a power supply circuit coupled to an energy harvesting transducer and configured to operate using energy from the energy harvesting transducer; a microcontroller coupled to a system bus of the SoC; an interface configured to communicate with the microcontroller via the system bus of the SoC, the interface configured to generate data upon occurrence of an event; and a computation accelerator configured to establish, based on an energy consumption level of the SoC, a data path between the interface and the computation accelerator that at least partially bypasses the system bus such that the data is transmitted to the computation accelerator via the data path.

Abstract: An electronic device includes a queue with multiple sub-queues arranged in a logical hierarchy from a lowest sub-queue to a highest sub-queue, each sub-queue including a separate subset of a set of entries of the queue, and a separate age matrix for each sub-queue. The electronic device also includes a controller that stores items in entries in the lowest sub-queue until the lowest sub-queue is full and then stores items in successively next higher sub-queues in the hierarchy. The controller also removes an item that is ready for removal from an entry in the lowest sub-queue. The controller then shifts items in sub-queues in the hierarchy to fill the vacancy in the lowest sub-queue. For the shifting, the controller uses an age matrix associated with each sub-queue to determine an oldest item in that sub-queue and then moves the oldest item to a next lower sub-queue in the hierarchy.