Abstract: A system may include a sensor configured to output a sensor signal indicative of a distance between the sensor and a mechanical member associated with the sensor, a measurement circuit communicatively coupled to the sensor and configured to determine a physical force interaction with the mechanical member based on the sensor signal, and a compensator configured to monitor the sensor signal and to apply a compensation factor to the sensor signal to compensate for changes to properties of the sensor based on at least one of changes in a distance between the sensor and the mechanical member and changes in a temperature associated with the sensor.

Abstract: A switched capacitor voltage multiplication device has a rectifier with a DC input terminal and a DC output terminal and two pulse input terminals. A first flying capacitor is coupled to one of the pulse input terminals, while a second flying capacitor is coupled to the other pulse input terminal. A recycle resistor is coupled across the rectifier with a first resistor terminal coupled to one pulse input terminal and a second resistor terminal coupled to the other pulse input terminal.

Abstract: The device includes at least the following components: a heating resistor intended for heating a component to be regenerated; a current source; a thermistor connected to the current source and thermally coupled to the heating resistor, the thermistor, through which the current flows, having a voltage Vtemp across its terminals, which voltage reflects the temperature of the heating resistor; an error amplifier, which amplifies the difference between the voltage Vset and the voltage Vtemp and delivers a voltage Vctrl that corresponds to the amplified difference; a switch, which switches the current flowing through the heating resistor; an oscillator, which delivers a voltage Vosc formed with a modulated duty cycle, the duty cycle of the pulses of the voltage Vosc being dependent on the voltage Vctrl, the pulses controlling the opening of the switch.

Abstract: The application discloses a power supply circuit and a power supply device. A drain of a first N-type metal-oxide-semiconductor field-effect transistor (MOSFET) receives a first input voltage. A filter is coupled to a source of the first N-type MOSFET and is configured to output an output voltage. A non-inverting input terminal of an operational amplifier is coupled to a ground terminal through a first capacitor. A control circuit is coupled to an inverting input terminal of the operational amplifier. One terminal of a switch is coupled to a gate of the first N-type MOSFET, and the other terminal is switchably coupled to the control circuit or an output terminal of the operational amplifier, so that the gate of the first N-type MOSFET is switched to be coupled to the control circuit or the output terminal of the operational amplifier.

Abstract: A semiconductor integrated circuit includes a clock controller generating a clock; and a plurality of blocks that operate by using the clock. The clock controller performs statistical processing for the plurality of blocks, controls a frequency of the clock to a first frequency, changes the frequency of the clock from the first frequency to a second frequency, generates the clock of the second frequency after a time predicted by the statistical processing as a time for which the second frequency is to be continued elapses from a timing when the frequency of the clock is changed, and supplies the generated clock to the blocks. The clock controller generates a third frequency clock obtained by decimating down the second frequency from the first frequency according to a time for which the first and second frequencies are to be continued after the frequency of the clock is changed from the second frequency to the first frequency, and supplies the generated clock to the blocks.

Abstract: In a power converter that includes a switched-capacitor circuit connected to a switched-inductor circuit, reconfiguration logic causes the switched-capacitor circuit to transition between first and second switched-capacitor configurations with different voltage-transformation ratios. A compensator compensates for a change in the power converter's forward-transfer function that would otherwise result from the transition between the two switched-capacitor configurations.

Abstract: Some embodiments include a radiographic imaging system, comprising: a radiographic imager, including: an imaging array; imager control logic configured to control the imaging array; a power system configured to supply power to at least the imaging array and the imager control logic; a wireless power receiver configured to receive energy wirelessly and provide at least part of that energy to the power system; and a wireless communication transmitter; and a charging mat, including: a wired power input; a wireless power transmitter configured to transmit energy wirelessly; and a wireless communication receiver; wherein the wireless power receiver, the wireless power transmitter, the wireless communication receiver, and the wireless communication transmitter are positioned such that the radiographic imager can be placed on the charging mat where, simultaneously, the wireless power receiver is aligned with the wireless power transmitter and the wireless communication receiver is aligned with the wireless communica

Abstract: Disclosed is a multi-stage charge pump. A first stage is controlled by a first clock signal. A second stage is controlled by a second clock signal, which has high and low states that are shifted relative to the high and low states of the first clock signal. The high and low states of the second clock signal can be higher than the high and low states, respectively, of the first clock signal for a positive charge pump and vice versa for a negative charge pump. Any additional stage is similarly controlled by an additional clock signal that is shifted with respect to the clock signal controlling the immediately preceding stage. By shifting the high and low states of clock signals controlling downstream stages, the need for series-connected or high voltage capacitors in the downstream stages is eliminated and circuit complexity and area consumption are reduced.

Abstract: A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.

Abstract: A device operative to transfer power and communicate wirelessly includes a drive-sense circuit (DSC), memory that stores operational instructions, and processing module(s). The DSC generates a drive signal based on a reference signal and provides the drive signal to a first coil via a single line and via a resonating capacitor, and simultaneously senses the drive signal via the single line, to facilitate electromagnetic coupling to a second coil to transfer power wirelessly to another device. The DSC also detects electrical characteristic(s) of the drive signal including whether a communication signal is transmitted from another device and generates a digital signal representative thereof.

Abstract: An electronic device capable of transmitting and receiving wireless power is provided. The electronic device includes a wireless power transfer (WPT) coil, a sensor coil surrounding the WPT coil, and a processor operatively coupled to the WPT coil and the sensor coil. The processor may be configured to control to transmit and receive power by using the WPT coil, perform a ping operation by using the sensor coil, control to measure a waveform of a current or voltage of the sensor coil while or after performing the ping operation using the sensor coil, control to check a Q factor of the sensor coil based on the measured waveform, identify the presence of a foreign object based on the checked Q factor, and control the power transmission using the WPT coil based on a result of the determination of the presence of the foreign object.

Abstract: A semiconductor device comprises: a voltage generator suitable to pump a power source voltage to generate a first pumping voltage in response to an operation clock, a clock generator suitable to generate the operation clock having a first frequency during an initial operation period in which a level of the first pumping voltage is at a first level and to generate the operation clock having a second frequency after the initial operation period, the second frequency generated to be lower than the first frequency in response to a rise in a level of the first pumping voltage to a second level greater than the first level, and an internal circuit suitable to perform a predetermined internal operation in response to the first pumping voltage.

Abstract: A linear power supply circuit according to the present invention is provided with: an output transistor provided between an input end to which an input voltage is applied and an output end to which an output voltage is applied; a driver for driving the output transistor; and a feedback unit for feeding, back to the driver, information about an output electrical current that is output from the output end. The driver drives the output transistor on the basis of the difference between a voltage based on the output voltage and a reference voltage, as well as the information.

Abstract: An ADC includes a plurality of sub ADCs configured to operate in a time-interleaved manner and a sampling circuit configured to receive an analog input signal of the ADC, wherein the sampling circuit is common to all sub ADCs. The ADC includes a test signal generation circuit configured to generate a test signal for calibration of the ADC. The sampling circuit has a first input configured to receive the analog input signal and a second input configured to receive the test signal. The sampling circuit includes an amplifier circuit and a first feedback switch connected between an output of the amplifier circuit and an input of the amplifier circuit. The first feedback switch is configured to be closed during a first clock phase and open during a second clock phase, which is non-overlapping with the first clock phase.

Abstract: The amplitude voltage of a signal input to a level shifter can be increased and then output by the level shifter circuit. Specifically, the amplitude voltage of the signal input to the level shifter can be increased to be output. This decreases the amplitude voltage of a circuit (a shift register circuit, a decoder circuit, or the like) which outputs the signal input to the level shifter. Consequently, power consumption of the circuit can be reduced. Alternatively, a voltage applied to a transistor included in the circuit can be reduced. This can suppress degradation of the transistor or damage to the transistor.

Abstract: A power generation device includes a band gap reference (BGR) circuit configured to generate a reference voltage independent of an environmental change, and a voltage generation circuit configured to transfer an input power voltage based on a sum of the reference voltage and an internal ground voltage to generate an internal power voltage.

Abstract: In an example, an apparatus includes an error amplifier, a buffer, a transistor, and a current-mode feedforward ripple canceller (CFFRC). The error amplifier has an amplifier output, a first input, and a second input, the error amplifier second input configured to receive a reference voltage. The buffer has a buffer input and a buffer output, the buffer input coupled to the error amplifier output. The transistor has a gate, a source, and a drain, the gate coupled to the buffer output, the drain coupled to the first input. The transistor is configured to receive an input voltage (VIN) at the source and provide an output voltage at the drain. The CFFRC has a CFFRC input and a CFFRC output, the CFFRC output coupled to the gate, and the CFFRC input configured to receive VIN.

Abstract: A circuit includes first and second gain stages and an output transistor. The second gain stage includes a transconductance amplifier and a variable impedance circuit coupled to an output of the transconductance amplifier. The variable impedance circuit is configured to implement a first impedance level at frequencies below a first frequency threshold and to implement a second impedance level at frequencies above a second frequency level. The first impedance level is larger than the second impedance level. The output transistor has a control input coupled to the variable impedance circuit. At frequencies above the second frequency threshold, the second impedance level is configured to be inversely related to current through the output transistor.

Abstract: A leakage-current compensation circuit including: a first node for connection of a first component, a first leakage current flows through the first component and node with a given polarity, the magnitude of the first leakage current dependent on a first potential difference across the first component; a second component connected to a second node with a second leakage current flowing through the second component and node, the magnitude of the second leakage current dependent on a second potential difference across the second component; a current mirror connected to the first and second nodes to cause a compensation current, the magnitude of the compensation current dependent on the magnitude of the second leakage current; a differential amplifier connected in series with the second component along a current path carrying the second leakage current; and an AC coupling superimposing an AC-component of the first potential difference on the second potential difference.

Abstract: The present application provides a voltage generation circuit and associated capacitor charging method and system. The voltage generation circuit is in a chip and is for generating a first output voltage and a second output voltage. The chip has a first output port and a second output port coupled to a first capacitor and a second capacitor respectively external to the chip. The voltage generation circuit includes a constant current type voltage generation unit and a regulator. When the voltage generation circuit operates in a first mode, the regulator is configured as a unit gain buffer to charge the first capacitor to the first output voltage; and when the voltage generation circuit operates in a second mode, the regulator is configured as a low-dropout regulator to charge the second capacitor to the second output voltage.