Abstract: An optoelectronic component and a method for producing an optoelectronic component are disclosed.

Abstract: An electroluminescence display device, including a first electrode and a second electrode facing each other; a quantum dot emission layer disposed between the first electrode and the second electrode, the quantum dot emission layer including a plurality of quantum dots and not including cadmium, wherein the quantum dot emission layer includes a red emission layer disposed in a red pixel, a green emission layer disposed in a green pixel, and a blue emission layer disposed in a blue pixel, wherein the device has color reproducibility according to a DCI standard of greater than or equal to about 89%.

Abstract: Embodiments of the disclosure provide methods for forming MTJ structures from a film stack disposed on a substrate for MRAM applications and associated MTJ devices. The methods described herein include forming the film properties of material layers from the film stack to create a film stack with a sufficiently high perpendicular magnetic anisotropy (PMA). An iron containing oxide capping layer is utilized to generate the desirable PMA. By utilizing an iron containing oxide capping layer, thickness of the capping layer can be more finely controlled and reliance on boron at the interface of the magnetic storage layer and the capping layer is reduced.

Abstract: An image sensor that includes a substrate is provided. A photodiode is formed in the substrate and in a pixel region. Storage devices are formed in the substrate and adjacent to the photodiode. Deep trench isolation walls penetrate the substrate to isolate the photodiode from the storage devices. A circuit layer is disposed on a first surface of the substrate and connected to the photodiode and the storage devices. A shielding structure is disposed on a second surface of the substrate to shield of the storage devices. A material layer is disposed above the second surface of the substrate. A lens is disposed on the material layer and configured to receive incident light and transmit the incident light to the photodiode.

Abstract: A display device includes: a substrate having a first surface, a second surface opposite to the first surface, and an inner side surface defining through holes; a first wiring and a second wiring disposed on the first surface; and a first conductor and a second conductor disposed in one of the through holes. The first conductor is connected to the first wiring, the second conductor is connected to the second wiring, and the first and second conductors are insulated from each other.

Abstract: By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.

Abstract: An organic light emitting display device includes a substrate, first electrodes disposed on the substrate, a pixel defining layer disposed on the substrate and exposing at least a part of the first electrodes, a second electrode disposed on the first electrodes and the pixel defining layer, an organic light emitting layer disposed between the first electrodes and the second electrode, a thin film encapsulation layer disposed on the second electrode, barrier ribs disposed on the thin film encapsulation layer, the barrier ribs overlapping the pixel defining layer between two adjacent ones of the first electrodes, and a planarization layer disposed on the thin film encapsulation layer and the barrier ribs, and having a refractive index higher than that of the barrier ribs. Each of the barrier ribs has a closed loop shape that encloses one of the two adjacent ones of the first electrodes in a plan view.

Abstract: A method of forming a device includes providing a transistor having a gate structure and a source/drain structure adjacent to the gate structure. A cavity is formed along a sidewall surface of a contact opening over the source/drain structure. After forming the cavity, a sacrificial layer is deposited over a bottom surface and along the sidewall surface of the contact opening including within the cavity. A first portion of the sacrificial layer along the bottom surface of the contact opening is removed to expose a portion of the source/drain structure. A metal plug is then formed over the portion of the exposed source/drain structure. A remaining portion of the sacrificial layer is removed to form an air gap disposed between the metal plug and the gate structure. Thereafter, a seal layer is deposited over the air gap to form an air gap spacer.

Abstract: A system that includes an energy device having an active region configured to generate or consume electrical energy provided by an electrical current is discussed. A current limiter is disposed between the energy device and a current collector layer. The current limiter controls the current flow between the energy device and the current collector layer. A plurality of electrochemical transistors (ECTs) are arranged in an array such that each ECT in the array provides localized current control for the energy device. Each ECT includes a gate electrode, a drain electrode, a source electrode, and a channel disposed between the drain and the source electrodes. An electrolyte electrically couples the gate electrode to the channel such that an electrical signal at the gate electrode controls electrical conductivity of the channel. The current collector layer is a shared drain or source electrode for the ECTs.

Abstract: The semiconductor device of the present invention includes a first conductivity type semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode formed to come into contact with a surface of the semiconductor layer, and has a threshold voltage Vth of 0.3 V to 0.7 V and a leakage current Jr of 1×10?9 A/cm2 to 1×10?4 A/cm2 in a rated voltage VR.

Abstract: A semiconductor structure and fabrication method of forming a semiconductor structure. The structure is a MRAM element having a first conductive electrode embedded in a first interconnect dielectric material layer upon which a multi-layered magnetic tunnel junction (MTJ) memory element is formed in a magnetoresistive random access memory (MRAM) device area. The first conductive electrode includes a first end having a top surface of a first surface area and a second end having a bottom surface of a second surface area, the first surface area being smaller than the second surface area. The second end of the bottom electrode includes a barrier liner material including a metal fill material, and the first end of the bottom electrode is a pillar structure formed as a result of an etchback process in which the metal barrier liner is recessed relative to the metal fill material.

Abstract: Lamination transfer films and methods for transferring a structured layer to a receptor substrate. The transfer films include a carrier substrate having a releasable surface, a sacrificial template layer applied to the releasable surface of the carrier substrate and having a non-planar structured surface, and a thermally stable backfill layer applied to the non-planar structured surface of the sacrificial template layer. The sacrificial template layer is capable of being removed from the backfill layer, such as via pyrolysis, while leaving the structured surface of the backfill layer substantially intact.

Abstract: A method of operating a Continuous Liquid Interface Printing (CLIP) printer can include receiving a set of objectives for fabrication of an object using a CLIP printer and determining an orientation for fabrication of the object based on fulfillment of the set of objectives by simulated fabrication of the object.

Abstract: A SiC substrate of a semiconductor device includes: a drift region of a first conductivity type; a body region of a second conductivity type having a channel region which adjoins a first surface of the SiC substrate; a source region of the first conductivity type adjoining a first end of the channel region; an extension region of the first conductivity type at an opposite side of the body region as the source region and vertically extending to the drift region; a buried region of the second conductivity type below the body region and having a tail which extends toward the first surface and adjoins the extension region; and a compensation region of the first conductivity type protruding from the extension region into the body region along the first surface and terminating at a second end of the channel region opposite the first end.

Abstract: This disclosure relates to the technical field of semiconductors, and discloses a method for manufacturing semiconductor FinFET devices. The method particularly includes pre-removal of a predetermined thickness of a first region of an isolation region on sides of a fin that is not covered by a pseudo gate such that when a layer of second region of the isolation region covered by the pseudo gate is sacrificially removed during a removal of the pseudo gate, the upper surfaces of the remaining first region and the remaining second region of the isolation region are approximately leveled. By using such a method, DC and AC performances of a resulting FinFET device is improved.

Abstract: A method of producing semiconductor nanoparticles, semiconductor nanoparticles, and a light-emitting device are provided. The method includes heat-treating a mixture containing a salt of Ag, a salt containing at least one of In and Ga, an Se supply source, and an organic solvent at a temperature in the range of above 200° C. to 370° C. In the method, the ratio of the number of Ag atoms to the total number of In and Ga atoms in the mixture is above 0.43 to 2.5. The semiconductor nanoparticles contains Ag, at least one of In and Ga, and Se. The light-emitting device includes a light conversion member containing the semiconductor nanoparticles and a semiconductor light-emitting element.

Abstract: This light-receiving element includes: a substrate; a photoelectric conversion layer that is provided on the substrate and includes a first compound semiconductor, and absorbs a wavelength in an infrared region to generate electric charges; a semiconductor layer that is provided on the photoelectric conversion layer and includes a second compound semiconductor, and has an opening in a selective region; and an electrode that buries the opening of the semiconductor layer and is electrically coupled to the photoelectric conversion layer.

Abstract: A semiconductor device includes a substrate, in which a lower semiconductor layer, an insulating gapfill layer, and an upper semiconductor layer are sequentially stacked. A gate structure is disposed on the upper semiconductor layer. A source/drain electrode is disposed on a sidewall of the gate structure. A semiconductor pattern is disposed between the source/drain electrode and the upper semiconductor layer. The gate structure includes a gate electrode and a spacer structure. The spacer structure includes a first spacer pattern, a second spacer pattern, and a third spacer pattern, sequentially disposed on a sidewall of the gate electrode. The semiconductor pattern is extended to a region below a bottom surface of the third spacer pattern and is connected to the second spacer pattern.

Abstract: The semiconductor device of the present invention includes a first conductivity type semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode formed to come into contact with a surface of the semiconductor layer, and has a threshold voltage Vth of 0.3 V to 0.7 V and a leakage current Jr of 1×10?9 A/cm2 to 1×10?4 A/cm2 in a rated voltage VR.

Abstract: Methods, systems, and devices for memory device with a split pillar architecture are described. A memory device may include a substrate arranged with conductive contacts in a pattern and openings through alternative layers of conductive and insulative material that may decrease the spacing between the openings while maintaining a dielectric thickness to sustain the voltage to be applied to the array. After etching material, an insulative material may be deposited in a trench. Portions of the insulative material may be removed to form openings, into which cell material is deposited. Conductive pillars may extend perpendicular to the planes of the conductive material and the substrate, and couple to conductive contacts. The conductive pillars and cell material may be divided to form a first and second storage components and first and second pillars.