Patents Examined by Tuan Dinh
  • Patent number: 8611095
    Abstract: A proximity sensor for use in a portable computing device is described. In particular various embodiments of a proximity sensor which fit in an extremely small portion of a cellular phone, and accurately determine the presence of a user's head in close proximity to a surface of the cellular phone.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: December 17, 2013
    Assignee: Apple Inc.
    Inventors: Kelvin Kwong, Richard Hung Minh Dinh, Daniel William Jarvis, Brian Richards Land, Anant Rai
  • Patent number: 8159829
    Abstract: Relay substrate (1) connecting between at least a first circuit board and a second circuit board, including housing (10) having recess (10a) provided in the outer circumference and hole (22) provided in the inner circumference; plural connecting terminal electrodes (12a, 12c) connecting between the top and bottom surfaces of housing (10); shield electrode (11) provided in recess (10a); and ground electrode (13) provided on a part of the top and bottom surfaces of housing (10).
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: April 17, 2012
    Assignee: Panasonic Corporation
    Inventors: Masato Mori, Daido Komyoji, Koichi Nagai, Yoshihiko Yagi
  • Patent number: 7514637
    Abstract: The objective of present invention is to provide an electroplating solution capable of forming the upper face of a via-hole and the upper face of a conductor circuit in the same layer in approximately the same plane at the time of manufacturing a multilayer printed circuit board. The electroplating solution of the present invention is characterized by containing 50 to 300 g/L of copper sulfate, 30 to 200 g/L of sulfuric acid, 25 to 90 mg/L of chlorine ion, and 1 to 1000 mg/L of an additive comprising at least a levelling agent and a brightener.
    Type: Grant
    Filed: July 4, 2000
    Date of Patent: April 7, 2009
    Assignee: Ibiden Co., Ltd.
    Inventor: Honchin En
  • Patent number: 7505284
    Abstract: An electronic system comprising: an electronic system support substrate for the attachment of components of the electronic system, the electronic system support substrate including electric signal propagation paths for the propagation of electric signals between the system components; at least a first and a second electronic components wherein at least the first electronic component is part of a module in mechanical and electrical connection with the electronic system support substrate, the module comprising a module substrate to which the first electronic component is at least mechanically connected, and an electric coupling between the first and the second electronic components, for the electric coupling allowing the first and the second electronic components exchange of electric signals.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: March 17, 2009
    Assignee: International Business Machines Corporation
    Inventors: Bert J. Offrein, Stefano S. Oggioni, Mauro Spreafico
  • Patent number: 7486525
    Abstract: A temporary chip attach carrier for and a method of testing an integrated circuit chip. The carrier includes: a substrate, a first array of interconnects disposed on a bottom surface and a second array of interconnects disposed on a top surface of the substrate, corresponding interconnects of the first and second arrays of interconnects electrically connected by wires in the substrate; an interposer, a first array of pads disposed on a top surface of the interposer and a second array of pads disposed on a bottom surface of the interposer, corresponding pads of the first and second arrays of pads electrically connected by wires in the interposer, and pads of the second array in direct physical and electrical contact with corresponding interconnects of the second set of interconnects; and wherein the interposer includes an interposer substrate of the same material as a substrate of the integrated circuit chip.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: February 3, 2009
    Assignee: International Business Machines Corporation
    Inventor: John Ulrich Knickerbocker
  • Patent number: 7448909
    Abstract: A circuit board design is disclosed that is useful in high-speed differential signal applications uses either a via arrangement or a circuit trace exit structure. A pair of differential signal vias in a circuit board are surrounded by an opening that is formed within a ground plane disposed on another layer of the circuit board. The vias are connected to traces on the circuit board by way of an exit structure that includes two flag portions and associated angled portions that connect the flag portions to circuit board traces. In an alternate embodiment, the circuit board traces that leave the differential signal vias are disposed in one layer of the circuit board above a wide ground strip disposed on another layer of the circuit board.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: November 11, 2008
    Assignee: Molex Incorporated
    Inventors: Kent E. Regnier, David L. Brunker, Martin U. Ogbuokiri
  • Patent number: 7430125
    Abstract: A second ground plane (18); has one end opposite to a connector (14), which end is connected to a first ground plane (17) by resistor connection element (41). Accordingly, it is possible to lower Q of resonance of the ground structure by the resistor connection element (41) and to prevent generation of an intense electromagnetic field attributed to an electromagnetic field of a data processing circuit. Especially when the resistor connection element (41) has a resistance value identical to a characteristic impedance of the ground structure, the ground structure is terminated in a matched way and it is possible to assure prevention of generation of an electromagnetic field attributed to resonance.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: September 30, 2008
    Assignee: NEC Corporation
    Inventors: Hideki Sasaki, Toshihide Kuriyama
  • Patent number: 7425683
    Abstract: The present invention provides a flexible wiring substrate which does not form anomalous deposition of tin-bismuth alloy plating, through prevention of exfoliation, during the process of plating with tin-bismuth alloy, of a solder resist layer. The invention also provides a method for producing the flexible wiring substrate.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: September 16, 2008
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventor: Hiroaki Kurihara
  • Patent number: 7426113
    Abstract: An electronic device including a slot unit to which a memory medium is inserted. The electronic device is able to read out image data from the memory medium inserted to the slot unit. The slot unit includes a panel mounted to the front of the electronic device where the panel has a surface swelled toward the front side of the electronic device. The slot unit further includes a memory medium accommodating portion provided in the panel which on the swelled surface has an opening to which the memory medium is inserted. A mark representing the type of the memory medium to be inserted into the opening is provided at a position of the swelled surface corresponding to the upper side of the opening.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: September 16, 2008
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Takahiro Ikeno, Yasutake Yamaguchi
  • Patent number: 7420821
    Abstract: An electronic module includes an electronic circuit substrate, and a plurality of driving circuit boards attached to a terminal region of the electronic circuit substrate while being arranged adjacent to one another in the x direction. The driving circuit boards are electrically connected to one another. Adjacent driving circuit boards are electrically connected to each other by only substrate terminals provided on the electronic circuit substrate, with the connection resistance therebetween being about 10 ? or less.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: September 2, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoichiro Sakaki
  • Patent number: 7420820
    Abstract: A device for insertion and extraction of printed circuit boards or other components from a device or system such as a network router includes a positionable handle. The handle adjusts in a manner similar to a handle on a c-clamp, and may be repositioned relative to the centerline of a driveshaft of the device. Additionally, the handle may include internal detents that define selectable handle positions. Various handle positions may allow an operator to utilize limited available space and increase the mechanical advantage of the handle.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: September 2, 2008
    Assignee: Juniper Networks, Inc.
    Inventor: David J. Lima
  • Patent number: 7417872
    Abstract: Trace configurations for carrying high-speed digital differential signals provide for reduced conduction loss and improved signal integrity. In one embodiment, a circuit board has a first set of conductive traces disposed on non-conductive material, and a second set of conductive traces parallel to the first set and disposed within the conductive material. The second set is separated from the first set by non-conductive material. Corresponding traces of the first and second sets may be in a stacked configuration. In other embodiments, conductive material may be provided between corresponding traces of the first and second sets resulting in an “I-shaped” or “U-shaped” cross-section. In yet other embodiments, the trace configurations have “T-shaped” and “L-shaped” cross-sections.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: August 26, 2008
    Assignee: Intel Corporation
    Inventors: Yuan-Liang Li, Jiangqi He, Dong Zhong, David G. Figueroa
  • Patent number: 7417869
    Abstract: The present invention describes methods for enhancing the performance of two-capacitor low-pass filters. In certain embodiments of the invention, the capacitors are placed on opposite sides of a PCB board.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: August 26, 2008
    Assignee: Apple Inc.
    Inventor: Cheung-Wei Lam
  • Patent number: 7417870
    Abstract: A multi-layer board having a superior decoupling function in a low frequency band and a radio frequency band. The multi-layer board includes a board body having a plurality of stacked dielectric layers, power terminals connected through a via, ground terminals connected through a via and an integrated circuit component connected to the power and ground terminals. The multi-layer board also includes a power line unit connected to the power terminals and the integrated circuit component and a ground line unit connected to the ground terminals and the integrated circuit component. The multi-layer board further includes at least one multilayer chip capacitor mounted on the board body and connected between the power terminal and the ground terminal formed on the board body and at least one thin film capacitor mounted inside the board body and connected between the power line unit and the ground line unit.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: August 26, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sung Taek Lim, Yul Kyo Chung
  • Patent number: 7411796
    Abstract: A display apparatus having a display module to display images includes a first printed circuit board arranged on a rear side of the display module, a shielding cover to shield a rear side of the first printed circuit board to accommodate the first printed circuit board therein, a first connection port mounted on the first printed circuit board at an edge portion thereof and projected from a surface of the first printed circuit board, at least one second connection port mounted on the first printed circuit board adjacent to the first connection port and projected from the surface of the first printed circuit board by a second height different from the first height of the first connection port, a grounding bracket combined with the first printed circuit board and disposed over the first and second connection ports to be in contact with the first connection port, a second grounding plate arranged between the grounding bracket and the second connection port to be in contact with the grounding bracket and the seco
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: August 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jang-woo Lee, Ki-young Jang
  • Patent number: 7411134
    Abstract: Electrical mounting boards and methods for their fabrication and use are disclosed herein. In particular, such mounting boards embodiments utilize hybrid ground lines interconnected through a substrate core to form multilayer ground grids. Such hybrid ground lines include groups of substantially parallel ground lines configured such that the groups of ground lines are positioned in transverse arrangement with other groups of ground lines formed on the same level. Such implementations have many uses, including, but not limited to, the ability to more efficiently route signal lines and connect electrical components on a circuit board.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: August 12, 2008
    Assignee: Apple Inc.
    Inventors: Robert Steinfeld, Cheung-Wei Lam
  • Patent number: 7411795
    Abstract: Provided is a desktop holder for a portable terminal. The desktop holder for a portable terminal includes a main body and a soft member. The soft member is elastically assembled with the main body, has an opening corresponding to a shape of any portable terminal selected out of various kinds of portable terminals, and holds a selected portable terminal on the main body.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: August 12, 2008
    Assignee: Samsung Electronics Co., Ltd
    Inventors: In-Gon Park, Chang-Soo Lee
  • Patent number: 7408120
    Abstract: Disclosed is a PCB having axially parallel via holes, in which an outer ground via hole, acting as a ground, is formed around a via hole for intercircuit connection in the PCB, thereby minimizing the effect of noise caused by the via hole.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: August 5, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Young Woo Kim, Byoung Youl Min, Chang Myung Ryu, Han Kim
  • Patent number: 7405949
    Abstract: A memory system has first and second primary memories and first and second secondary memories coupled to the first and second primary memories, respectively, the coupling comprising at least one point-to-point connection. A memory module includes at least two of the first and second primary and first and second secondary memories. A first connection element, such as a connector or solder, connects the memory module to a mother board. A second connection element, such as a connector or solder, connects at least one other of the first and second primary and first and second secondary memories to the mother board. At least one of the memories on the first memory module is coupled to at least one of the other memories. The memory system also includes a memory controller which is connected to the primary memories by a point-to-two-point link.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: July 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Jun Lee, Joo-Sun Choi, Kyu-Hyoun Kim, Kwang-Soo Park
  • Patent number: 7405948
    Abstract: A circuit board device comprises a first wiring board (79) having plural first electrode terminals (73, 75, 77) for connection row-arranged on a surface layer, a second wiring board (87) having plural second electrode terminals (81, 83, 85) for connection row-arranged on a surface layer, and an anisotropic conductive member (89) disposed therebetween to the electrode terminals (73, 75, 77, 81, 83, 85). A local portion of each of the wiring boards (79, 87) has a step difference to divide and dispose the electrode terminals (73, 75, 77, 81, 83, 85). A local portion of the anisotropic conductive member (89) corresponding to the step difference has a step shape that is capable of contacting with the step difference. A laminate comprising respective wiring boards (79, 87) and the anisotropic conductive member disposed therebetween is pressed and held in a lamination direction.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: July 29, 2008
    Assignee: NEC Corporation
    Inventors: Junya Sato, Yoshiyuki Hashimoto, Masakazu Koizumi