Patents Examined by Tuan V. Thai
  • Patent number: 10671542
    Abstract: Apparatuses, methods and storage medium associated with application execution enclave memory page cache management, are disclosed herein. In embodiments, an apparatus may include a processor with processor supports for application execution enclaves; memory organized into a plurality of host physical memory pages; and a virtual machine monitor to be operated by the processor to manage operation of virtual machines. Management of operation of the virtual machines may include facilitation of mapping of virtual machine-physical memory pages of the virtual machines to the host physical memory pages, including maintenance of an unallocated subset of the host physical memory pages to receive increased security protection for selective allocation to the virtual machines, for virtualization and selective allocation to application execution enclaves of applications of the virtual machines. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: June 2, 2020
    Assignee: Intel Corporation
    Inventors: Vedvyas Shanbhogue, Ittai Anati, Francis X. McKeen, Krystof C. Zmudzinski, Meltem Ozsoy
  • Patent number: 10656865
    Abstract: Technologies are provided for backing virtualization containers with layered storage volumes stored in remote storage devices. A virtualization container can present a virtual storage volume to a process running in the virtualization container and handle data access requests from the process using a layered storage volume based on one or more read-only snapshots stored in one or more remote storage devices. Changes can be recorded in a read-write layer in one or more of the remote storage devices and associated with the layered storage volume. A new read-only snapshot can be created based on the data in the read-write storage layer and associated with the one or more read-only snapshots on which the layered storage volume is based. A virtualization container can be associated with a new layered storage volume based on the created read-only snapshot and the one or more read-only snapshots on which it is based.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: May 19, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Cornelle Christiaan Pretorius Janse van Rensburg, Samuel Benjamin Karp
  • Patent number: 10657069
    Abstract: A method includes accessing a cache including a first cache block and setting the first cache block to a passive sub-state, where the first cache block in the passive sub-state is configured to be accessed or modified. The method also includes receiving at least one access or modification request of the first cache block and transitioning the first cache block from the passive sub-state to an active sub-state. The method also includes incrementing an ordinal cache activation count at an active cache counter in response to the transitioning, where the active cache counter is configured to track the activation counts such that oldest cache use counts are designated to be overwritten in the cache in an oldest-first fashion.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: May 19, 2020
    Assignee: Seagate Technology LLC
    Inventors: Kishore Sampathkumar, Pradeep Balakrishnan, Shashikiran Venkatesh
  • Patent number: 10649892
    Abstract: Embodiments of the present disclosure provide a method of managing a redundant array of independent disks (RAID) system and an electronic device. The method includes configuring a plurality of disks in the RAID system as a raw mirror for storing configuration data of the RAID system; storing metadata for the raw mirror in the plurality of disks, the metadata stored in each of the plurality disks including an identifier identifying that the disk belongs to the raw mirror and a sequence number identifying a writing operation for a block storing the metadata in the disk; and controlling reading and writing of the raw mirror based on the metadata.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: May 12, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Hongpo Gao, Ree Sun, Huadong Li, Wayne Li, Jibing Dong, Shaoqin Gong
  • Patent number: 10649666
    Abstract: An apparatus includes a first circuit and a second circuit. The first circuit may be configured to traverse a list of connected components forming an object. The list generally comprises object IDs and link pointers for each component of the object. The link pointers generally identify links from a current leaf component to a root component of the object. The second circuit may be configured to modify at least the link pointer associated with the current leaf component to point to the root component.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: May 12, 2020
    Assignee: Ambarella International LP
    Inventor: Yen-Hsu Shih
  • Patent number: 10642532
    Abstract: A method for execution by a storage unit in a dispersed storage network (DSN) includes selecting a storage zone of a memory device of the storage unit based on zone allocation parameters, and designating the selected storage zone as open for writes. A data slice is received via a network for storage. The data slice is written sequentially at a memory location of the one of storage zone based on determining that the storage zone is designated as open for writes. A pointer corresponding to the data slice that indicates the storage zone and the memory location is generated. A read request is received via the network from a requesting entity that indicates the data slice. The data slice is retrieved from the memory device based on the pointer, and is transmitted to the requesting entity.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: May 5, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andrew D. Baptist, Manish Motwani, Praveen Viraraghavan, Ilya Volvovski
  • Patent number: 10642500
    Abstract: Systems and methods for intelligent fetching of data storage device commands from submission queues are provided. One such method involves fetching commands from one or more submission queues, monitoring characteristics of the commands including a command type, predicting a next command based on the monitored command characteristics, monitoring a resource state of a data storage device, selecting a submission queue based on the predicted next command and the resource state, fetching a command from the selected submission queue, and providing the command from the selected submission queue to command processing logic.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: May 5, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Shay Benisty
  • Patent number: 10635356
    Abstract: A data management method and a storage controller are provided. The method includes: receiving write sectors corresponding to a write command and transmitting the write sectors to a partial block buffer or a full block buffer; when the write sectors corresponding to a first block are transmitted to the partial block buffer, starting a timer corresponding to the first block; when the partial block buffer receives first write sectors corresponding to the first block and the first write sectors and the write sectors corresponding to the first block in the partial block buffer form a full first block, the first block is transmitted to the full block buffer before or when the timer is expired; and when the timer is expired and the full first block is not yet formed in the partial block buffer, performing a read-modify-write operation according to the write sectors corresponding to the first block.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: April 28, 2020
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Di-Hsien Ngu, Ke-Wei Chan, Hung-Chih Hsieh
  • Patent number: 10635342
    Abstract: Direct data transfer between devices having a shared bus may be implemented with reduced involvement from a controller associated with the devices. A controller, a source memory device, and a target memory device may be coupled with a shared bus. The controller may identify a source address at the source memory device for data to be transferred to the target memory device. The controller also may identify a target address in the target memory device, and initiate a data transfer directly from the source to the target through a command that is received at both the source and the target memory device. In response to the command, the source memory device may read data out to the bus, and the target memory may read the data from the bus and store the data starting at the target address without further commands from the controller.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: April 28, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Yihua Zhang, James Cooke
  • Patent number: 10635341
    Abstract: A method of indirection replay for a flash storage system includes writing data, in a host stream, to blocksets of the flash storage system. The host blocksets are assigned a major sequence number incremented from the most recently closed host blockset. The method includes writing an indirection journal to each host blockset which are associated with the assigned major sequence number. The method includes writing data, in a garbage collection (GC) stream, to other blocksets of the flash storage system. The GC blocksets are assigned a major sequence number, based on the most recently closed host blockset, and a minor sequence number, incremented from the most recently closed GC blockset. The method includes writing an indirection journal to each GC blockset which are associated with the assigned major and minor sequence numbers. The indirection table is constructed by replaying the journals of the blocksets in order of major sequence and minor sequence numbers.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: April 28, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: David George Dreyer, Colin Christopher McCambridge, Phillip Peterson, Sanjay Subbarao
  • Patent number: 10620871
    Abstract: An application executing on a first computing platform includes containers executing role instances. One or more logical storage volumes include segments allocated to the application and references in a mapping table. The mapping table indicates a tier ID corresponding to the computing platform on which each segment is located. A snapshot of the application may be restored on a second computing platform. The mapping table may be copied to the second computing platform and used without transferring segments from the first computing platform to the second computing platform. Reads will be routed to the first computing platform using the tier ID in the mapping table.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: April 14, 2020
    Assignee: ROBIN SYSTEMS, INC.
    Inventors: Jagadish Kumar Mukku, Kallur Vasudeva Rao Narasimha Subban
  • Patent number: 10621100
    Abstract: In an embodiment, a processor may implement an access map-pattern match (AMPM)-based prefetch circuit for a multi-level cache system. The access patterns that are matched to the access maps may include prefetches for different cache levels. Centralizing the generation of prefetches into one prefetch circuit may provide better observability and controllability of prefetching at various levels of the cache hierarchy, in an embodiment. Prefetches at different levels may be controlled individually based on the accuracy of those prefetches, in an embodiment. Additionally, in an embodiment, access patterns that are longer that a given threshold may have the granularity of the prefetches change so that more data is prefetched and the prefetches occur farther in advance, in some embodiments.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: April 14, 2020
    Assignee: Apple Inc.
    Inventors: Stephan G. Meier, Tyler J. Huberty, Gerard R. Williams, III, Pradeep Kanapathipillai
  • Patent number: 10613976
    Abstract: The present disclosure directs to solutions for performing deduplication by a storage device. In the solutions, according to a duplicate data locality principle, non-duplicate data blocks whose logical addresses are contiguous are stored in contiguous physical addresses in a sequence of the logical addresses, and fingerprints of the non-duplicate data blocks whose logical addresses are contiguous are also stored in contiguous physical addresses in the sequence of the logical addresses, and in addition, a mapping from a logical address, which is of one data block in the non-duplicate data blocks whose logical addresses are contiguous, to an aggregation address is established.
    Type: Grant
    Filed: April 22, 2018
    Date of Patent: April 7, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zongquan Zhang, Chengwei Zhang
  • Patent number: 10614004
    Abstract: Examples of techniques for memory transaction prioritization for a memory are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method includes allocating, by a memory controller, a reserved portion of the memory controller to execute transactions. The method further includes receiving, by the memory controller, a priority based transaction from a processor to the memory. The method further includes determining, by the memory controller, whether to accommodate the priority based transaction based at least in part on a current processing state of the memory controller. The method further includes, based at least in part on determining to accommodate the priority based transaction, accommodating the priority based transaction by performing at least one of dropping a speculative command in a queue or using the reserved portion of the memory controller to execute the priority based transaction.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: April 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Irving G. Baysah, Prasanna Jayaraman
  • Patent number: 10613786
    Abstract: In one embodiment, a guest operating system in a host computer receives a write command for a partition in a plurality of partitions of a heterogeneous disk. The heterogeneous disk is mounted in the guest operating system. The guest operating system reads service level agreement level information for the partition and inserts the service level agreement level information in a field of the write command. Then, the write command is sent to a heterogeneous disk layer where the heterogeneous disk layer uses the service level agreement information in the field to select a storage device associated with the service level agreement information.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: April 7, 2020
    Assignee: VMware, Inc.
    Inventors: Vineet Rajani, Nagendra S. Tomar
  • Patent number: 10606750
    Abstract: A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: March 31, 2020
    Assignee: Mallanox Technologies Ltd.
    Inventors: Matthew Mattina, Chyi-Chang Miao
  • Patent number: 10606751
    Abstract: An input/output (I/O) device arranged to receive an information element including a payload, determine control information from the information element, classify the information element based on the control information, and issue a write to one of a plurality of computer-readable media based on the classification of the information element, the write to cause the payload to be written to the one of the plurality of computer-readable media.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: March 31, 2020
    Assignee: INTEL CORPORATION
    Inventors: Andrew Cunningham, Mark D. Gray, Alexander Leckey, Chris MacNamara, Stephen T. Palermo, Pierre Laurent, Niall D. McDonnell, Tomasz Kantecki, Patrick Fleming
  • Patent number: 10606802
    Abstract: A computer-implemented method according to one embodiment includes intercepting one or more updates made to a catalog data set, storing the one or more updates in an update buffer, retrieving the one or more updates from the update buffer, sequentially applying the one or more updates to a backup catalog data set, identifying a request to replace the catalog data set, and replacing the catalog data set with the backup catalog data set, in response to the request.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: March 31, 2020
    Assignee: International Business Machines Corporation
    Inventors: Derek L. Erdmann, Eric J. Harris, Franklin E. Mccune, Thomas C. Reed
  • Patent number: 10607665
    Abstract: Examples of the present disclosure provide apparatuses and methods for span mask generation. An example method comprises creating, using sensing circuitry, a number of bit vectors, wherein each of the number of bit vectors includes a repeating pattern based on a size of the number of bit vectors and a particular mask depth.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: March 31, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Sanjay Tiwari
  • Patent number: 10599570
    Abstract: Map data is fetched into a memory of a computing device for generating a digital map of a geographic area. In response to a request for the digital map, the map data is retrieved from the memory to generate the digital map. A determination is made whether a user of the computing device is likely to request the digital map again within a certain period of time, and a time when the map data should be removed from the memory is then determined based at least in part on this determination. The map data is removed from the memory at the determined time.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: March 24, 2020
    Assignee: GOOGLE LLC
    Inventors: Yiyang Joy Ding, Jennifer Maurer