Patents Examined by Tung X. Nguyen
  • DC power rail probes and measurement methods
    Patent number: 11644488
    Abstract: A direct current (DC) power rail probe includes a single-ended probe tip, and a two-path circuit having an input coupled to the single-ended probe tip and an output configured for connection to measurement equipment such as an oscilloscope. The two-path circuit includes an alternating current (AC) path in parallel with a feed-forward (FF) path, the AC path including a capacitive element, and the FF path including a series connection of at least one resistive element and an amplifier. The probe tip and two-path circuit are selectively operable in a non-attenuating mode and an attenuating mode.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: May 9, 2023
    Assignee: KEYSIGHT TECHNOLOGIES, INC.
    Inventors: Edward Vernon Brush, Michael Thomas McTigue
  • Integrated circuit testing apparatus and method
    Patent number: 11639956
    Abstract: A test socket comprising a guide plate with a lower surface engaged with an upper surface of a main test structure, the guide plate further including an upper surface which is parallel to the lower surface and an opening extending through the guide plate, the main test structure includes a body with one or more apertures through the upper surface and one or more probes mounted within the main test structure, the probes including a front end which extends through the apertures for engagement by a lead or terminal pad of a device to be tested, and a tail end which is secured within the main test structure by an elastomeric material.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: May 2, 2023
    Assignee: UI Green Micro & Nano Technologies Co Ltd
    Inventors: Mark Zhang, Arvin Guo, Jeff Tamasi, Steve Liu
  • Voltage tracking circuit and method of operating the same
    Patent number: 11639958
    Abstract: A voltage tracking circuit includes first, second, third and fourth transistors. The first transistor is in a first well, and includes a first gate, a first drain and a first source coupled to a first voltage supply. The second transistor includes a second gate, a second drain and a second source. The second source is coupled to the first drain. The second gate is coupled to the first gate and the pad voltage terminal. The third transistor includes a third gate, a third drain and a third source. The fourth transistor includes a fourth gate, a fourth drain and a fourth source. The fourth drain is coupled to the third source. The fourth source is coupled to the pad voltage terminal. The fourth transistor is in a second well different from the first well, and is separated from the first well in a first direction.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 2, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiang-Hui Cheng, Chia-Jung Chang
  • Sensor and electric device
    Patent number: 11639946
    Abstract: According to one embodiment, a sensor includes a base including a first face including a first face region, and a first structure body fixed to the first face region. The first structure body includes a first support portion fixed to the first face region, a second support portion fixed to the first face region, a first movable portion, and a first fixed electrode fixed to the first face region. The first movable portion is supported by the first and second support portions and apart from the base in a first direction crossing the first face region. The first movable portion includes a first movable electrode facing the first fixed electrode, and a first conductive member. A first current flows the first conductive member along a second direction crossing the first direction. A first gap is provided between the first fixed electrode and the first movable portion.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: May 2, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroaki Yamazaki
  • Low-voltage power switch and arc fault detection unit
    Patent number: 11639949
    Abstract: A Rogowski coil is used for determining the magnitude of the electrical current of a conductor of a low-voltage AC circuit, which outputs an analogue voltage which is equivalent to the magnitude of the electrical current of the conductor. The Rogowski coil is connected to an analogue integrator, which is followed by an analogue-digital converter, which converts the integrated analogue voltage into a digital signal which is further processed by a microprocessor in such a way that the phase shift generated by the Rogowski coil and the components connected downstream of the Rogowski coil is compensated such that there are in-phase current values for the detection of error situations in order to protect the low-voltage AC circuit, in particular for a low-voltage power switch or an arc fault detection unit.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: May 2, 2023
    Assignee: Siemens Aktiengesellschaft
    Inventors: Joerg Meyer, Peter Schegner, Karsten Wenzlaff
  • Dynamic magnetic vector fluxgate magnetometer and methods of using
    Patent number: 11639972
    Abstract: The present invention relates to a sensor suite comprising at least one sensor. More particularly, the present invention relates to a sensor suite for measuring absolute and/or relative position, location and orientation of an object on or in which the sensor suite is employed. The present invention further relates to improved, novel sensor types for use in the sensor suite. More particularly, the present invention relates to an improved, novel magnetometer that is self-calibrating and scalable. Still more particularly, the present invention relates to such a magnetometer that is miniaturized. Further embodiments of the present invention relate to systems and methods for providing location and guidance, and more particularly for providing location and guidance in environments where global position systems (GPS) are unavailable or unreliable (GPS denied and/or degraded environments).
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: May 2, 2023
    Assignee: Orbital Research Inc.
    Inventors: Anthony Opperman, Edward J. Rapp
  • Chip testing apparatus
    Patent number: 11630148
    Abstract: A chip testing apparatus including a chip testing machine, a temperature testing device, and a lid is provided. The chip testing machine includes a substrate and a plurality of chip testing sockets. Each of the chip testing sockets is disposed on the substrate and configured to carry a chip under test. The temperature adjusting device is disposed on the chip testing machine, and the lid covers the temperature adjusting device and the chip testing sockets. The temperature adjusting device includes a main body and a plurality of pressing components. The main body includes a plurality of fluid channels, and each of the pressing components can press one side of one of the chips under test. A fluid can flow into one of the fluid channels and flow through the pressing components, so that the chips under test are in an environment having a predetermined temperature.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: April 18, 2023
    Assignee: ONE TEST SYSTEMS
    Inventors: Chen-Lung Tsai, Gene Rosenthal
  • Temperature adjusting device
    Patent number: 11624776
    Abstract: A temperature adjusting device including a main body and a pressing component is provided. The main body includes a first main body thru-hole and a second main body thru-hole. The main body has a first fluid channel and a second fluid channel therein, the first fluid channel is in spatial communication with the first main body thru-hole, and the second fluid channel is in spatial communication with the second main body thru-hole. The pressing component partially protrudes from one side of the main body, the pressing component has a fluid accommodating slot therein that is in spatial communication with the first fluid channel and the second fluid channel. A fluid having a predetermined temperature can enter into the main body from the first main body thru-hole, enter into the fluid accommodating slot through the first fluid channel, and exit the main body through the second main body thru-hole.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: April 11, 2023
    Assignee: ONE TEST SYSTEMS
    Inventors: Chen-Lung Tsai, Gene Rosenthal
  • High-side gate over-voltage stress testing
    Patent number: 11624769
    Abstract: A field effect transistor (FET) engager, for example, includes electrically coupling a gate driver to a gate of a FET for testing the FET. The FET engager further includes providing a probe pad for test instrument measurement of the FET without test instrument capacitance impacting operation of the FET. The FET engager can electrically couple to the gate of the FET hold the gate of the FET at a low voltage while the source and drains are stress tested. The FET engager provides fail-safe mechanisms against accidental turn-on of the FET during operation. The FET engager can provide a second probe pad for selective test instrument turn-on of a second FET. The FET engager can allow test instrument measurement of gate current of the FET without test instrument capacitance impacting operation of the FET.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: April 11, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Sigfredo E. Gonzalez Diaz, Benjamin Lee Amey, Patrick Michael Teterud, Hung Nguyen
  • Source measure apparatus including feedback path and measurement path
    Patent number: 11619666
    Abstract: A measurement apparatus includes external terminals configured for connection to a device-under-test (DUT), the external terminals including first and second force terminals and first and second sense terminals. The measurement apparatus further includes a controller and a feedback loop configured in a current feedback mode to sense a current flowing from the first force terminal to the second force terminal, and in a voltage feedback mode to sense a voltage across the first and second sense terminals. The measurement apparatus further includes a measurement path configured to measure a least one of a voltage and current across a pair of the external terminals and to supply the measured at least one of the voltage and current to the controller.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: April 4, 2023
    Assignee: Keysight Technologies, Inc.
    Inventors: Nobuaki Iwaki, Yasuhiro Miyake, Masaki Sato, Hiroshi Nada
  • Calibration of magnetic field sensor for current probe
    Patent number: 11619697
    Abstract: A test and measurement instrument for measuring a current in a device under test, comprising an input configured to receive signals from a magnetic field probe; and one or more processors configured to measure, from a signal from the magnetic field probe, a magnetic field generated by a current-carrying conductor of the device under test based on a known current, determine a calibration factor based on the known current and the magnetic field, and generate a calibrated measurement of an unknown current in the current-carrying conductor using a magnetic field generated by the current-carrying conductor based on the unknown current and the calibration factor.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: April 4, 2023
    Assignee: Tektronix, Inc.
    Inventor: Daniel G. Knierim
  • End-of-life prediction for circuits using accelerated reliability models and sensor data
    Patent number: 11609265
    Abstract: In some examples, a circuit may be configured to perform a method that includes performing a circuit function via a circuit function unit of a circuit, receiving sensor data from one or more sensors associated with the circuit function unit, and estimating a remaining life of the circuit based on an accelerated reliability model and the sensor data, wherein the sensor data comprises input to the accelerated reliability model. The circuit itself may include a dedicated circuit unit that estimates the remaining life of the circuit based on an accelerated reliability model and the sensor data, and the circuit may output one or more predictive alerts or predictive faults when the remaining life is below a threshold, which may prompt the system for predictive maintenance on the circuit.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: March 21, 2023
    Assignee: Infineon Technologies AG
    Inventors: Ludwig Rossmeier, Georg Georgakos, Bernhard Gstoettenbauer, Dirk Hammerschmidt, Veit Kleeberger, Rafael Zalman, Thomas Zettler
  • Immunity evaluation system and immunity evaluation method
    Patent number: 11609267
    Abstract: Provided is an immunity evaluation system that enables design feedback in consideration of a subject wiring and an improvement amount for improving an electromagnetic noise resistance of a circuit board. An immunity evaluation device includes: a storage unit configured to store characteristic data including probe-circuit board wiring coupling characteristics which are determined by a combination of a near-field probe and circuit board characteristics, and a test result; and an IC reaching signal level estimation unit configured to estimate a signal level reaching a terminal of an evaluation target IC. The immunity evaluation device receives board design information, information of the near-field probe, and test waveform instruction information of a signal applied to the near-field probe.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: March 21, 2023
    Assignee: Hitachi, Ltd.
    Inventors: Isao Houda, Aya Ohmae, Umberto Paoletti
  • Failure pattern obtaining method and apparatus
    Patent number: 11609263
    Abstract: A failure pattern obtaining method and apparatus are provided. The method includes that: a chip test result picture for a wafer is obtained, the chip test result picture being marked with a plurality of failure test points; a vector for every two points among all failure test points is calculated; a plurality of failure test points having a same vector are designated as a same group; a plurality of pending failure patterns are separated from each of groups; a failure pattern is obtained based on the plurality of the pending failure patterns.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: March 21, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Chiasheng Lin
  • Fast LCR meter with leakage compensation
    Patent number: 11609593
    Abstract: An LCR meter with a fast balancing method, with only one necessary measurement of voltages. The LCR meter uses to speed up balancing, separation in time measurement of a device under test (DUT), and other parasitic impedances, including a leakage impedance. The leakage impedance and the other parasitic impedances of a fixture and the LCR meter itself are measured during open/short calibration and saved to memory. The DUT is measured during measurement using already known parasitic impedances. This allows calculating balancing conditions using only one measurement of voltages.
    Type: Grant
    Filed: April 2, 2022
    Date of Patent: March 21, 2023
    Inventor: Oleksandr Kokorin
  • Active thermal interposer device
    Patent number: 11609266
    Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: March 21, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Thomas Jones
  • Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cell
    Patent number: 11605526
    Abstract: Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: March 14, 2023
    Assignee: PDF SOLUTIONS, INC.
    Inventors: Indranil De, Jeremy Cheng, Thomas Sokollik, Yoram Schwarz, Stephen Lam, Xumin Shen
  • System and method for compensating for power loss due to a radio frequency (RF) signal probe mismatch in conductive signal testing
    Patent number: 11598803
    Abstract: System and method for compensating for power loss due to a radio frequency (RF) signal probe mismatch in conductive RF signal testing of a RF data signal transceiver device under test (DUT). Sourcing the RF test signal with the RF vector signal transceiver at multiple test frequencies enables isolation of and compensation for power loss due to a mismatch between the RF signal probe and RF DUT connection based on predetermined losses of the RF signal path.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: March 7, 2023
    Assignee: LITEPOINT CORPORATION
    Inventors: Chen Cao, Christian Volf Olgaard, Ray Wang
  • Fast LCR meter with sub-balancing
    Patent number: 11592858
    Abstract: An LCR meter to increase accuracy of balancing uses sub-balancing method, additional to analog balancing by trans-impedance amplifier (TIA). For this, the LCR meter, based on TIA, to correct analog auto-balancing, applies the inverted voltage equal to unbalanced voltage to noninverting input of the TIA. And only one measurement of voltages is needed for.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: February 28, 2023
    Inventor: Oleksandr Kokorin
  • Test handler having multiple testing sectors
    Patent number: 11592477
    Abstract: A test handler comprising a primary rotary turret comprising pick heads for transporting electronic components, and a secondary rotary turret arranged and configured to receive electronic components directly or indirectly from the primary rotary turret, the secondary rotary turret including multiple separate test sectors having component carriers for carrying the electronic components received from the primary rotary turret, wherein the multiple test sectors are rotatably movable relative to one another. The test handler also comprises at least one testing device positioned along a periphery of the secondary rotary turret, wherein the component carriers of the respective test sectors are operative to convey the electronic components to a position of the at least one testing device for testing.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: February 28, 2023
    Assignee: ASMPT SINGAPORE PTE. LTD.
    Inventors: Chi Wah Cheng, Kai Fung Lau, Yu Sze Cheung