Patents Examined by U Chauhan
  • Patent number: 5517610
    Abstract: A portrait drawing apparatus having a facial part data table comprising data about the correspondence of component facial parts of portraits to different facial expressions. When it is desired to modify the previously drawn portrait of the same person with a different facial expression, the facial parts corresponding to the desired facial expression are determined to replace the applicable old facial parts. Substituting the newly selected facial parts for the old allows the portrait with the designated facial expression to be drawn with ease.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: May 14, 1996
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Yumiko Takeda, Satoru Makino, Mina Kawai
  • Patent number: 5515492
    Abstract: A system of transactional processing between an information processing server and a plurality of workstations, constituted on the one hand by three files that reflect the states of progress of tasks assigned to the actor using this interface, that is, the "new" file (40), the "ongoing" file (50), and the "executed" file (60) that are stored in memory, the first containing the tasks newly assigned to the actor, the second containing the tasks accepted, that are in the course of being executed or have temporarily been suspended, and the third containing the tasks accomplished, sent to others or abandoned, and on the other hand, means with which the files can be opened, means for describing the files, and means for representing the notes received.
    Type: Grant
    Filed: June 8, 1993
    Date of Patent: May 7, 1996
    Assignee: Bull, S.A.
    Inventors: Jianzhong Li, Jerome Boudier, Isabelle Vilm
  • Patent number: 5511160
    Abstract: An information retrieval device displays portions of a document requested by a user. The information retrieval device has a controller connected to a display screen, input selector switches, such as buttons, and non-volatile memory, such as a removable ROM. One or more documents, such as a book or magazine, is stored in the non-volatile memory. When the device is turned on, a first portion of a document is displayed on a display screen. When the user wants to see a different portion of the document, or a different document altogether, she presses one of the buttons. Upon detection that a button was enabled, an action is performed that changes the display on the display screen. The action performs can vary in complexity: it may simply cause the next page of the document to be displayed, or may execute a nested hypertext link to cause related information contained in the same or a different document to update only a portion of the display screen.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: April 23, 1996
    Assignee: Hewlett-Packard Company
    Inventor: Christopher J. Robson
  • Patent number: 5504855
    Abstract: A frame buffer for accelerating the display of graphics data on an output display device which frame buffer includes a pair of color value registers each of which may be loaded with color values prior to writing to the frame buffer. Selection means are provided for selecting pixel data from the bus, from a first of the color value registers, from the second of the color value registers, or from both color value registers simultaneously. When data is written to the frame buffer from color value registers it may be written to a number of pixel positions simultaneously.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: April 2, 1996
    Assignees: Sun Microsystems, Inc., Samsung Semiconductors
    Inventors: Curtis Priem, Chris Malachowsky, Rick Silverman, Shuen C. Chang
  • Patent number: 5502803
    Abstract: When a line is drawn on a screen with a coordinate input pen in a specific shape, the shape of the line drawing is collated with a reference stroke stored in a gesture table. As a result, an edit instruction corresponding to the shape of the line drawing is specified and executed. This function is called a gesture editing function. Here, the coordinate system which is the most suitable for computing the editing position on the screen is selected according to a given edit instruction. Thus, displacement of an editing position due to shaking of the user's hand can be avoided, thereby accurately executing the edit instruction. Moreover, the combination between the reference stroke and the edit instruction in the gesture table can be changed as desired by a key-operation according to the use of the user. Thus, a more convenient gesture editing function for the user can be achieved.
    Type: Grant
    Filed: January 13, 1994
    Date of Patent: March 26, 1996
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroichi Yoshida, Junko Morimura, Kazuhiko Matsuo, Kazuhiko Takata
  • Patent number: 5497455
    Abstract: When the MS-DOS is not installed from an FDD or an HDD but is installed from a built-in DOS ROM arranged in a memory space in which bank access to the computer main body can be performed, at the time the system power is turned on, a menu display processing program stored in the DOS ROM is executed by the DOS. Upon execution of the program, the arrangement of menu icons can be arbitrarily changed on the menu screen.
    Type: Grant
    Filed: June 25, 1993
    Date of Patent: March 5, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masao Suga, Syuzo Nakajima, Tadaaki Inomata, Toshimitsu Saito, Atsuhiro Outake, Yoshiaki Iba, Hidekazu Mihara, Hirofumi Nishikawa, Nobuyuki Nanno, Shigeru Satake
  • Patent number: 5493643
    Abstract: An image generator architecture in which tri-level fixed interleave processing provides medium grain parallelism for polygon, tiling, and pixel operations. Input data at each stage are divided into spatially distributed subsets that are interleaved among parallel processors using a fixed, precalculated mapping that minimizes correlation of local scene complexity with any one processor. The present tri-level fixed interleave processing architecture divides a processing task into a pseudo-random, fixed interleaved pattern of regions that are assigned to different processors. Each processor processes many of these randomly located regions. The assignment of processors to regions is a fixed repeating pattern. The highest level of fixed interleave processing is the allocation of fixed-size database regions (area modules) to polygon processors. The next level relates to image sub-region fixed interleave processing.
    Type: Grant
    Filed: May 3, 1994
    Date of Patent: February 20, 1996
    Assignee: Loral Aerospace Corp.
    Inventors: Brian T. Soderberg, Dale D. Miller, Douglas Pheil, Kent Cauble, Mark N. Heinen, Mark L. Kenworthy
  • Patent number: 5491785
    Abstract: An information retrieval device displays portions of a dynamically modifiable document requested by a user. The information retrieval device has a controller connected to a display screen, input selector switches, such as buttons, and memory, such as non-volatile flash memory. One or more documents, such as a newspaper or magazine, is stored in the memory. A receiver, such as a pager, modem, or FM radio receiver, is connected to and dynamically updates the memory. When the device is turned on, a first portion of a document is displayed on a display screen. When the user wants to see a different portion of the document, or a different document altogether, she presses one of the buttons. Upon detection that a button was enabled, an action is performed that changes the display on the display screen.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: February 13, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Christopher J. Robson, Gregory J. May
  • Patent number: 5483633
    Abstract: A user can specify search criteria which will occur in the future in order to have an object on a data processing system automatically surfaced to a user interface. Once the search criteria is specified, the present invention monitors object for the search criteria. Monitoring occurs by determining when an object changes and then searching the changed object for the search criteria. If the search criteria is found, an identifier is loaded into a queue. The first identifier into the queue causes the object that is associated with the first identifier to become automatically surfaced on the user interface. The user can then surface any other objects that are identified in the queue, or can return to the object that was presented on the user interface just prior to the automatic surfacing.
    Type: Grant
    Filed: June 29, 1993
    Date of Patent: January 9, 1996
    Assignee: International Business Machines Corporation
    Inventor: William J. Johnson
  • Patent number: 5471675
    Abstract: A video framework for use in a data processing system provides parallel hierarchies of video device drivers and video device handles, which are created by video device driver objects, and a hierarchy of data encapsulators contained by a subclass of the hierarchy of video device handles to encapsulate configuration information describing the functionality of a display device connected to a data processing system. Applications access video device drivers through ones of the video device handles at respective levels of the video device handle hierarchy. When a change of configuration is made or requested in for the data processing system or any display connected thereto, corresponding video display handles issue a signal to lock down drawing tasks before video handles are created or altered to carry out the configuration change.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: November 28, 1995
    Assignee: Taligent, Inc.
    Inventor: Jeff Zias
  • Patent number: 5463732
    Abstract: In a parallel processing computer containing a plurality of processors, each connected to a memory unit, a method and apparatus for accessing a distributed data buffer. Each of the processors within the computer executes a first routine for processing input data to generate output data. During processing, some or all of the data associated with the processing is temporarily stored within a predefined portion of each of the memory units that form a portion of the distributed data buffer. Upon occurrence of an interrupt signal, execution of the first routine is halted. Also, the status of the computer at the time the interrupt signal occurred is stored in memory. Thereafter, a second routine (an interrupt routine) is executed to access the data stored in the data buffer. Once the data is accessed, the status of the computer is restored in accordance with the previously stored computer status information.
    Type: Grant
    Filed: May 13, 1994
    Date of Patent: October 31, 1995
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Herbert H. Taylor, James T. C. Kaba
  • Patent number: 5459833
    Abstract: A display control system for a notebook type personal computer, word processor or similar electronic apparatus requiring a power saving implementation. The system has a first memory for storing graphic data, and a control section for reading the graphic data out of the first memory repetitively. The control section has a circuit for determining whether or not the graphic data each being stored in a respective address of the first memory to be displayed side by side in a picture of the display are identical with each other, and a second memory for memorizing whether or not the data are identical with each other. When the content of the second memory is representative of identity of graphic data, the control section causes the graphic data to be displayed without reading the first memory, thereby reducing the power consumption of the system.
    Type: Grant
    Filed: December 15, 1993
    Date of Patent: October 17, 1995
    Assignee: Ricoh Company, Ltd.
    Inventor: Yoshiyuki Nishizawa
  • Patent number: 5457777
    Abstract: A screen editor and screen editing method for extracting part of one screen to insert it into another screen includes first and second memories for storing input screen data, an output selection switch for transmitting either of the screen data read out from the first or second memories, a coordinates designator for designating an extracted region of the second memory and an inserting reference point of the first memory, a controller for calculating editing data containing the addresses of the inserting reference point, extracting reference point and region increments, and controlling the memories and coordinates designator, and an address generator for generating the read addresses of the first and second memories and controlling the output selection switch.
    Type: Grant
    Filed: May 28, 1992
    Date of Patent: October 10, 1995
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang-sin Park
  • Patent number: 5455905
    Abstract: An electronic connecting system is arranged to have an electronic main body, a display device and a communication device connecting both of them with each other. The main body includes an input section, a first processing section, a first storage section, a first display section, and a first communication section. The data is input through the input section and is processed in the processing section based on the application stored in the storage section. The processed result appears on the display section and is sent to the display device through the communication section. The display device includes a second communication section, a second storage section, a second processing section, and a second display section. The input key codes and the application is sent from the main body to the display device through the second communication section. The application is stored in the second storage section. The processing section processes the input key codes based on the application.
    Type: Grant
    Filed: July 7, 1993
    Date of Patent: October 3, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Syuuji Kaya, Michiaki Kuno
  • Patent number: 5455908
    Abstract: In an address formation circuit for an image processing, an address formation is separately processed in parallel like a pipeline by first and second address calculation means. The first address calculation means controllable by a program calculates a head address of a macroblock, and the second address calculation means calculates addresses of pixels within the macroblock on the basis of the head address calculated by the first address calculation means. An instruction memory stores the program and a data memory and a data file memory store address moving amounts required the calculations. A sequence controller controls an exclusive hardware. Hence, a high speed memory access like a real time image processing in the address formation can be possible and, when a complicated address pattern is required, an overhead of the address formation time in the instruction processing can be prevented.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: October 3, 1995
    Assignee: NEC Corporation
    Inventor: Hideo Ishida
  • Patent number: 5455906
    Abstract: An electronic board system has a reduced display region at a lower portion of a writing screen on its electronic board, in addition to a non-reduced display region. A character, an image such as a graphic, etc., and an edit command, written on the reduced display region, can be entered into the electronic board system, and can be displayed on the non-reduced display region of the writing screen of the electronic board. Hence, the image displayed on the non-reduced display region can be seen by other persons in front of the electron board without interference from a shadow of the writer, and the electronic board can be manipulated with readiness and at high precision by a person who cannot reach an upper portion of its writing screen. Further, sensors capable of sensing the traces of the image are embedded in the rear of the writing screen so that the electronic board can readily be moved and can be prepared at reasonably low cost.
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: October 3, 1995
    Assignee: Hitachi Software Engineering Co., Ltd.
    Inventor: Yutaka Usuda
  • Patent number: 5450543
    Abstract: A memory address pointer that selects a memory location that is mapped to a video graphics circuit port is incremented only when all bytes in a memory location have been read from or written to by the host CPU. This does not depend on the order in which the host CPU reads or writes data bytes. Therefore a video controller that uses the present invention will work with 8 bit, 16 bit as well as high performance 32 bit input/output instructions.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: September 12, 1995
    Assignee: ATI Technologies Inc.
    Inventor: Gabriel Varga
  • Patent number: 5448697
    Abstract: A method and apparatus which provides bi-directional communication between a video monitor and a computer system unit. This enables the video monitor to inform the system unit of its capabilities without user involvement and also enables the system unit to directly control or adjust all the functions of the video monitor. In the preferred embodiment, a monitor/mouse interface provides bi-directional communication between the video monitor and the system unit. The monitor/mouse interface connects to the mouse and video connectors or the back of the system unit and in turn connects to the mouse and video monitor. The interface includes separate data paths from the system unit to the mouse and video monitor, respectively. Monitor control software is included in the system unit which can be used to control or adjust the output of the video monitor.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: September 5, 1995
    Assignee: Dell USA, L.P.
    Inventors: Terry J. Parks, Joseph W. Bell, Jr.
  • Patent number: 5442748
    Abstract: A frame buffer including a plurality of array planes of memory cells, row decoding circuitry for selecting rows of memory cells in each of the array planes to be accessed, column decoding circuitry for selecting columns of memory cells in each of the array planes to be accessed, a plurality of bitlines associated with the columns of memory cells of each array plane, each of the bitlines connecting to a column of memory cells and including a bitline sensing amplifier and a column select switch for providing access to the memory cells of that column of the array plane, a plurality of output sense amplifiers adapted to be connected to a selected number of bitlines in an array plane by closing of particular ones of the column select switches in the bitlines, first apparatus for providing output signals from the plurality of output sense amplifiers associated with each array plane to a data bus, and second apparatus for providing output signals from the plurality of output sense amplifiers associated with each arr
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: August 15, 1995
    Assignees: Sun Microsystems, Inc., Samsung Semiconductor Inc.
    Inventors: Shuen C. Chang, Hai D. Ho, Szu C. Sun, Jawii Chen
  • Patent number: 5440684
    Abstract: A method of manipulating a train of electrical signals equal in binary terms to the density gradation levels of a plurality of image pixels of an original image over a range of density gradation levels for controlling the reproduction of the original image on a receiving sheet in a thermal printer having an array of controllable printing elements corresponding in number to the pixels in an image line and an actuating circuit for actuating the respective printing elements in individually accessible fashion. In the method, the electrical signals for a given line of the image pixels are stored in a line memory and are outputted one by one from the line memory to a non-zero detector and downcounter for identification as to zero or non-zero status and downcounting of all non-zero signals to reduce the level thereof by one level.
    Type: Grant
    Filed: June 9, 1992
    Date of Patent: August 8, 1995
    Assignee: AGFA-Gevaert N. V.
    Inventors: Henri M. Tack, Renee R. Govaert