Abstract: An image processing method and an image processing apparatus are provided. The image processing method includes acquiring information of a first region of interest (ROI) in a first frame, estimating information of a second ROI in a second frame that is received after the first frame, based on the acquired information of the first ROI, and sequentially storing, in a memory, subframes that are a portion of the second frame, each of the subframes being a line of the second frame. The image processing method further includes determining whether a portion of the stored subframes includes the second ROI, based on the estimated information of the second ROI, and based on the portion of the stored subframes being determined to include the second ROI, processing the portion of the stored subframes.

Abstract: An integrated circuit device includes a plurality of memory cells each including a channel region, a first sub-word line, a second sub-word line, and a storage element. A word line driving circuit is configured to drive the first and sub-word lines. The word line driving circuit includes a PMOS transistor, an NMOS transistor, a keeping NMOS transistor, and a first keeping PMOS transistor. A negative voltage is applied to a source of the NMOS transistor, the negative voltage is applied to a source of the keeping NMOS transistor, the first sub-word line is connected to a source of the first keeping PMOS transistor, the second sub-word line is connected to a drain of the first keeping PMOS transistor, and a negative voltage is applied to a gate of the first keeping PMOS transistor.

Abstract: Methods and systems are disclosed for obtaining a first image of a tray, determining a presence or absence of one or more first patterns in the first image, determining a rotation of each the one or more first patterns in the first image, and performing an action based on the presence or absence and the rotation of the one or more first patterns in the first image.

Abstract: Vehicular in-cabin sensing is performed using machine learning. In-cabin sensor data of a vehicle interior is collected. The in-cabin sensor data includes images of the vehicle interior. An occupant is detected within the vehicle interior. The detecting is based on identifying an upper torso of the occupant, using the in-cabin sensor data. The imaging is accomplished using a plurality of imaging devices within a vehicle interior. The occupant is located within the vehicle interior, based on the in-cabin sensor data. An additional occupant within the vehicle interior is detected. A human perception metric for the occupant is analyzed, based on the in-cabin sensor data. The detecting, the locating, and/or the analyzing are performed using machine learning. The human perception metric is promoted to a using application. The human perception metric includes a mood for the occupant and a mood for the vehicle. The promoting includes input to an autonomous vehicle.

Abstract: A processing device of a memory sub-system is configured to identify a read level of a plurality of read levels associated with a voltage bin of a plurality of voltage bins of a memory device; assign a first threshold voltage offset to the read level of the voltage bin; assign a second threshold voltage offset to the read level of the voltage bin; perform, on block associated with the read level, a first operation of a first operation type using the first threshold voltage offset; and perform, on the blocks associated with the read level, a second operation of a second operation type using the second threshold voltage offset.

Abstract: A computer-implemented method for extracting data from a table comprising a plurality of cells is provided. The method comprises: receiving image data representing a physical layout of the table and words or characters in the table; generating a plurality of tokens, each token representing a semantic unit of the words or characters; and generating at least one language embedding and at least one position embedding associated with each token. The method further comprises: associating at least one token with a cell; receiving the tokens at an input of a cell classifier trained to generate a cell classification for each cell based on the language embeddings and the position embeddings of the at least one token associated with the cell; and determining a relationship exists between at least two cells based at least in part on the cell classifications and the position embeddings of the tokens.

Abstract: An image identification device can be trained to identify classes with high accuracy even in cases with a small number of learning images.

Abstract: A memory is provided which comprises a capacitor including non-linear polar material. The capacitor may have a first terminal coupled to a node (e.g., a storage node) and a second terminal coupled to a plate-line. The capacitors can be a planar capacitor or non-planar capacitor (also known as pillar capacitor). The memory includes a transistor coupled to the node and a bit-line, wherein the transistor is controllable by a word-line, wherein the plate-line is parallel to the bit-line. The memory includes a refresh circuitry to refresh charge on the capacitor periodically or at a predetermined time. The refresh circuit can utilize one or more of the endurance mechanisms. When the plate-line is parallel to the bit-line, a specific read and write scheme may be used to reduce the disturb voltage for unselected bit-cells. A different scheme is used when the plate-line is parallel to the word-line.

Abstract: Examples herein relate to a memory device comprising an eDRAM memory cell, the eDRAM memory cell can include a write circuit formed at least partially over a storage cell and a read circuit formed at least partially under the storage cell; a compute near memory device bonded to the memory device; a processor; and an interface from the memory device to the processor. In some examples, circuitry is included to provide an output of the memory device to emulate output read rate of an SRAM memory device comprises one or more of: a controller, a multiplexer, or a register. Bonding of a surface of the memory device can be made to a compute near memory device or other circuitry. In some examples, a layer with read circuitry can be bonded to a layer with storage cells. Any layers can be bonded together using techniques described herein.

Abstract: A system for generating a descriptor trail using artificial intelligence. The system includes at least a server configured to receive at least a biological extraction. At least a server is configured to generate a prognostic output as a function of at least a biological extraction. At least a server is configured to generate an ameliorative output as a function of a prognostic output. The system includes a descriptor generator module operating on at least a server. A descriptor generator module is configured to generate at least a descriptor trail from a descriptor trail data structure wherein the descriptor trail further comprises at least an element of diagnostic data.

Abstract: A memory controller may include: a request checker identifying memory devices corresponding to requests received from a host among the plurality of memory devices and generating device information on the identified memory devices to perform operations corresponding to the requests; a dummy manager outputting a request for controlling a dummy pulse to be applied to channels of selected memory devices according to the device information among the plurality of channels; and a dummy pulse generator sequentially applying the dummy pulse to the channels coupled to the selected memory devices, based on the request for controlling the dummy pulse. A memory controller may include an idle time monitor outputting an idle time interval of the memory device and a clock signal generator generating a clock signal based on the idle time interval and outputting the clock signal to the memory device through the channel to perform a current operation.

Abstract: A memory device can include a memory block operatively connected to a common source line and a plurality of bit lines, wherein the memory block includes first and second sub-blocks each having a respective position in the memory block relative to the common source line and the plurality of bit lines. The memory device can be operated by receiving a command and an address from outside the memory device and performing a precharge operation on the memory block in response to the command, using a first precharge path through the memory block or a second precharge path through the memory block based on the respective position of the first or second sub-block that includes a word line that is configured to activate responsive to the address.

Abstract: There is provided a method for generating a personalized Head Related Transfer Function (HRTF). The method can include capturing an image of an ear using a portable device, auto-scaling the captured image to determine physical geometries of the ear and obtaining a personalized HRTF based on the determined physical geometries of the ear.

Abstract: A solid state device for a computer system is disclosed. The computer system includes a detecting module for detecting a connection state of a connector of a backplane of the computer system. The solid state device includes a memory module, configured to store data; a connection module, configured to connect the connector of the backplane of the computer system; and a controller module, coupled to the memory module and the connection module, configured to write data into the memory module according to a writing notification from the computer system when the connection state between the connection module and the connector of the computer system is changed from a first connection state to a second connection state, and to notify the computer system to unlock the connector of the computer system after finishing writing the data.

Abstract: A method for tracking a target includes: acquiring original position information of an original target point selected by a user contained in a locating request if the locating request for tracking a target is received; carrying out target prediction on a current frame image according to a preset target prediction model to obtain a target prediction result; calculating an Euclidean distance between each of the targets to be tracked and the original target point according to the target position information and original coordinates of each of the target regions to obtain N distances; selecting a distance with the smallest numerical value from the N distances as a target distance, acquiring target position information corresponding to the target distance, and determining a target to be tracked in a target region corresponding to the obtained target position information as a tracked target corresponding to an original target point.

Abstract: The present disclosure generally relates to multi-switch storage cells (MSSCs), three-dimensional MSSC arrays, and three-dimensional MSSC memory. Multi-switch storage cells include a cell select device, multiple resistive change elements, and an intracell wiring electrically connecting the multiple resistive change elements together and to the cell select device. MSSC arrays are designed (architected) and operated to prevent inter-cell (sneak path) currents between multi-switch storage cells, which prevents stored data disturb from adjacent cells and adjacent cell data pattern sensitivity. Additionally, READ and WRITE operations may be performed on one of the multiple resistive change elements in a multi-switch storage cell without disturbing the stored data in the remaining resistive change elements. However, controlled parasitic currents may flow in the remaining resistive change elements within the cell.

Abstract: Systems and methods for moving point detection for point clouds. Some implementations may include obtaining a sequence of point clouds, wherein the sequence of point clouds includes a current point cloud, a previous point cloud that precedes the current point cloud, and a next point cloud that follows the current point cloud; inputting a voxelized representation of the current point cloud to a forward-pass recurrent neural network with a hidden state based on the previous point cloud to obtain a first voxelized activation; inputting the voxelized representation of the current point cloud to a backward-pass recurrent neural network with a hidden state based on the next point cloud to obtain a second voxelized activation; combining the first voxelized activation and the second voxelized activation to obtain a prediction of whether respective points are moving or static; and updating the current point cloud based on the prediction.

Abstract: Disclosed are systems and methods to detect and track an object across frames of a video. One of the disclosed methods includes: detecting a first group of one or more objects, using a first neural network, in each frame of the video, wherein each detected head of the first group comprises a leading and a trailing edge; grouping the leading and trailing edges of the one or more objects into groups of leading edges and groups of trailing edges based at least on coordinates of the leading and trailing edges; generating a list of no-edge-detect frames by identifying frames of the video missing a group of leading edges or a group of trailing edges; analyzing the no-edge-detect frames in the list of no-edge-detect frames, using an optical image classification engine, to detect a second group of one or more objects in the no-edge-detect frames; and merging the first and second groups of one or more objects to form a merged list of detected objects in the video.

Abstract: A memory is provided which comprises a capacitor including non-linear polar material. The capacitor may have a first terminal coupled to a node (e.g., a storage node) and a second terminal coupled to a plate-line. The capacitors can be a planar capacitor or non-planar capacitor (also known as pillar capacitor). The memory includes a transistor coupled to the node and a bit-line, wherein the transistor is controllable by a word-line, wherein the plate-line is parallel to the bit-line. The memory includes a refresh circuitry to refresh charge on the capacitor periodically or at a predetermined time. The refresh circuit can utilize one or more of the endurance mechanisms. When the plate-line is parallel to the bit-line, a specific read and write scheme may be used to reduce the disturb voltage for unselected bit-cells. A different scheme is used when the plate-line is parallel to the word-line.

Abstract: Methods, systems, and devices for driver sharing between banks or portions of banks of memory devices are described. An apparatus may include a first bank and a second bank of memory cells and a word line driver configured to activate word lines. The word line driver may include a master word line driver and an address driver. In some examples, the master word line driver may be configured to generate a first signal to a first portion of the first bank or a second portion of the first bank as part of performing an access operation. In some examples, the master word line driver may be configured to generate a first signal for the first bank or the second bank as part of performing an access operation. The address driver configured to generate a second signal to a portion of the first bank or the second bank.