Patents Examined by Viktor Simkovic
  • Patent number: 6610556
    Abstract: The method is intended for manufacturing a microintegrated structure, typically a microactuator for a hard-disk drive unit and includes the steps of: forming interconnection regions in a substrate of semiconductor material; forming a monocrystalline epitaxial region; forming lower sinker regions in the monocrystalline epitaxial region and in direct contact with the interconnection regions; forming insulating material regions on a structure portion of the monocrystalline epitaxial region; growing a pseudo-epitaxial region formed by a polycrystalline portion above the structure portion of the monocrystalline epitaxial region and elsewhere a monocrystalline portion; and forming upper sinker regions in the polycrystalline portion of the pseudo-epitaxial region and in direct contact with the lower sinker regions. In this way no PN junctions are present inside the polycrystalline portion of the pseudo-epitaxial region and the structure has a high breakdown voltage.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: August 26, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Benedetto Vigna, Paolo Ferrari
  • Patent number: 6607969
    Abstract: A method for making a thin film device or pyroelectric sensor is provided. A film layer of thin film functional material is grown on a large diameter growth substrate. One or more protective layers may be deposited on the surface of the growth substrate before the thin film functional material is deposited. Hydrogen is implanted to a selected depth within the growth substrate or within a protective layer to form a hydrogen ion layer. The growth substrate and associated layers are bonded to a second substrate. The layers are split along the hydrogen ion implant and the portion of the growth substrate and associated layers that are on the side of the ion layer away from the second substrate are removed.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: August 19, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Karl D. Hobart
  • Patent number: 6593163
    Abstract: A method for filling a trench extending through a microelectromechanical system (MEMS) device patterned on a wafer is disclosed. The method involves simultaneously depositing a trench-fill layer of insulating material over a first side of the wafer, over a second side of the wafer, and into the trench extending from the first side to the second side. Further, the width of the trench at the first side of the wafer and/or the second side of the wafer is variable to adjust the rate at which the trench fills.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: July 15, 2003
    Assignee: Seagate Technology
    Inventors: Wayne A. Bonin, Zine-Eddine Boutaghou, Roger L. Hipwell, Jr., Barry D. Wissman, Lee Walter, Barbara J. Ihlow-Mahrer
  • Patent number: 6593165
    Abstract: A circuit-incorporating light receiving device includes an integrated circuit and a photodiode. The integrated circuit and the photodiode are provided on a single semiconductor substrate. The integrated circuit includes a transistor having a polycrystalline silicon as an emitter diffusion source and an electrode. Elements included in the integrated circuit are isolated from each other using local oxidization.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: July 15, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takahiro Takimoto, Naoki Fukunaga, Isamu Ohkubo, Toshimitsu Kasamatsu, Mutsumi Oka, Masaru Kubo
  • Patent number: 6586315
    Abstract: A process for manufacturing a wafer having a multiplicity of MEMS devices such as mirrors with gimbals formed thereon is disclosed. The devices on the wafer include features defined by a wide line between features which extend completely through the wafer, and have a ratio of greater than about 4:1 with respect to the narrow lines which separate individual devices. Each individual device is separated by narrow gaps or line widths which are, for example, about 10 &mgr;m. Thus, the etching process is controlled such that the features defined by the wide lines are etched completely through, whereas the individual devices are separated by narrow lines which are not etched completely through the wafer. Therefore, the multiplicity of devices remain attached together even after the wafer is released from a backing wafer. Thus, the wafer with the many devices still attached together allows further processing such as packaging, testing, transport, etc. without the required handling of individual devices.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: July 1, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Andrew S. Dewa
  • Patent number: 6586327
    Abstract: Fabrication of microelectronic devices is accomplished using a substrate having a recessed pattern. In one approach, a master form is used to replicate a substrate having a pit pattern. In another approach, the substrate is produced by etching. A series of stacked layers having desired electrical characteristics is applied to the substrate and planarized in a manner that creates electrical devices and connections therebetween. The microelectronic devices can include a series of row and columns and are used to store data at their intersection.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: July 1, 2003
    Assignee: NUP2 Incorporated
    Inventor: Daniel R. Shepard
  • Patent number: 6586287
    Abstract: The invention provides a method for fabricating a TFT including a crystalline silicon active layer. The inventive method forms a metal offset region between the metal layer used to induce the cystallization of the active layer and the channel region of the TFT without introducing an additional process such as photoresist processing. Therefore, the inventive method improves the performance and manufacturing productivity of TFT and lower its production cost as well.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: July 1, 2003
    Inventors: Seung Ki Joo, Seok-Woon Lee
  • Patent number: 6582980
    Abstract: A method of manufacturing a display module, including the steps of: providing a substrate; and forming on the substrate using the same manufacturing process an image display having an array of addressable display pixels and pixel driver circuitry responsive to control signals and image data for driving the pixels; and a digital signal processing circuit having an input interface over which image data and control signals are received; a frame buffer for storing image data and from which image data is read during a display refresh; a display matrix driver circuit for receiving image data from the frame buffer and supplies control signals to the pixel driver circuitry; a control circuit for coordinating storage, retrieval, and display operations, such that the display module is capable of display refresh independently of external control; and an image processing circuit for improving the visual perception of the displayed image.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: June 24, 2003
    Assignee: Eastman Kodak Company
    Inventors: Rodney D. Feldman, Ronald S. Cok, David J. Williams
  • Patent number: 6578406
    Abstract: A sandwich device was prepared by electrodeposition of an insoluble layer of oligomerized tris(4-(2-thienyl)phenyl)amine onto conducting indium-tin oxide coated glass, spin coating the stacked platinum compound, tetrakis(p-decylphenylisocyano)platinum tetranitroplatinate, from toluene onto the oligomer layer, and then coating the platinum complex with aluminum by vapor deposition. This device showed rectification of current and gave electroluminescence. The electroluminescence spectrum (&lgr;max=545 nm) corresponded to the photoluminescence spectrum of the platinum complex. Exposure of the device to acetone vapor caused the electroemission to shift to 575 nm. Exposure to toluene vapor caused a return to the original spectrum. These results demonstrate a new type of sensor that reports the arrival of organic vapors with an electroluminescent signal.
    Type: Grant
    Filed: November 5, 2001
    Date of Patent: June 17, 2003
    Assignee: Regents of the University of Minnesota
    Inventors: Yoshihito Kunugi, Kent R. Mann, Larry L. Miller, Christopher L. Exstrom
  • Patent number: 6562650
    Abstract: The present invention provides an acoustic transducer, or an array of such transducers, formed on a single integrated circuit chip, and a method of making the same, in which there is included an array of acoustic transducers, each capable of detecting an acoustic signal and generating a transducer signal, and including a first and second electrode with a void region disposed between the first and second electrode, and at least one signal line associated with one of the first and second electrodes. Disposed below the array of acoustic transducers is a plurality of amplifiers and other circuit components, such that each of the plurality of amplifiers is coupled to one of the signal lines associated with one of the acoustic transducers and is capable of amplifying the associated transducer signal to obtain an amplified transducer signal on an amplifier output signal line.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: May 13, 2003
    Assignee: Sensant Corporation
    Inventor: Igal Ladabaum
  • Patent number: 6558972
    Abstract: According to this method, in order to fabricate active elements which comprise at least one doped part comprising a doping capable of absorbing a pump beam and at least one undoped part, and which have opposed faces of the same geometrical shape, a process of preparing an elongate active rod (5), which has a cross section identical to said geometrical shape, said process comprising at least one step of cutting and one step of joining at least one doped block (6) and at least one undoped block (7, 8), and a process of forming a plurality of active elements from the active rod (5), said formation process comprising at least one step of transverse cutting along the active rod (5) and the step of collectively treating surfaces of the active elements, are carried out in succession.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: May 6, 2003
    Assignee: Compagnie Industrielle des Lasers Cilas
    Inventor: Jean-Eucher Montagne
  • Patent number: 6555443
    Abstract: A method for producing a thin film on a carrier substrate. For this purpose, a buried sacrificial layer is initially produced in the interior of a parent body, the buried sacrificial layer separating a layer from a residual body remaining from the parent body. After that, the carrier substrate is attached to the layer and the sacrificial layer is then removed. As a result, the thin film to be produced comes into being on the carrier substrate. The method is suitable for the production of electronic components or thin-film solar cells, the parent body being made up, for example, of monocrystalline silicon in which a sacrificial layer of porous silicon is produced.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: April 29, 2003
    Assignee: Robert Bosch GmbH
    Inventors: Hans Artmann, Wilhelm Frey, Manfred Moellendorf
  • Patent number: 6551910
    Abstract: In a method of manufacturing a solid-state image pickup device having a virtual gate structure, in a process of forming a profile of a sensor portion, when ion implantation to form a p+ type layer at a substrate surface side is carried out while the ion implantation direction is tilted with respect to the substrate surface, the ion implantation is divisively carried out at plural times and from multiple ion implantation directions so that the total dose amount is matched, whereby impurities can be implanted into any area of the sensor portion and thus no impurities-unformed area occurs.
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: April 22, 2003
    Assignee: Sony Corporation
    Inventor: Masanori Ohashi
  • Patent number: 6548315
    Abstract: A semiconductor inspection apparatus which is possible to inspect a plurality of semiconductor devices collectively at one time, which has conventionally been difficult because of precision or the like of probes.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: April 15, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Ryuji Kohno, Hideo Miura, Yoshishige Endo, Masatoshi Kanamaru, Atsushi Hosogane, Hideyuki Aoki, Naoto Ban
  • Patent number: 6544811
    Abstract: A micromachined structure having electrically isolated components is formed by thermomigrating a dopant through a substrate to form a doped region within the substrate. The doped region separates two portions of the substrate. The dopant is selected such that the doped region electrically isolates the two portions of the substrate from each other via junction isolation.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: April 8, 2003
    Assignee: Georgia Tech Research Corporation
    Inventors: Mark G. Allen, Charles C. Chung
  • Patent number: 6537860
    Abstract: A method for manufacturing a discrete power rectifier device having a VLSI multi-cell design employs a two spacer approach to defining a P/N junction profile having good breakdown voltage characteristics. The method provides highly repeatable device characteristics at reduced cost. The active channel regions of the device are also defined using the same two spacers. The method is a self-aligned process and channel dimensions and doping characteristics may be precisely controlled despite inevitable process variations in spacer formation. Only two masking steps are required, and additional spacers for defining the body region profile can be avoided, reducing processing costs.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: March 25, 2003
    Assignees: APD Semiconductor, Inc., Fujifilm Microdevices Company, Ltd.
    Inventors: Hidenori Akiyama, Paul Chang, Geeng-Chuan Chern, Wayne Y. W. Hsueh, Haru Ohkawa, Yasuo Ohtsuki, Vladimir Rodov
  • Patent number: 6531332
    Abstract: A hybrid process combines a thin-film surface micromachining process such as by sputtering, evaporation or chemical vapor deposition with a thick-film surface micromachining and release process such as dry-film lamination. Such combination results in thin film micro-structures with all the benefits of surface micromachining without the typical problems of stiction and limited range of motion.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: March 11, 2003
    Assignee: Parvenu, Inc.
    Inventors: Andrei M Shkel, Michael J Little
  • Patent number: 6528340
    Abstract: A method of forming a composite diaphragm for a pressure transducer is disclosed. The method comprises providing a substrate layer having a first conductivity type and a first surface. Positive implants are deposited in the first surface of the substrate layer, and an epitaxial layer is grown on the first surface of the substrate layer so that the positive implants form positive diffusions in the epitaxial layer. An oxide pattern is formed on the epitaxial layer, and a top layer is deposited over the epitaxial layer and oxide pattern. The substrate layer and positive diffusions of the epitaxial layer are then etched to form the composite diaphragm. The positive diffusions can be patterned so that the resulting etched structure has improved diaphragm performance characteristics. For example, the remaining pattern can include a plurality of bosses and interconnecting battens so that the diaphragm has a relatively high burst pressure and a high output signal with improved linearity at low pressures.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: March 4, 2003
    Assignee: Honeywell International Inc.
    Inventors: Michael J. Haji-Sheikh, Gilberto Morales
  • Patent number: 6528342
    Abstract: This invention prevents an end portion of the LOCOS region having a large number of defects of an MOS sensor from depletion and thereby reduces the leak current that occurs in the defects in the end portion of the LOCOS region. An n-type layer region is formed in a surface area of a p-type substrate for constituting a photodiode with the p-type layer. A LOCOS region is formed on a p+-type layer in a surface area of the silicon substrate as device separation region by oxidizing part of the silicon substrate. The n-type layer region and the LOCOS region are separated from each other by a predetermined distance. A contact region is formed and separated from the n-type layer region by a distance equal to the size of the gate electrode of the read-out transistor of the MOS sensor. A wiring layer is connected to the contact region. Then, a planarizing layer is formed to cover the n-type layer region, the LOCOS region, the gate electrode and the wiring layer.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: March 4, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryohei Miyagawa, Hirofumi Yamashita, Michio Sasaki, Eiji Oba, Nagataka Tanaka, Keiji Mabuchi
  • Patent number: 6528430
    Abstract: An atomic layer deposition (ALD) method employing Si2Cl6 and NH3, or Si2Cl6 and activated NH3 as reactants. In one embodiment, the invention includes the steps of (a) placing a substrate into a chamber, (b) injecting a first reactant containing Si2Cl6 into the chamber, (c) chemisorbing a first portion of the first reactant onto the substrate and physisorbing a second portion of the first reactant onto the substrate, d) removing the non-chemically absorbed portion of the first reactant from the chamber, (e) injecting a second reactant including NH3 into the chamber, (f) chemically reacting a first portion of the second reactant with the chemisorbed first portion of the first reactant to form a silicon-containing solid on the substrate, and (g) removing the unreacted portion of the second reactant from the chamber. In other embodiments, the first reactant can contain two or more compounds containing Si and Cl, such as Si2Cl6 and SiCl4.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: March 4, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kim Yeong Kwan, Park Young Wook, Lee Joo Won, Kim Dong Chan