Patents Examined by Vinh P. Nguyen
  • Patent number: 10972093
    Abstract: An auxiliary circuit for outputting a supplying voltage or a detection signal includes a normally-on device and a signal processing circuit. A drain terminal of the normally-on switching device is coupled to a first terminal, a gate terminal of the normally-on switching device is coupled to a second terminal. An input voltage between the first terminal and the second terminal switches between two different levels. The signal processing circuit is configured to output the supplying voltage or the detection signal according to a voltage at a source terminal of the normally-on switching device.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: April 6, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Po-Chin Chuang
  • Patent number: 10969455
    Abstract: A test system for testing a device under test that includes several communication lanes is described. The test system is a communication lane test system that includes a measurement instrument and a connecting interface for connecting the device under test, wherein the connecting interface is configured to connect at least two of the several communication lanes with the measurement instrument. The measurement instrument includes s a processor being configured to conduct an automatic conformance test on the at least two communication lanes concurrently. Moreover, a method for testing a device under test that includes s several communication lanes is described.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: April 6, 2021
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Yi Jin, Kok Meng Wong, Johann Tost
  • Patent number: 10964237
    Abstract: The present invention provides a display device, a method for producing a display device, and a method for inspecting a display device, which are capable of inspecting, after bonding of a display panel and a FPC to each other, a conductive line formed near an edge of the display panel and/or an edge of the FPC for open circuits, partial open circuits, and short circuits. The display device includes: a display panel; a flexible printed circuit connected to the display panel; and an inspection line formed along one or both of an edge of the display panel and an edge of the flexible printed circuit and including a capacitance-forming portion that exhibits capacitance.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: March 30, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shuhichiroh Asatani, Daiji Kitagawa
  • Patent number: 10962503
    Abstract: The present invention provides a surface property inspection method including a step of setting a resistance ratio between resistors R1 and R2 of an AC bridge circuit 20 in a surface properly inspection apparatus 1. The step includes a step for placing a non-surface-treated reference test pieces S on a reference detector 22 and an inspection detector 23 and measuring a first setting output signal while changing the resistance ratio ?, a step for placing the reference test piece S on the reference detector 22, placing a surface-treated setting test piece on the inspection detector 23, and measuring a second setting output signal while changing the resistance ratio, a step for calculating the differential value between the first and second output signals, and a step for setting the resistance ratio so that the absolute value of the differential value is maximized.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: March 30, 2021
    Assignee: SINTOKOGIO, LTD.
    Inventor: Yoshiyasu Makino
  • Patent number: 10955468
    Abstract: Wafer test control and methodologies are provided for resuming the probing of a wafer, in connection with random, distributed or statistical wafer probing. The resumption of testing may occur after an interruption of a previous probe of the wafer and removal of the wafer from a testing chuck. Parameter settings are retained in addition to probe results from the previous wafer probe session in order to construct a resume probe map according to applicable probing rules and conditions. Wafer probing may be restarted according to the resume probe map.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: March 23, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Joseph Anthony Boduch, Romano Schmidt
  • Patent number: 10955487
    Abstract: A high voltage diagnostic connector includes a housing holding a positive terminal, a negative terminal and a ground terminal with a cover removably coupled to the housing. An HVIL assembly is in the housing having a HVIL contacts and an HVIL shunt. An HVIL switch is held by the housing including a shunt actuator operably coupled to the HVIL shunt to position the HVIL shunt in an un-shunted position to open an HVIL circuit when in the primary position and in a shunted position to close the HVIL circuit when in the secondary position. The shunt actuator is movable between the primary position and the secondary position when testing the positive terminal, the negative terminal and the ground terminal with the testing device during diagnostic testing of the high voltage diagnostic connector.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: March 23, 2021
    Assignee: TE CONNECTIVITY CORPORATION
    Inventors: Dinesh Loku Hemnani, Jeremy Christin Patterson
  • Patent number: 10948749
    Abstract: A display panel and a display test apparatus and a method of testing the display panel are provided. The display panel includes an array substrate; a test device disposed on the array substrate and configured to receive a test signal from a display test apparatus to test a plurality of pixel units of the display panel; and a connection device disposed on the array substrate and configured to be electrically connectable to the display test apparatus electrically, the test device receives a discharge signal from the display test apparatus to discharge the plurality of pixel units in response to a switch of a connection state between the connection device and the display test apparatus from electrical connection to electrical disconnection.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: March 16, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Shicheng Sun, Jianfei Tian, Zhiqiang Wang, Shuang Hu, Peirong Huo
  • Patent number: 10942203
    Abstract: A voltage probe for measuring voltage on a mechanical device. The voltage probe includes a sensing brush, a grounding brush, a grounding switch, and an electronic processor. The electronic processor is configured to receive a voltage from the sensing brush and, after a change of state of the grounding switch, which electrically connects the grounding brush to a mechanical device, measure voltage on the mechanical device, compare the measured voltage to a predetermined threshold, and generate an electronic signal indicative of the measured voltage or the comparison.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: March 9, 2021
    Assignee: HELWIG CARBON PRODUCTS, INC.
    Inventors: Brian David Stone, Randall Scott Herche, Nitin Diwakar Kulkarni
  • Patent number: 10942228
    Abstract: A compensation circuit receives a sensing signal from a Hall sensor and outputs a compensated Hall sensing signal. The compensation circuit has a gain that is inversely proportional to Hall sensor drift mobility. The compensated Hall sensing signal is temperature-compensated.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: March 9, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Paolo Angelini, Roberto Pio Baorda, Danilo Karim Kaddouri
  • Patent number: 10942225
    Abstract: In one embodiment, a wiring open detection circuit includes a signal processing circuit, a terminal, a diode, and an open decision circuit. The signal processing circuit is connected to one end of a first wiring and outputs a signal processed signal to the first wiring. The terminal is connected to the other end of the first wiring. The diode has one end connected to the terminal. The open decision circuit applies a first voltage to the other end of the diode, and detects change in a current flowing in the first wiring to decide whether or not the first wiring is open.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: March 9, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Youichi Satou, Masazumi Shiochi, Satoko Susa
  • Patent number: 10921349
    Abstract: Embodiments of the invention include a current sensing device for sensing current in an organic substrate. The current sensing device includes a released base structure that is positioned in proximity to a cavity of the organic substrate and a piezoelectric film stack that is positioned in proximity to the released base structure. The piezoelectric film stack includes a piezoelectric material in contact with first and second electrodes. A magnetic field is applied to the current sensing device and this causes movement of the released base structure and the piezoelectric stack which induces a voltage (potential difference) between the first and second electrodes.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Adel A. Elsherbini, Shawna M. Liff, Johanna M. Swan, Jelena Culic-Viskota, Thomas L. Sounart, Feras Eid, Sasha N. Oster
  • Patent number: 10921375
    Abstract: A portable ride-through (RT) tester provides a voltage drop at control circuitry of a motor starter to test its RT capabilities. The RT tester includes a variable transformer for manually controlling the magnitude of the voltage drop. Timing circuitry is programmed to count cycles of a 120 VAC input voltage to affect the occurrence and duration of the voltage drop. The primary windings of the transformer are connected to the 120 VAC. The variable secondary winding is connected to output terminals, which are electrically connected to the starter control circuitry via conductive probes. The power circuit of the starter is disengaged during testing. The timers sequentially provide the 120 VAC input voltage and the voltage drop at the starter control circuitry. Repeated testing at different durations and monitoring for tripping of relays/solenoids of the starter enables the tester to determine the exact ride-through capability of the motor starter.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: February 16, 2021
    Assignee: Saudi Arabian Oil Company
    Inventor: Athanatu Mohammad Aziz
  • Patent number: 10925154
    Abstract: In described examples, an enclosure for circuitry includes a platform, a charge source, a first capacitive plate, a second capacitive plate, and a capacitive sensor. The circuitry is fixedly coupled to the platform. The first capacitive plate is also fixedly coupled to the platform, and either alone, or together with the platform, surrounds a volume containing the circuitry and the charge source, the charge source electrically coupled to and configured to charge the first capacitive plate. The second capacitive plate is fixedly coupled to the platform without touching the first capacitive plate, and either alone, or together with the platform, surrounds the first capacitive plate. The second capacitive plate is configured so that there is an electric potential difference between the first capacitive plate and the second capacitive plate.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: February 16, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Alan Henry Leek, Jace Hunter Hall
  • Patent number: 10914758
    Abstract: This inspection jig is provided with: an inspection-side support member having a counter plate (51) provided with a facing surface (F) disposed to face the substrate; and an electrode-side support member (6) having supporting plates (61-63) disposed to face an electrode plate (9) located on the side opposite to the facing surface (F) of the counter plate (51) A probe supporting hole (23), into and by which the rear end portion of the probe (Pr) is inserted and supported, is provided in the supporting plates (61-63), and the probe supporting hole (23) is provided with a restricting surface which is formed along a supporting line (V) inclined at a certain angle (?) with respect to a reference line (Z), and which restricts the rear end portion of the probe (Pr) from moving in the direction perpendicular to the inclined direction of the supporting line (V).
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: February 9, 2021
    Assignee: Nidec-Read Corporation
    Inventors: Hidekazu Yamazaki, Norihiro Ota
  • Patent number: 10916814
    Abstract: A battery pack diagnostic apparatus includes a communication port, a measurer, and a controller. The communication port provides an electrical connection between the battery pack diagnostic apparatus and a battery management system. The measurer is electrically connected to an output terminal of the battery pack and is configured to measure a voltage and a current of the battery pack. The controller is configured to obtain a first measurement value with respect to a voltage and a current of the battery pack from the battery management system. The controller is further configured to obtain a second measurement value with respect to a second voltage and a second current of the battery pack from the measurer. The controller analyzes a state of the battery pack based on the first measurement value and the second measurement value.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: February 9, 2021
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Soojin Lee, Imsu Choi
  • Patent number: 10914791
    Abstract: A test system for testing electrical connections, especially soldered connections, between electronic components and a circuit board to be tested, characterized in that the test system has a communication interface, which by contacting the circuit board enables a data exchange with a data memory or a communication module of the circuit board to be tested, wherein the communication interface is arranged within a housing of the test system freely movably in at least two spatial directions, preferably three spatial directions.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: February 9, 2021
    Assignee: Endress+Hauser Flowtec AG
    Inventors: Thomas Böhler, Matthias Brudermann, Christoph Werle, Markus Wucher, Daniel Kollmer, Ludovic Adam
  • Patent number: 10901050
    Abstract: A magnetic field sensing device including a plurality of first magnetoresistor units and a plurality of second magnetoresistor units is provided. Magnetic field sensing axes of the first magnetoresistor units are parallel to a plane formed by a first direction and a third direction and are inclined with respect to the first direction and the third direction. Magnetic field sensing axes of the second magnetoresistor units are parallel to a plane formed by a second direction and the third direction and are inclined with respect to the second direction and the third direction. The first magnetoresistor units and the second magnetoresistor units are configured to measure a plurality of magnetic field components in a plurality of directions in three-dimensional space in a plurality of different time periods, respectively.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: January 26, 2021
    Assignee: iSentek Inc.
    Inventors: Fu-Te Yuan, Meng-Huang Lai
  • Patent number: 10901028
    Abstract: Provided is a substrate inspection method capable of accurately performing inspection. A wafer inspection device includes a chuck top on which a wafer having a semiconductor device formed thereon is mounted and a probe card disposed above the chuck top so as to face the chuck top. The probe card includes a plurality of contact probes protruding toward the wafer. When bringing the chuck top close to the probe card, a tubular expandable/contractible bellows extending downward from the probe card side so as to surround the contact probes is attracted to the chuck top via a lip seal before the contact probes come into contact with the semiconductor device.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Yamada, Jun Fujihara
  • Patent number: 10895617
    Abstract: A method for probing the properties of nanoscale materials, such as 2D materials or proteins, via nanometer-scale nuclear quadrupole resonance (NQR) spectroscopy using individual atom-like impurities in diamond. Coherent manipulation of shallow nitrogen-vacancy (NV) color centers enables the probing of the NQR spectrum of nanoscale ensembles of nuclear spins. Measuring the NQR spectrum at different magnetic field orientations and magnitudes and fitting to a theoretical model allows for the extraction of atomic structural properties of the material with nanoscale resolution.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: January 19, 2021
    Assignee: President and Fellows of Harvard College
    Inventors: Igor Lovchinsky, Javier Sanchez, Elana K. Urbach, Soonwon Choi, Trond Andersen, Philip Kim, Hongkun Park, Mikhail D. Lukin
  • Patent number: 10884023
    Abstract: The illustrative embodiments pertain to a test fixture having low insertion inductance for large bandwidth monitoring of current signals. In one exemplary embodiment, the test fixture includes a baseplate with each resistor of a set of resistors embedded inside a respective non-plated through slot in the baseplate. A first terminal of each resistor is soldered to a top metallic zone of the baseplate and a second terminal soldered to a first of two bottom metallic zones of the baseplate. The top metallic zone is connected by plated-through holes to a second of the two bottom metallic zones. When mounted upon a PCB, the test fixture allows current flow from the first bottom metallic zone, upwards through the set of resistors to the top metallic zone, and downwards to the second bottom metallic zone. An observation instrument may be coupled to a coaxial connector that is mounted on the baseplate.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: January 5, 2021
    Assignee: Keysight Technologies, Inc.
    Inventors: Edward Vernon Brush, IV, Neil Martin Forcier, Fei Fred Wang, Zheyu Zhang, Wen Zhang