Abstract: A display device includes a thin film transistor layer including at least one transistor on a substrate; a first electrode on the thin film transistor layer and connected to the at least one transistor; a second electrode spaced from the first electrode on the thin film transistor layer; a plurality of light emitting elements connected to the first electrode and the second electrode; and an electrode pattern on a same layer as the first electrode and the second electrode and overlapping the plurality of light emitting elements in a thickness direction.

Abstract: A display device includes a substrate including a display area and a non-display area, a light-emitting element disposed in the display area, and a common voltage supply line disposed in the non-display area and electrically connected to the light-emitting element. The common voltage supply line includes at least two main supply lines, a sub-supply line for connecting the at least two main supply lines, and at least one anti-static pattern disposed outside the sub-supply line in a plan view.

Abstract: A display apparatus includes a substrate with a display area and a peripheral area surrounding the display area, a thin-film transistor disposed on the display area of the substrate, a pad unit disposed on the peripheral area of the substrate, a first insulating layer disposed on the display area of the substrate and exposing the pad unit, the first insulating layer including a first portion disposed on the thin-film transistor, a second portion, and a third portion between the first portion and the second portion, and a light-emitting device disposed on the first portion of the first insulating layer and electrically connected to the thin-film transistor. A top surface of the first insulating layer includes a first top surface of the first portion, a second top surface of the second portion, and a connecting surface of the third portion. The first top surface of the first portion is higher than the second top surface of the second portion.

Abstract: A display device includes: a substrate including a display region and a non-display region; a plurality of pixels provided in the display region, the plurality of pixels including first to third sub-pixels each having a light emitting region configured to light; a first light emitting element that is provided in each of the first and second sub-pixels and emits first color light, and a second light emitting element that is provided in the third sub-pixel and emits second color light; and a color conversion layer corresponding to each of the first and second sub-pixels, the color conversion layer converting the first color light into light of a set color for each corresponding sub-pixel.

Abstract: Provided is a display apparatus including a substrate having an island and a plurality of connection parts extending in different directions from an end of the island and connected to different islands; a display region disposed on the island and including a display element connected to a common electrode; a common voltage power line disposed on the island and on at least one first connection part of the plurality of connection parts extending from the island; and at least one contact portion disposed on the at least one first connection part, wherein the at least contact portion is connected to the common electrode and the common voltage line.

Abstract: A display device includes a display area and a functional area defining a through-portion therein. At least a portion of the functional area is surrounded by the display area. The display device includes an insulation layer disposed on a base substrate and defining a disconnection portion in the functional area, a pixel array disposed on the base substrate in the display area, and a mask pattern including a metal oxide and extending along the disconnection portion in a plan view.

Abstract: A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers directly above a conductor tier. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The channel-material strings directly electrically couple with conductor material of the conductor tier by conductive material of a lowest of the conductive tiers. Insulating material of the insulative tier that is immediately-directly above the lowest conductive tier is directly against a top of the conductive material of the lowest conductive tier. The insulating material comprises at least one of aluminum oxide, hafnium oxide, zirconium oxide, and carbon-doped insulative material. Other embodiments, including method, are disclosed.

Abstract: The present application provides a semiconductor device. The semiconductor device includes a substrate, a first insulative film, a second insulative film, a first electrode, a second electrode, a capping layer, a plurality of first impurity regions and a plurality of second impurity regions. The first insulative film is disposed on the substrate. The second insulative film at least partially surrounds the first insulative film. The first electrode and the capping layer, covering the first electrode, are disposed on the first insulative film. The second electrode is disposed over the second insulative film and covers the capping layer. The first and second impurity regions are disposed in the substrate. Each of the first impurity regions extends under and across the second electrode and the first electrode. The second impurity regions are exposed through the second insulative film and the second electrode.

Abstract: In a display panel having a main display area, a component area including pixel groups spaced apart from each other, and a transmission area between the pixel groups, the display panel includes: a substrate; a plurality of main display elements on the substrate to correspond to the main display area and main pixel circuits respectively connected to the main display elements; auxiliary display elements on the substrate to respectively correspond to the pixel groups and auxiliary pixel circuits respectively connected to the auxiliary display elements; a first data line and a second data line spaced apart from each other with the component area therebetween; and a detour line connecting the first data line to the second data line, wherein the detour line is on a layer that is closer to the substrate than a layer on which the first data line and the second data line are arranged.

Abstract: A display device includes a substrate, a transistor, an interlayer insulating layer, a first conductive line, a pixel electrode, a passivation layer, a common electrode, and a light emitting element layer. The transistor overlaps the substrate. The interlayer insulating layer overlaps the transistor and includes a first groove. The first conductive line is electrically connected to the transistor and is at least partially disposed inside the first groove. The pixel electrode is electrically connected to the transistor and overlaps the first conductive line. The passivation layer is disposed between the pixel electrode and the first conductive line and directly contacts at least one of the pixel electrode and the first conductive line. The common electrode overlaps the pixel electrode. The light emitting element layer is disposed between the common electrode and the pixel electrode.

Abstract: A display device including: a substrate including a display area and a non-display area; a light-emitting element disposed in the display area; an encapsulation layer covering the light-emitting element; a driving unit disposed in the non-display area; a dam surrounding the display area and overlapping the driving unit, and a shielding layer overlapping the driving unit.

Abstract: A display device includes: a substrate; a display area in which a plurality of pixels are arranged over the substrate; and a transmission area arranged inside the display area, where the transmission area is provided to overlap a component below the substrate, and a transparent organic layer including siloxane is arranged in the transmission area.

Abstract: Gate contact structures disposed over active portions of gates and methods of forming such gate contact structures are described. For example, a semiconductor structure includes a substrate having an active region and an isolation region. A gate structure has a portion disposed above the active region and a portion disposed above the isolation region of the substrate. Source and drain regions are disposed in the active region of the substrate, on either side of the portion of the gate structure disposed above the active region. A gate contact structure is disposed on the portion of the gate structure disposed above the active region of the substrate.

Abstract: A display device including: a substrate; a plurality of transistors disposed on the substrate; and a multi-layer insulating film disposed on the transistors, wherein the multi-layer insulating film includes a first insulating film and a second insulating film, the multi-layer insulating film includes a first region in which the first insulating film and the second insulating film overlap each other in a direction perpendicular to the substrate and a second region in which the first insulating film is disposed, the first region overlaps the plurality of transistors, and a modulus of the second insulating film is lower than a modulus of the first insulating film.

Abstract: A method includes forming a semiconductor fin protruding higher than top surfaces of isolation regions. A top portion of the semiconductor fin is formed of a first semiconductor material. A semiconductor cap layer is formed on a top surface and sidewalls of the semiconductor fin. The semiconductor cap layer is formed of a second semiconductor material different from the first semiconductor material. The method further includes forming a gate stack on the semiconductor cap layer, forming a gate spacer on a sidewall of the gate stack, etching a portion of the semiconductor fin on a side of the gate stack to form a first recess extending into the semiconductor fin, recessing the semiconductor cap layer to form a second recess directly underlying a portion of the gate spacer, and performing an epitaxy to grow an epitaxy region extending into both the first recess and the second recess.

Abstract: The disclosed technology generally relates to metallization of substrates, and more particularly to selective metallization of ceramic substrates. A method of selectively metallizing a substrate includes forming a base metal layer comprising a refractory metal on a substrate, forming a base nickel (Ni) layer over the base metal layer by a vapor phase process, forming a palladium (Pd) layer on the base Ni layer by electroless plating, and forming a gold (Au) layer on the Pd layer.

Abstract: Arrays of memory cells including an isolation region between first and second access lines, a first memory cell having a control gate in contact with the first access line and a charge storage node having a curved cross-section having a first end in contact with a first portion of the isolation region on a first side of the isolation region and a second end in contact with a second portion of the isolation region on the isolation region's first side, and a second memory cell having a control gate in contact with the second access line and a charge storage node having a curved cross-section having a first end in contact with the first portion of the isolation region on a second side of the isolation region and a second end in contact with the second portion of the isolation region on the isolation region's first side.

Abstract: An image sensor is provided. The image sensor may include a substrate including first and second surfaces opposite to each other, a device isolation layer extending through the substrate and having a surface level with the second surface of the substrate, an active region comprising first and second pixel regions spaced apart and separated from each other by the device isolation layer, a photoelectric device located in the substrate and configured to convert light into electric charges, a microlens on the first surface, a first select transistor and a first source follower transistor in the first pixel region, a second source follower transistor in the second pixel region, a first node between the first select transistor and the first source follower transistor, on the first pixel region, and a second node on one side of the first select transistor on the first pixel region.

Abstract: Disclosed herein is an organic light emitting display apparatus. The organic light emitting display apparatus includes at least one thin film transistor and light emitting device on substrate, the light emitting device is apart from the substrate hole, and at least one isolation structure is disposed between the substrate hole and the light emitting device. Each thin film transistor includes source/drain electrodes, each light emitting device includes a first electrode, a light emitting layer, and a second electrode, the organic light emitting display apparatus includes a connection electrode connecting one of the source/drain electrodes of the thin film transistor to the first electrode of the light emitting device, and a planarization layer is disposed between the thin film transistor and the light emitting device. The isolation structure includes at least one undercut structure, and a height of each undercut structure is greater than a thickness of the light emitting layer.