Abstract: A display device includes, a display region, and a peripheral region arranged outside of the display region, the peripheral region includes, a first inorganic insulating layer, a first organic insulating layer arranged on the first inorganic insulating layer, and a second inorganic insulating layer arranged on the first organic insulating layer, wherein a part of the first inorganic insulating layer in the display region side from a slope of the first inorganic insulating layer is in contact with the second inorganic insulating layer, the slope of the first inorganic insulating layer is exposed at the end part of the periphery region, and includes a bottomed hole with a concave and convex part, and the density of a fluorine ions in the concave and convex part is more than 100 times greater than the density of the fluorine ions in the first inorganic insulating layer arranged in the display region.

Abstract: Disclosed are a display apparatus and a method for manufacturing the same. The display apparatus comprises: a multi-buffer layer; a pixel array layer formed on the multi-buffer layer and including a plurality of pixels respectively formed as the intersections of a plurality of gate lines and a plurality of data lines; an encapsulation layer formed on the pixel array layer; and an encapsulation substrate formed on the encapsulation layer and including a display area and a non-display area adjacent to the display area, wherein, the encapsulation substrate is for supporting the display area and the non-display area such that there is no base substrate in the display apparatus.

Abstract: An imaging sensor includes a pixel array containing photodiodes, the photodiodes being isolated from one another by full thickness deep trench isolations. Row control circuitry controls which rows of the pixel array operate in an imaging mode and which rows of the pixel array operate in an energy harvesting mode, on a row by row basis. Switch circuitry selectively connects different groups of photodiodes in rows operating in the energy harvesting mode into forward biased series configurations between a voltage output line and a ground line, or into forward biased parallel configurations between the voltage output line and the ground line.

Abstract: A flip-chip package substrate is provided. A strengthening structure is provided on one side of a circuit structure to increase the rigidity of the flip-chip package substrate. When the flip-chip package substrate is used in large-scale packaging, the flip-chip package substrate can have good rigidity, so that the electronic package can be prevented from warping.

Abstract: A display apparatus includes a first power supply voltage line in a non-display area and including a first conductive layer, a first organic layer on the first conductive layer, and a second conductive layer on the first organic layer, a second power supply voltage line in the non-display area and including a third conductive layer spaced apart from the first conductive layer, and a fourth conductive layer on the first organic layer which is on the third conductive layer, a first dam portion adjacent to the first power supply voltage line, a second dam portion adjacent to the first dam portion, and a third dam portion between the first power supply voltage line and the first dam portion. The fourth conductive layer includes an opening exposing an upper surface of the first organic layer between the first power supply voltage line and the second dam portion.

Abstract: A display apparatus includes a substrate, a display area disposed on the substrate and including pixels, a non-display area disposed outside the display area, a first power supply voltage line including a first conductive layer disposed in the non-display area and a second conductive layer disposed on the first conductive layer, a second power supply voltage line disposed in the non-display area and including a third conductive layer spaced apart from the first conductive layer and a fourth conductive layer disposed on the third conductive layer, a first dam portion surrounding the display area and overlapping the second power supply voltage line, a second dam portion disposed adjacent to the first dam portion, and a cladding layer covering a first end portion of the fourth conductive layer formed in a direction intersecting a direction in which the first and second dam portions extend.

Abstract: An array substrate comprises a display area and a periphery area; a common electrode is arranged at the display area, and an electrode bus is arranged at a periphery area and is close to the display area. The array substrate further comprises a first electrode pad, a first conductive portion, a second electrode pad, and a second conductive portion. The first electrode pad is arranged at the side, far away from the display area of the periphery area; the first conductive portion is connected with the first electrode pad and the common electrode; the second electrode pad is arranged at the side, far away from the display area of the periphery area; and the second conductive portion is connected to the second electrode pad, and extends to connect with the electrode bus along the direction far away from the first conductive portion.

Abstract: Disclosed are an electroluminescent display panel and a brightness compensation method therefor. The electroluminescent display panel is provided with photoelectric detectors corresponding to at least a portion of light-emitting structures. The photoelectric detector is used to convert, under control of a sample control line, light emitted when the corresponding light-emitting structure is turned on into an electric signal, and to output the same to a detection output line. The display panel employs a photoelectric detector to detect a change in display brightness of a corresponding light-emitting structure, such that voltage compensation can be performed on the light-emitting structure according to the detected brightness change, thereby ensuring good display performance of the entire display panel.

Abstract: A display panel includes two or more gate layers including a plurality of gate patterns extending in a first direction and one or more source-drain layers including a plurality of source-drain patterns extending in a second direction crossing the first direction. The gate patterns of the two or more gate layers are curved or bent along a hole surrounding area corresponding to a periphery of a hole in an active area. The source-drain patterns of the one or more source-drain layers are curved or bent along the hole surrounding area. The gate patterns of at least one of the two or more gate layers overlap the source-drain patterns of at least one of the one or more source-drain layers in a thickness direction of the display panel in the hole surrounding area.

Abstract: A display panel includes a display element layer configured to output first color light, an encapsulation layer disposed on the display element layer, a light control layer disposed on the encapsulation layer and including a first conversion part configured to output second color light, a second conversion part configured to output third color light, and a transmission part configured to transmit the first color light, a light absorbing layer disposed on the encapsulation layer to cover the first and second conversion parts and expose at least a portion of a top surface of the transmission part, and a color filter layer disposed on the light absorbing layer. The light absorbing layer is configured to absorb the first color light and to transmit the second color light and the third color light.

Abstract: A display panel has pixel regions each includes sub-pixel regions, one of the sub-pixel regions is a white sub-pixel region, and remaining sub-pixel regions are color sub-pixel regions. The display panel includes signal lines and at least one filter group. The signal lines include two signal lines, a portion of each of the two signal lines is disposed between one white sub-pixel region and an adjacent color sub-pixel region, and there is a space between the two signal lines. Each filter group includes a first filter block and a second filter block, and a light transmission wavelength range of the first filter block does not overlap with that of the second filter block. An overlapping portion of the first filter block and the second filter block that are in one filter group covers a portion of the space disposed between the white sub-pixel region and the adjacent color sub-pixel region.

Abstract: A semiconductor device is provided. The semiconductor device includes a channel layer disposed over a substrate, a barrier layer disposed over the channel layer, a compound semiconductor layer disposed over the barrier layer, a gate electrode disposed over the compound semiconductor layer, and a source electrode and a drain electrode disposed on opposite sides of the gate electrode. The source electrode and the drain electrode penetrate through at least a portion of the barrier layer. The semiconductor device also includes a source field plate connected to the source electrode through a source contact. The semiconductor device further includes a first electric field redistribution pattern disposed on the barrier layer and directly under the edge of the source field plate.

Abstract: Arrays of memory cells including pairs of memory cells having respective control gates connected to respective access lines, and having respective charge storage nodes between the respective access lines.

Abstract: An organic light emitting diode display panel is provided and includes a display region and a through hole configured to receive an electronic element. The display region is disposed around a periphery of the through hole and includes a barrier structure and an encapsulation structure layer covering the barrier structure. The barrier structure is disposed on a side of a periphery of the through hole. The present invention, by extending the encapsulation structure layer from the display region to the barrier structure to cover the barrier structure, prevents water from invading an organic light emitting layer of the display region through the through hole.

Abstract: A semiconductor device is provided with a semiconductor chip. The semiconductor chip has a semiconductor substrate, an interconnect layer, an inductor and conductive pads (first pads). The interconnect layer is provided on the semiconductor substrate. The interconnect layer includes the inductor. The pads are provided on the interconnect layer. The pads are provided in a region within a circuit forming region of the semiconductor chip, which does not overlap the inductor.

Abstract: A display device and a method for fabricating the same. The display device includes a substrate including a circuit layer and a first pad unit; an auxiliary substrate disposed below the substrate and comprising a driving circuit and a second pad unit; a light-emitting unit disposed on the circuit layer; and a connection electrode in contact with a side surface of the substrate and electrically connecting the first pad unit with the second pad unit. The method includes forming a circuit layer and a first pad unit on a first surface of a substrate; forming a driving circuit and a second pad unit on a fourth surface of an auxiliary substrate; and attaching a second surface of the substrate opposite the first surface to a third surface of the auxiliary substrate opposite the fourth surface.

Abstract: A display apparatus includes: a substrate including a component area, a display area, and a middle area provided between the component area and the display area; a thin-film transistor arranged in the display area; a display element including a pixel electrode, an intermediate layer, and an opposite electrode, wherein the pixel electrode is electrically connected to the thin-film transistor; a first organic insulating layer, a second organic insulating layer, and a passivation layer sequentially stacked on each other between the thin-film transistor and the pixel electrode; and a groove arranged in the middle area, wherein the groove divides an organic material layer included in the intermediate layer, wherein the groove is provided in multiple layers including an organic layer and an inorganic layer, wherein the organic layer is arranged on the substrate, and the inorganic layer is stacked on the organic layer.

Abstract: A novel electric rectifier for use in a rectenna device is provided. The rectenna device can advantageously be used in a variety of applications. The electric rectifier comprises an integrated structure comprising: a diode structure comprising first and second electrodes located in first and second conductive layers respectively and an insulating layer between them, the diode structure being configured and operable for receiving an input signal and generating output signal indicative thereof, and a compensation structure electrically connected in parallel to said diode structure and being configured to compensate the parasitic capacitance of the diode structure when a frequency spectrum of the input signal is beyond the diode's cutoff frequency.

Abstract: The present application provides a display panel and a display device. The display panel includes a display area, a hole-digging area, and a buffer area between the display area and the hole-digging area, wherein one or more retaining walls on the pixel defining layer in the buffer area, a top surface of the retaining wall is provided with a groove or a protrusion; the encapsulating layer is disposed on the light-emitting functional layer and the retaining wall, such that a contact area between a top surface of the retaining wall and the encapsulation layer is increased, thus avoiding the problem of film peeling between the retaining wall and the encapsulating layer.

Abstract: An image sensor device includes a digital pixel that includes a photo detector, a comparator, and a memory circuit, a pixel driver that controls the digital pixel, and a digital logic circuit that performs a digital signal processing operation on a digital signal output from the digital pixel. The photo detector and a first portion of the comparator are formed in a first semiconductor die, a second portion of the comparator, the memory circuit, and the pixel driver are formed in a second semiconductor die under the first semiconductor die, and the digital logic circuit is formed in a third semiconductor die under the second semiconductor die.