Patents Examined by Warren H Kilpatrick
  • Patent number: 9041046
    Abstract: A light-emitting device having a light source die mounted within an aperture is disclosed. The aperture is covered by a die attach pad on one side. The light source die is mounted on a die attach pad within the aperture. In one embodiment, an optical coupling layer can be formed within an aperture encapsulating a light source die. A wavelength converting layer can be formed on the substrate above the optical coupling layer. The wavelength converting layer can comprise a high density layer and a low density layer. The high density layer can comprise wavelength-converting material precipitated on one side of the wavelength converting layer. The low density layer can comprise the wavelength-converting material in particle form suspended within the wavelength converting layer. In one embodiment, the wavelength converting layer may be confined within the aperture of the substrate.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: May 26, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Chin Ewe Phang, Seong Choon Lim, Eng Chuan Ong
  • Patent number: 9041115
    Abstract: An SRAM array is formed by a plurality of FinFETs formed by fin lines. Each fin line is formed in a substrate, wherein a bottom portion of the fin line is enclosed by an isolation region and an upper portion of the fin line protrudes above a top surface of the isolation region. From a first cross sectional view of the SRAM array, each fin line is of a rectangular shape. From a second cross sectional view of the SRAM array, the terminals of each fin line is of a tapered shape.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: May 26, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jhon-Jhy Liaw
  • Patent number: 9041113
    Abstract: A semiconductor integrated device in which electrostatic discharge damage can be reliably prevented, includes a semiconductor substrate in which an electrostatic protection circuit including a second diffusion region surrounding a first diffusion region as a local region is formed in a main surface; a metal pad opposed to the main surface; and a conductive bump formed so as to face a top surface of the metal pad, wherein in a surface opposed to the metal pad of the conductive bump, a projection which is in contact with the metal pad is provided in a range opposed to the first diffusion region.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: May 26, 2015
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Chikashi Fuchigami
  • Patent number: 9029843
    Abstract: An organic light-emitting element comprising: an anode; a cathode; banks; a functional layer between the anode and the cathode; and a hole injection layer between the anode and the functional layer. The functional layer includes one or more sublayers including a light-emitting sublayer defined by the banks and that contains an organic material. The hole injection layer comprises tungsten oxide, includes an occupied energy level that is approximately 1.8 electron volts to approximately 3.6 electron volts lower than a lowest energy level of a valence band of the hole injection layer in terms of a binding energy, has a surface facing the functional layer, and has a recessed structure such that a portion of the surface overlapping with the light-emitting sublayer is located closer to the anode than other portions. The recessed structure has a recessed portion whose inner surface is in contact with the functional layer.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: May 12, 2015
    Assignee: Joled Inc.
    Inventors: Kenji Harada, Seiji Nishiyama, Takahiro Komatsu, Takayuki Takeuchi, Satoru Ohuchi, Yoshiaki Tsukamoto, Shinya Fujimura, Kei Sakanoue
  • Patent number: 9029842
    Abstract: An organic light-emitting element comprising: an anode; a cathode; banks; a functional layer between the anode and the cathode; and a hole injection layer between the anode and the functional layer. The functional layer includes at least a light-emitting sublayer defined by the banks and that contains an organic material. The hole injection layer comprises tungsten oxide and includes a crystal of the tungsten oxide, whose particle diameter is on an order of nanometers. Tungsten atoms constituting the tungsten oxide include both tungsten atoms with a valence of six and tungsten atoms with a valence less than six. The hole injection layer has a surface facing the functional layer, and a portion of the surface overlapping with the light-emitting sublayer is located closer to the anode than other portions, thereby forming a recessed structure having a recessed portion whose inner surface is in contact with the functional layer.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: May 12, 2015
    Assignee: Joled Inc.
    Inventors: Kenji Harada, Seiji Nishiyama, Takahiro Komatsu, Takayuki Takeuchi, Shinya Fujimura, Satoru Ohuchi, Hirofumi Fujita, Yoshiaki Tsukamoto
  • Patent number: 9012897
    Abstract: An organic EL element comprises: an anode; a cathode; a functional layer that is disposed between the anode and the cathode and includes at least a light-emitting layer; a hole injection layer disposed between the anode and the functional layer; and a bank. The hole injection layer contains tungsten oxide, and has a recessed portion. A UPS spectrum of the hole injection layer, obtained from a UPS measurement, has a protrusion appearing near a Fermi surface and within a region corresponding to a binding energy range lower than a top of a valence band. The tungsten oxide contained in the hole injection layer satisfies a condition, determined from an XPS measurement, that a ratio in a number density of atoms other than tungsten atoms and oxygen atoms to the tungsten atoms does not exceed approximately 0.83.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: April 21, 2015
    Assignee: Panasonic Corporation
    Inventors: Kenji Harada, Seiji Nishiyama, Takahiro Komatsu, Takayuki Takeuchi, Satoru Ohuchi, Hirofumi Fujita, Shinya Fujimura
  • Patent number: 9012896
    Abstract: In an organic EL element, a bank is formed on a hole injection layer so as to surround light-emitting layer. The hole injection layer is formed with a tungsten oxide thin film, and has, in an electronic state thereof, an occupied energy level 1.8 eV to 3.6 eV lower than the lowest energy level of a valence band of the hole injection layer. The hole injection layer has a recessed portion in an upper surface thereof. An inner surface of the recessed portion is in contact with a functional layer (light-emitting layer). the inner side surface of the recessed portion includes an upper edge that is one of aligned with part of a lower edge of the bank, the part being in contact with the functional layer, and in contact with a bottom surface of the bank.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: April 21, 2015
    Assignee: Panasonic Corporation
    Inventors: Kenji Harada, Seiji Nishiyama, Takahiro Komatsu, Takayuki Takeuchi, Satoru Ohuchi, Yoshiaki Tsukamoto, Shinya Fujimura, Kei Sakanoue
  • Patent number: 8987043
    Abstract: A method of manufacturing an OLED display includes: forming an organic light emitting element on a first substrate; forming, on the organic light emitting element, a thin film encapsulation layer that seals the organic light emitting element with the first substrate; providing a second substrate; forming a flexible protection layer on the second substrate; attaching the first substrate and the second substrate to each other; and separating the second substrate from the flexible protection layer.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: March 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Hwan Park, Sang-Joon Seo, Jae-Seob Lee, Seung-Hun Kim, Jin-Kwang Kim
  • Patent number: 8952390
    Abstract: An optoelectronic component can be used for mixing electromagnetic radiation having different wavelengths, in particular in the far field. The optoelectronic component includes a carrier. A first semiconductor chip has a first radiation exit surface for emitting electromagnetic radiation in a first spectral range is provided on the carrier and a second semiconductor chip as a second radiation exit surface for emitting electromagnetic radiation in a second spectral range is provided on the carrier. A diffusing layer is provided on the radiation exit surfaces of the semiconductor chips which face away from the carrier.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: February 10, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Ralph Wirth, Alexander Linkov
  • Patent number: 8946693
    Abstract: An organic EL element comprising: an anode; a cathode; banks; a functional layer between the anode and the cathode, the functional layer including one or more sublayers including a light-emitting sublayer, the light-emitting sublayer defined by the banks and containing an organic material; and a hole injection layer between the anode and the functional layer, wherein the hole injection layer comprises tungsten oxide. An Ultraviolet Photoelectron Spectroscopy (UPS) spectrum, obtained from a UPS measurement, has a protrusion appearing near a Fermi surface and within a region corresponding to a binding energy range lower than a top of a valence band. The tungsten oxide contained in the hole injection layer satisfies a condition, determined from an X-ray Photoelectron Spectroscopy (XPS) measurement, that a ratio in a number density of atoms other than tungsten atoms and oxygen atoms to the tungsten atoms does not exceed approximately 0.83.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: February 3, 2015
    Assignee: Panasonic Corporation
    Inventors: Kenji Harada, Seiji Nishiyama, Takahiro Komatsu, Takayuki Takeuchi, Satoru Ohuchi, Hirofumi Fujita, Shinya Fujimura
  • Patent number: 8941216
    Abstract: The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: January 27, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Ha Lee, Ho-Jin Lee, Pil-Kyu Kang, Byung Lyul Park, Hyunsoo Chung, Gilheyun Choi
  • Patent number: 8927976
    Abstract: An organic EL element includes a hole injection layer yielding excellent hole conduction efficiency, and comprises: an anode; a cathode; a functional layer disposed between the anode and the cathode, and including a light-emitting layer containing organic material; the hole injection layer disposed between the anode and the functional layer; and a bank defining an area in which the light-emitting layer is to be formed, wherein the hole injection layer includes tungsten oxide, tungsten atoms constituting the tungsten oxide include both tungsten atoms with a valence of six and tungsten atoms with a valence less than six, the hole injection layer includes a crystal of the tungsten oxide, a particle diameter of the crystal being on an order of nanometers, an inner portion of the hole injection layer is depressed to define a recess, and an upper peripheral edge of the recess is covered with a part of the bank.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: January 6, 2015
    Assignee: Panasonic Corporation
    Inventors: Seiji Nishiyama, Satoru Ohuchi, Takahiro Komatsu, Yoshiaki Tsukamoto, Shinya Fujimura, Hirofumi Fujita
  • Patent number: 8921838
    Abstract: Each of organic light-emitting elements 100a, 100b and 100c includes an anode, a functional layer including a hole-injection layer, a hole-transport layer and an organic light-emitting layer, and a cathode layered on a substrate in the stated order. Also, a bank defines a formation area of the organic light-emitting layer. Here, the hole-injection layer is a metal oxide layer formed by oxidizing an upper surface portion of the anode composed of the metal layer. Also, a portion of the hole-injection layer that is positioned under the area is depressed so as to form a recess, and upper peripheral edge of the recess is covered with a portion of the bank.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: December 30, 2014
    Assignee: Panasonic Corporation
    Inventors: Takayuki Takeuchi, Seiji Nishiyama
  • Patent number: 8890129
    Abstract: The present disclosure aims to provide a light-emitter having a favorable luminescence property, a light-emitting device having the light-emitter, and a method of manufacturing the light-emitter. Specifically, the light-emitter has the following structure. A hole injection layer and a light-emitting layer are layered between a first electrode and a second electrode which are transparent, and a light-emitting layer exists in an area defined by a bank. Thus, organic EL elements are formed. The hole injection layer has a recess in an upper surface of the area defined by the bank. An upper peripheral edge of the recess in the hole-injection layer is covered with a portion of the bank.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: November 18, 2014
    Assignee: Panasonic Corporation
    Inventor: Seiji Nishiyama
  • Patent number: 8890189
    Abstract: Provided is a wafer for LED mounting having a small difference in thermal expansion coefficient from an LED and having excellent heat conductivity, a method for manufacturing the wafer for LED mounting, and an LED-mounted structure manufactured by using the wafer for LED mounting. The wafer for LED mounting (6) is constituted of a metal infiltrated ceramic composite (61) and a protective layer (62) that is formed therearound. The metal infiltrated ceramic composite (61) preferably has a thin metal layer (63) on a surface thereof. The method for manufacturing the wafer is characterized by comprising filling at least one selected from the group consisted of porous ceramic bodies, ceramic powder compacts and ceramic powders into a tubular body made of metal or ceramic, then impregnating a metal into the void of at least one selected from the group consisted of porous ceramic bodies, ceramic powder compacts and ceramic powders, and thereafter performing a process.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: November 18, 2014
    Assignee: Denki Kagaku Kogyo Kabushiki Kaisha
    Inventors: Hideki Hirotsuru, Yosuke Ishihara, Hideo Tsukamoto
  • Patent number: 8890237
    Abstract: A power semiconductor device according to one embodiment includes a first electrode, a semiconductor substrate provided on the first electrode, and an insulating member. A terminal trench is made in the upper surface of the semiconductor substrate in a region including a boundary between a cell region and a terminal region. The semiconductor substrate includes a first portion of a first conductivity type and connected to the first electrode, a second portion of the first conductivity type, a third portion of a second conductivity type provided on the second portion in the cell region and connected to the second electrode, and a fourth portion of the first conductivity type selectively provided on the third portion and connected to the second electrode. The insulating member is disposed between the third portion and the second portion in a direction from the cell region toward the terminal region.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: November 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahiro Kawano, Hideki Okumura
  • Patent number: 8884352
    Abstract: A method for manufacturing a memory cell in accordance with various embodiments may include: forming at least one charge storing memory cell structure over a substrate, the charge storing memory cell structure having a first sidewall and a second sidewall opposite the first sidewall; forming an electrically conductive layer over the substrate and the charge storing memory cell structure; patterning the electrically conductive layer to form a spacer at the first sidewall and a blocking structure at the second sidewall of the charge storing memory cell structure; implanting first dopant atoms to form a first doped region in the substrate proximate the spacer, wherein the first dopant atoms are blocked by the blocking structure; removing the blocking structure after implanting the first dopant atoms; implanting second dopant atoms to form a second doped region in the substrate proximate the second sidewall of the charge storing memory cell structure.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: November 11, 2014
    Assignee: Infineon Technologies AG
    Inventors: Danny Shum, Christoph Bukethal, Martin Stiftinger, John Power
  • Patent number: 8878157
    Abstract: A novel method for fabrication of hybrid semiconductor-graphene nanostructures in large scale by floating graphene sheets on the surface of a solution is provided. Using this approach, crystalline ZnO nano/micro-rod bundles on graphene fabricated using chemical vapor deposition were prepared. UV detectors fabricated using the as-prepared hybrid ZnO-graphene nano-structure with graphene being one of the two electrodes show high sensitivity to ultraviolet light, suggesting the graphene remained intact during the ZnO growth. This growth process provides a low-cost and robust scheme for large-scale fabrication of semiconductor nanostructures on graphene and may be applied for synthesis of a variety of hybrid semiconductor-graphene nano-structures demanded for optoelectronic applications including photovoltaics, photodetection, and photocatalysis.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: November 4, 2014
    Assignee: University of Kansas
    Inventors: Judy Wu, Jianwei Liu
  • Patent number: 8853752
    Abstract: In sophisticated semiconductor devices, transistors may be formed on the basis of an efficient strain-inducing mechanism by using an embedded strain-inducing semiconductor alloy. The strain-inducing semiconductor material may be provided as a graded material with a smooth strain transfer into the neighboring channel region in order to reduce the number of lattice defects and provide enhanced strain conditions, which in turn directly translate into superior transistor performance. The superior architecture of the graded strain-inducing semiconductor material may be accomplished by selecting appropriate process parameters during the selective epitaxial growth process without contributing to additional process complexity.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: October 7, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: El Mehdi Bazizi, Alban Zaka, Gabriela Dilliway, Bo Bai
  • Patent number: 8835961
    Abstract: Devices are described including a first component and a second component, wherein the first component comprises a Group III-N semiconductor and the second component comprises a bimetallic oxide containing tin, having an index of refraction within 15% of the index of refraction of the Group III-N semiconductor, and having negligible extinction coefficient at wavelengths of light emitted or absorbed by the Group III-N semiconductor. The first component is in optical contact with the second component. Exemplary bimetallic oxides include Sn1-xBixO2 where x?0.10, Zn2SnO2, Sn1-xAlxO2 where x?0.18, and Sn1-xMgxO2 where x?0.16. Methods of making and using the devices are also described.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: September 16, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Philip Kraus, Minh-Huu Le, Sandeep Nijhawan