Abstract: A method is described for eliminating abnormalities in a polycrystalline silicon integrated circuit structure, such as a silicon gate field effect transistor structure. The layer of polysilicon is deposited on an insulator coating which may be the thickness of the gate dielectric. The polycrystalline silicon is delineated by lithographic techniques and a reactive ion etching process to form the desired conductor structure which would include gate electrodes for the field effect transistor structure. A thickness of the polycrystalline silicon of the order of hundreds of Angstroms is left upon the insulator coating where the masking layer has openings. This thin coating of polycrystalline silicon in the order of hundreds of Angstroms is then thermally oxidized together with the exposed sidewall of the polycrystalline silicon in the areas under the opaque parts of the masking layer to form silicon dioxide on the sidewall of the polycrystalline silicone structures.