Patents Examined by Xia L Cross
  • Patent number: 11877496
    Abstract: A display device includes a display panel, a plurality of first pixels disposed in a first region of the display panel, a plurality of second pixels disposed in a second region of the display panel adjacent to the first region, and a plurality of dummy pixels disposed in a boundary region of the display panel between the first region and the second region. Intervals between the second pixels and the dummy pixels are uniform along the boundary region.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: January 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Young-Soo Yoon, Yun-Kyeong In, Hyunji Cha
  • Patent number: 11877494
    Abstract: A display apparatus includes a substrate including a display area and a sensor area, the sensor area including an auxiliary display area and a transmitting area, first display elements arranged over the display area, second display elements arranged over the auxiliary display area, transmitting units arranged in the transmitting area and configured to transmit at least a portion of light incident on the transmitting units, and an optical layer including a mesh pattern covering at least the second display elements.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: January 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Injun Bae, Donghwi Kim, Chulho Kim, Jin Jeon
  • Patent number: 11864440
    Abstract: An electroluminescent display device includes a substrate having an emission area and a transparent portion, the emission area including a sub-pixel, and the transparent portion being adjacent to the sub-pixel; a first electrode in the emission area and over the substrate; a transparent connection pattern in the transparent portion and over the substrate, the transparent connection pattern being spaced apart from the first electrode; a first bank covering an edge of the first electrode and exposing the transparent connection pattern in the transparent portion; and a second bank on the first bank and covering the transparent connection pattern in the transparent portion, wherein the second bank includes a transparent conductive material.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: January 2, 2024
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Hee-Tae Lim, Ji-Ho Kang, Hak-Min Lee, Hyuk-Chan Gee
  • Patent number: 11855184
    Abstract: A method for manufacturing a power semiconductor device includes forming a drift region in a substrate, forming a trench in the drift region, forming a gate insulating layer in the trench, depositing a conductive material on the substrate, forming a gate electrode in the trench, forming a body region in the substrate, forming a highly doped source region in the body region, forming an insulating layer that covers the gate electrode, etching the insulating layer to open the body region, implanting a dopant into a portion of the body region to form a highly doped body contact region, so that the highly doped source region and the highly doped body contact region are alternately formed in the body region; and forming a source electrode on the highly doped body contact region and the highly doped source region.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: December 26, 2023
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Soo Chang Kang, Seong Jo Hong
  • Patent number: 11856863
    Abstract: A method of forming a semiconductor memory device is disclosed. A top electrode layer is formed on the MTJ stack layer. A patterned buffer layer is formed to cover only the logic circuit region. A hard mask layer is formed on the top electrode layer and the patterned buffer layer. A patterned resist layer is formed on the hard mask layer. A first etching process is performed to etch the hard mask layer and the top electrode layer not covered by the patterned resist layer in the memory region and the hard mask layer, the patterned buffer layer and the top electrode layer in the logic circuit region, thereby forming a top electrode on the MTJ stack layer in the memory region and a remaining top electrode layer covering only the logic circuit region on the MTJ stack layer.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: December 26, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Hui-Lin Wang
  • Patent number: 11839114
    Abstract: The present disclosure discloses an organic light emitting display device. The organic light emitting display device includes a substrate, a driving transistor, a reflection electrode, a dielectric layer, a first and second electrode, and an organic light emitting layer. The driving transistor is in each of a plurality of pixel regions which are defined on the substrate. The reflection electrode is on the driving transistor, and is electrically connected to a gate electrode of the driving transistor. The dielectric layer is on the reflection electrode. The first electrode is on the dielectric layer, and is electrically connected to a source electrode of the driving transistor, and faces the reflection electrode. The organic light emitting layer is on the first electrode. The second electrode is on the organic light emitting layer.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: December 5, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Doo-Hyun Yoon, Hyoung-Su Kim, Hye-Seon Eom, Jong-Hyeok Im, Gyung-Min Kim
  • Patent number: 11839106
    Abstract: A highly reliable light-emitting device is provided. Damage to an element due to externally applied physical power is suppressed. Alternatively, in a process of pressure-bonding of an FPC, damage to a resin and a wiring which are in contact with a flexible substrate due to heat is suppressed. A neutral plane at which stress-strain is not generated when a flexible light-emitting device including an organic EL element is deformed, is positioned in the vicinity of a transistor and the organic EL element. Alternatively, the hardness of the outermost surface of a light-emitting device is high. Alternatively, a substrate having a coefficient of thermal expansion of 10 ppm/K or lower is used as a substrate that overlaps with a terminal portion connected to an FPC.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: December 5, 2023
    Inventors: Shunpei Yamazaki, Shingo Eguchi
  • Patent number: 11832455
    Abstract: The present application relates to display panel. An opening area of any one of sub-pixels of the first transitional display region is larger than an opening area of a same-colored sub-pixel of the first display region and is smaller than an opening area of a same-colored sub-pixel of the second display region. An interval between any two closest sub-pixels of a same color arranged in adjacent columns in the first display region is x; an interval between any two closest sub-pixels of a same color arranged in two adjacent columns respectively in the first transitional display region and the second display region is y; an interval between any two closest sub-pixels of a same color arranged in two adjacent columns in the second display region is z, wherein x?y?z. The present application also provides a display device.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: November 28, 2023
    Assignee: YUNGU (GU'AN) TECHNOLOGY CO., LTD.
    Inventors: Mingxing Liu, Ying Zhao, Bing Han, Shuaiyan Gan
  • Patent number: 11832488
    Abstract: A display device includes a multilayer passivation structure and has an undercut formed in the passivation structure such that a connection between a cathode and an auxiliary wiring is formed inside the undercut, so as to prevent voltage drop of the cathode and influence of hydrogen on thin film transistors and thus to improve reliability of the display device.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: November 28, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Yong Il Kim, Young Wook Lee, Na Ra Shin
  • Patent number: 11825710
    Abstract: A display device according to an embodiment includes a substrate including a display area, a first peripheral area disposed outside the display area, and a second peripheral area disposed between the display area and the first peripheral area; a common voltage supply line disposed on the first peripheral area and the second peripheral area of the substrate; and a common electrode electrically connected to the common voltage supply line, wherein the common voltage supply line includes a first opening disposed in the first peripheral area; and a second opening disposed in the second peripheral area, and the first opening and the second opening are different in size or arrangement.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Il Goo Youn, So Young Lee, Seung Woo Sung
  • Patent number: 11800756
    Abstract: A display apparatus of the present disclosure includes a display panel including an active area and an inactive area. The active area includes an anode electrode, an organic light-emitting layer, and a cathode electrode. The inactive area includes a gate driving portion and a crack stopper pattern, and further includes a connection area disposed in an area adjacent to the gate driving portion. In the connection area, the cathode electrode and a connection electrode may be in contact with each other.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: October 24, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Byung-Jun Lim, Hyun-Chul Um
  • Patent number: 11800741
    Abstract: A display unit including a first substrate and a second substrate that are disposed to face each other, a first organic insulating layer on the first substrate, a plurality of light-emitting elements arrayed in a display region, the display region on the first organic insulating layer and facing the second substrate and a first moisture-proof film covering the first organic insulating layer in a peripheral region, in which the peripheral region is provided on the first substrate and surrounds the display region.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: October 24, 2023
    Assignee: JOLED, INC.
    Inventors: Takatoshi Saito, Kenichi Izumi, Shinichi Teraguchi, Tadakatsu Nakadaira, Mikihiro Yokozeki, Shota Nishi, Manabu Kodate
  • Patent number: 11785797
    Abstract: A display device includes: a display panel including a front portion, a first side portion extended from a first side of the front portion, a second side portion extended from a second side of the front portion, and a corner portion between the first side portion and the second side portion. The display panel includes: a first display area on the front portion and including first pixels; and a second display area at the corner portion and including second pixels. The second display area includes a first encapsulation divider between adjacent ones of the second pixels.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: October 10, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hye Jin Joo, Jae Min Shin, Byeong Hee Won
  • Patent number: 11785817
    Abstract: The present disclosure provides a display panel including a display area, a ring-shaped wiring area, and a light-transmitting area. The display panel further includes a first metal layer, a second metal layer, a third metal layer, and an anode layer. The first metal layer includes a first scan line wired in the ring-shaped wiring area. The second metal layer includes a first bridge line. The third metal layer includes a first data line wired in the ring-shaped wiring area. The anode layer includes a second bridge line. The first data line is bridged with the first bridge line. The first scan line is bridged with the second bridge line.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: October 10, 2023
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Weiwei Yang, Chao Dai, Cheng Chen
  • Patent number: 11776997
    Abstract: In a general aspect, a semiconductor device can include a semiconductor region of a first conductivity type and a well region of a second conductivity type. The well region can be disposed in the semiconductor region. An interface between the well region and the semiconductor region can define a diode junction at a depth below an upper surface of the semiconductor region. The semiconductor device can further include at least one dielectric region disposed in the semiconductor region. A dielectric region of the at least one dielectric region can have an upper surface that is disposed in the well region at a depth in the semiconductor region that is above the depth of the diode junction; and a lower surface that is disposed in the semiconductor region at a depth in the semiconductor region that is the same depth as the diode junction or below the depth of the diode junction.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: October 3, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Shengling Deng, Dean E. Probst, Zia Hossain
  • Patent number: 11778881
    Abstract: A display device comprises a substrate in which a first subpixel and a second subpixel arranged to adjoin the first subpixel are defined, a first electrode provided in each of the first subpixel and the second subpixel on the substrate, a light emitting layer provided in each of the first subpixel and the second subpixel on the first electrode, a second electrode commonly provided in the first subpixel and the second subpixel on the light emitting layer, a trench portion provided between the first subpixel and the second subpixel, and an insulating portion filling at least a part of the trench portion.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: October 3, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Jiho Ryu
  • Patent number: 11778828
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate; an insulating layer provided on the substrate; a conductive layer provided on the insulating layer; a stacked body provided on the conductive layer and including a plurality of electrode layers and a plurality of insulating layers respectively provided among the plurality of electrode layers; a columnar section piercing through the stacked body to reach the conductive layer and extending in a first direction in which the stacked body is stacked; and a source layer. The columnar section includes a channel body and a charge storage film provided between the channel body and the respective electrode layers. The conductive layer includes a first film having electric conductivity and in contact with the lower end portion of the channel body; and an air gap provided to be covered by the first film.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: October 3, 2023
    Assignee: KIOXIA CORPORATION
    Inventor: Shinya Arai
  • Patent number: 11778869
    Abstract: A display unit includes: a drive wire; a planarization layer covering the drive wire and having a connection hole; a relay electrode provided on the planarization layer and configured to be electrically connected to the drive wire through the connection hole; a filling member made of an insulating material and provided in the connection hole; a first partition wall made of a same material as that of the filling member and covering an end of the relay electrode; a first electrode covering the filling member and configured to be electrically connected to the relay electrode; a second electrode facing the first electrode; and a functional layer located between the first electrode and the second electrode, the functional layer including a light-emitting layer.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: October 3, 2023
    Assignee: Sony Group Corporation
    Inventors: Shinichi Teraguchi, Eisuke Negishi, Shuji Kudo
  • Patent number: 11765949
    Abstract: An organic light-emitting display device includes a board that has an active area and an inactive area in the vicinity of the active area, a dielectric layer is disposed over the board, a pad into which a signal or power is input is disposed in the inactive area a conductive line which is disposed on the dielectric layer and is connected to the pad and along which power is thus transferred to the active area, a bump pattern is disposed underneath the dielectric layer, and the bump pattern includes a positive taper that is inclined toward the direction of the conductive line. Both sides of the conductive line include an inclined surface.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: September 19, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Moungo Kim, Yusok Lim, Taehoon Lee
  • Patent number: 11764239
    Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Hau Wu, Chun-Hao Chuang, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Cheng Yu Huang