Patents Examined by Yaima Campos
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Patent number: 8578105Abstract: Various technologies and techniques are disclosed for providing type stability techniques to enhance contention management. A reference counting mechanism is provided that enables transactions to safely examine states of other transactions. Contention management is facilitated using the reference counting mechanism. When a conflict is detected between two transactions, owning transaction information is obtained. A reference count of the owning transaction is incremented. The system ensures that the correct transaction was incremented. If the owning transaction is still a conflicting transaction, then a contention management decision is made to determine proper resolution. When the decision is made, the reference count on the owning transaction is decremented by the conflicting transaction. When each transaction completes, the reference counts it holds to itself is decremented. Data structures cannot be deallocated until their reference count is zero.Type: GrantFiled: August 2, 2011Date of Patent: November 5, 2013Assignee: Microsoft CorporationInventors: David Detlefs, Michael M. Magruder, John Joseph Duffy
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Patent number: 8566537Abstract: A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.Type: GrantFiled: March 29, 2011Date of Patent: October 22, 2013Assignee: Intel CorporationInventors: Yang Ni, Rajkishore Barik, Ali-Reza Adl-Tabatabai, Tatiana Shpeisman, Jayanth N. Rao, Ben J. Ashbaugh, Tomasz Janczak
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Patent number: 8549240Abstract: Disclosed is a data recovery mechanism associated with a data writing process in a storage area network (SAN). In general, a data writing mechanism is provided so that a particular host can write data to a storage device in a particular SAN session. One specific example of a data writing mechanism is a data tapping mechanism that provides a copy of this data to an appliance. The data recovery mechanism allows the appliance to recover data from the particular target, for example, when the data was unsuccessfully mirrored to the appliance during the data tapping or when the appliance needs to obtain the data that was written prior to a data tapping procedure being initiated. In one embodiment, the data recovery mechanism is set up so that the appliance can recover data from the target by mimicking the particular host.Type: GrantFiled: February 16, 2006Date of Patent: October 1, 2013Assignee: Cisco Technology, Inc.Inventors: Samar Sharma, Roy M. D'Cruz, Sanjaya Kumar, Jhaanaki M. Krishnan
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Patent number: 8549252Abstract: A file-mapped volume is a logical volume in which the data storage of the logical volume is the data storage of a regular file associated with the logical volume. The regular file can be a file of a first file system, and a second file system can be built upon the file-mapped volume. These two file systems can have distinct inode address spaces, yet files of the first file system are easily moved to the second file system by changing pointers to inodes of these files. The second file system can be easily copied, attached, or transported by copying, attaching, or transporting the regular file containing the second file system, yet files in the second file system can be accessed in real time via file access routines of the operating system.Type: GrantFiled: December 13, 2005Date of Patent: October 1, 2013Assignee: EMC CorporationInventor: Virendra M. Mane
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Patent number: 8527720Abstract: A method for pre-staging data includes obtaining a DST configuration of a virtual volume at a first point in time. The method also includes creating a Point-in-Time copy (PiT) in a destination storage pool when the virtual volume includes at least one PiT, or reconfiguring at least one virtual volume segment to contain a hot-spot. The virtual volume may or may not have PiTs. The method further includes recording the DST configuration, specifying the DST configuration be applied to the storage array at a second point in time, and applying the DST configuration to the storage array at the second point in time.Type: GrantFiled: December 3, 2008Date of Patent: September 3, 2013Assignee: LSI CorporationInventor: Martin Jess
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Patent number: 8504773Abstract: A system and method for buffering intermediate data in a processing pipeline architecture stores the intermediate data in a shared cache that is coupled between one or more pipeline processing units and an external memory. The shared cache provides storage that is used by multiple pipeline processing units. The storage capacity of the shared cache is dynamically allocated to the different pipeline processing units as needed, to avoid stalling the upstream units, thereby improving overall system throughput.Type: GrantFiled: December 2, 2008Date of Patent: August 6, 2013Assignee: Nvidia CorporationInventors: David B. Glasco, Peter B. Holmqvist, George R. Lynch, Patrick R. Marchand, James Roberts
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Patent number: 8484438Abstract: Some embodiments provide a system that facilitates concurrency control in a computer system. During operation, the system generates a set of signatures associated with memory accesses in the computer system. To generate the signatures, the system creates a set of hierarchical Bloom filters (HBFs) corresponding to the signatures, and populates the HBFs using addresses associated with the memory accesses. Next, the system compares the HBFs to detect a potential conflict associated with the memory accesses. Finally, the system manages concurrent execution in the computer system based on the detected potential conflict.Type: GrantFiled: June 29, 2009Date of Patent: July 9, 2013Assignee: Oracle America, Inc.Inventor: Robert E. Cypher
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Patent number: 8468295Abstract: Systems and methods for reducing problems and disadvantages associated with power consumption in memory devices are disclosed. A method for reducing power consumption in memory may include tracking, by an operating system executing on a processor, one or more logical units of a memory system that are in use. The method may also include setting, by the operating system, a variable indicating a portion of the memory system in use based on the logical units of the memory system in use. The method may additionally include refreshing one or more of the one or more logical units of the memory system based on the variable.Type: GrantFiled: December 2, 2009Date of Patent: June 18, 2013Assignee: Dell Products L.P.Inventors: Stuart Allen Berke, William Sauber
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Patent number: 8464013Abstract: A method and apparatus for constructing a memory-based database service platform, in which database can be on-loaded and off-loaded or unloaded as needed, and can reserve schedule and size of memory and other resources, including CPUs, network, backup, mirroring and recovery recourses. With the service platform, multiple different types of databases can be chosen by specifying data storage type and data operation interfaces, such as Relational Database (RDB), Biometric Database (BDB), Time Series Database (TDB), Data Driven Database (DDDB) and File-based Database (FDB) etc. Database types can be chosen either by user directly or by platform automatically or semi-automatically based on data types and data operation characteristics.Type: GrantFiled: October 25, 2011Date of Patent: June 11, 2013Assignee: Intelitrac Inc.Inventor: Tianlong Chen
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Patent number: 8458426Abstract: In a transceiver system a first interface receives data from a first channel using a first clock signal and transmits data to the first channel using a second clock signal. A second interface receives data from a second channel using a third clock signal and transmits data to the second channel using a fourth clock signal. A re-timer re-times data received from the first channel using the first clock signal and retransmits the data to the second channel using the fourth clock signal.Type: GrantFiled: January 19, 2007Date of Patent: June 4, 2013Assignee: Rambus Inc.Inventors: Kevin Donnelly, Mark Johnson, Chanh Tran, Nancy D. Dillon
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Patent number: 8458419Abstract: Systems and methods for backing up applications executing on a virtual machine are provided. The method comprises submitting a first notification to a remote computing system to prepare an application running on a virtual machine for backup, such that application data consistency is maintained during the backup process; receiving a second notification from the remote computing system, indicating that the application is prepared for backup; creating a snapshot of the virtual machine in response to the second notification; and receiving application data from the computing system to process the snapshot and complete an application-specific backup for the virtual machine.Type: GrantFiled: February 27, 2008Date of Patent: June 4, 2013Assignee: International Business Machines CorporationInventors: Jason Ferris Basler, David George Derk, James Patrick Smith
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Patent number: 8447916Abstract: Aspects of the subject matter described herein relate to storage configuration. In aspects, an interface is used to discover the existence, capacity, and characteristics of solid state storage. This information may be provided to a user or storage management process which may use the information to configure the solid state storage. When appropriate, bus bandwidth to the solid state storage as well as bandwidth to memory components of the solid state storage may be configured. Configuration and re-configuration may be performed automatically according to one or more policies maintained locally or remotely.Type: GrantFiled: February 17, 2010Date of Patent: May 21, 2013Assignee: Microsoft CorporationInventors: Trenton P. Rambo, Sean Nicholas McGrane
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Patent number: 8447949Abstract: One or more registers used to form an address usable in accessing storage are examined to determine if a zero address event has occurred in forming the address. In response to an indication that a zero address event has occurred in address formation, an alert is provided to the program using the address to access storage.Type: GrantFiled: June 18, 2009Date of Patent: May 21, 2013Assignee: International Business Machines CorporationInventors: Robert M. Abrams, Mark S. Farrell, Dan F. Greiner, Christian Jacobi, James H. Mulder, Peter J. Relson, Timothy J. Slegel, Peter K. Szwed
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Patent number: 8443137Abstract: The is provided a storage system comprising a plurality of disk units adapted to store data at respective ranges of logical block addresses (LBAs), said addresses constituting an entire address space, and a storage control grid operatively connected to the plurality of disk units and comprising a plurality of data servers.Type: GrantFiled: February 11, 2010Date of Patent: May 14, 2013Assignee: Infinidat Ltd.Inventors: Yechiel Yochai, Leo Corry, Haim Kopylovitz
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Patent number: 8443131Abstract: Operational information read out by a read-out sense amplifier (19) is transferred via the data line DB to a volatile memory section. The volatile memory section is configured with the volatile memory section (21) having a SRAM configuration and the second volatile memory section (23) configured with latch circuits, both sections respectively connected in parallel with the data line DB. The operational information, which may be provided depending on an operation state of the write-protect information and other information stored in the non-volatile memory cell MC selected by the word line WLWP, is written and read out with respect to the first volatile memory section (21) in response to the identification information linked with the operational information. The operational information which must be constantly accessible, is written into the second volatile memory section (23). Thus, the operational information is available in response to attributes of the operational information.Type: GrantFiled: October 26, 2005Date of Patent: May 14, 2013Assignee: Spansion LLCInventors: Mitsuhiro Nagao, Kenta Kato
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Patent number: 8438353Abstract: A method, system, and computer readable medium for asynchronously processing write operation on a volume having copy-on-write snapshots. In one embodiment, the method comprises the steps of: updating a normal mirror with write data associated with a write operation for the volume; asynchronously copying the write data from an asynchronous mirror to at least one copy-on-write snapshot; and, once the at least one copy-on-write snapshot is updated, updating the asynchronous mirror with the write data from the normal mirror.Type: GrantFiled: July 11, 2011Date of Patent: May 7, 2013Assignee: Symantec Operating CorporationInventors: Prem Anand Ramanathan, Niranjan Sanjiv Pendharkar, Subhojit Roy
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Patent number: 8438358Abstract: A system and method are provided for using a system-on-chip (SoC) memory speed control logic core to control memory maintenance and access parameters. A SoC is provided with an internal hardware-enabled memory speed control logic (MSCL) core. An array of SoC memory control parameter registers is accessed and a set of parameters is selected from one of the registers. The selected set of parameters is delivered to a SoC memory controller, to replace an initial set of parameters, and the memory controller manages an off-SoC memory using the delivered set of parameters.Type: GrantFiled: March 22, 2010Date of Patent: May 7, 2013Assignee: Applied Micro Circuits CorporationInventors: Waseem Saify Kraipak, George Bendak
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Patent number: 8433861Abstract: A method and apparatus for managing access to backup data on an archival storage system through storage media servers are described. In some examples, read operations are initiated. Each of the read operations is targeted to a respective plurality of the media servers specific for reading backup data from the archival storage system. Each read operation is delegated to each of its respective plurality of media servers until one of the respective plurality of media servers is available. The backup data specified by each read operation is read by the one media server of the respective plurality of media servers that is available. Each read operation may comprise a backup restoration, backup duplication, backup verification, or synthetic backup operation. Read operations can be targeted to a first and second plurality of media servers, which may be mutually exclusive. The archival storage system can be a tape storage system.Type: GrantFiled: September 25, 2008Date of Patent: April 30, 2013Assignee: Symantec CorporationInventors: Thomas Schlender, Brian Boehm
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Patent number: 8429378Abstract: A system and method to manage a translation lookaside buffer (TLB) is disclosed. In a particular embodiment, a method of managing a first TLB includes in response to starting execution of a memory instruction, setting a first field associated with an entry of the first TLB to indicate use of the entry. The method also includes setting a second field to indicate that the entry in the first TLB matches a corresponding entry in a second TLB.Type: GrantFiled: July 6, 2010Date of Patent: April 23, 2013Assignee: QUALCOMM IncorporatedInventors: Ajay Anant Ingle, Erich James Plondke, Muhammad T. Rab
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Patent number: 8429374Abstract: System, method, and program to perform simultaneous read and write operations in a NAND-type memory device, including: assigning a first partition in a NAND-type memory device, wherein the first partition is configured to perform read operations on high priority read content; assigning a second partition in the NAND-type memory device, wherein the second partition is configured to perform read operations and write operations, wherein the read operations are performed on non-high priority read content; and controlling the first partition and second partition to operate in a simultaneous manner.Type: GrantFiled: March 22, 2010Date of Patent: April 23, 2013Assignees: Sony Corporation, Sony Mobile Communications ABInventor: Wladyslaw Bolanowski