Patents Examined by Yaima Campos
  • Patent number: 8423732
    Abstract: A technique enables creation and use of a writable, read-only snapshot of an active file system operating on a storage system, such as a multi-protocol storage appliance. The writable, read-only snapshot comprises a read-only “image” (file) residing in a snapshot and a writable virtual disk (vdisk) residing in the active file system. The writable vdisk is a “shadow” image of the snapshot file image and, as such, includes an attribute that specifies the snapshot file as a backing store.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: April 16, 2013
    Assignee: NetApp, Inc.
    Inventor: Vijayan Rajan
  • Patent number: 8412911
    Abstract: A system and method for invalidating obsolete virtual/real address to physical address translations may employ translation lookaside buffers to cache translations. TLB entries may be invalidated in response to changes in the virtual memory space, and thus may need to be demapped. A non-cacheable unit (NCU) residing on a processor may be configured to receive and manage a global TLB demap request from a thread executing on a core residing on the processor. The NCU may send the request to local cores and/or to NCUs of external processors in a multiprocessor system using a hardware instruction to broadcast to all cores and/or processors or to multicast to designated cores and/or processors. The NCU may track completion of the demap operation across the cores and/or processors using one or more counters, and may send an acknowledgement to the initiator of the demap request when the global demap request has been satisfied.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: April 2, 2013
    Assignee: Oracle America, Inc.
    Inventors: Gregory F. Grohoski, Paul J. Jordan, Mark A. Luttrell, Zeid Hartuon Samoail
  • Patent number: 8412896
    Abstract: A method and system for backing up and restoring data in a file system that includes junctions is provided. In a backup operation, a junction is encoded as a symbolic link (“symlink”) directive, and sent with a sequential image data stream in the backup operation and written to a tape or disk. In a restore operation, when the encoded symlink directive is encountered after data is read from the tape, the symlink is decoded by an administrator to obtain the embedded junction information contained in the symlink directive. The administrator can then recreate the junction using the information. The junction information is thereby transmitted as part of the backup and restore operation while remaining transparent to third party software performing the backup and restore processes.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: April 2, 2013
    Assignee: NetApp, Inc.
    Inventors: Sridhar Chellappa, E. Rudolph Nedved, Umesh Rajasekaran
  • Patent number: 8407436
    Abstract: Multiple storage systems have capability to provide thin provisioning volumes to host computers and capability to transfer (import/export) management information regarding thin provisioning between storage systems. Moreover, at least one of the storage systems posses capability to provide storage area of other storage system as own storage area virtually via connection to the other storage system (i.e. external storage). Target storage system achieves efficient migration and unifying storage resource pool by importing or referring the management information obtained from source storage system and by utilizing the source storage system as external storage. One implementation involves method and process for migration of thin provisioning volumes using chunks having same length between source storage system and destination storage system.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: March 26, 2013
    Assignee: Hitachi, Ltd.
    Inventor: Hiroshi Arakawa
  • Patent number: 8407396
    Abstract: Block data access is provided for an operating system by allocating a portion of solid-state memory of a data processing arrangement for use as a block storage device. A block device interface is created that provides access to the portion of solid-state memory via firmware of the data processing arrangement. The block device interface emulates an electromechanical data-storage device. The block device interface is presented to the operating system at a boot-time of the operating system and the block device interface is accessed using a block device driver of the operating system during the boot-time of the operating system. The block device driver emulates the electromechanical data-storage device to the operating system.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 26, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arad Rostampour
  • Patent number: 8402240
    Abstract: A device and method is provided for commonly and securely allowing, as access control on a memory card, a plurality of information processing apparatuses to lock/unlock the memory. On the basis of a lock command input from an information processing apparatus serving as a host, such as a PC, an information storage device, such as a memory card, determines whether (a) a standard lock key set serving as a key set prohibiting output or (b) an export lock key set serving as a key set permitting output is detected and stores corresponding key set information. Only when the export lock key set is detected, output is permitted provided that predetermined verification succeeds.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: March 19, 2013
    Assignee: Sony Corporation
    Inventors: Takumi Okaue, Kenichi Nakanishi, Jun Tashiro, Hideaki Okubo
  • Patent number: 8402244
    Abstract: A system and method are provided for pooling storage devices in a virtual library for performing a storage operation. A storage management device determines a storage characteristic of a plurality of storage devices with respect to performing a storage operation. Based on a storage characteristic relating to performing the storage operation, the storage management device associates at least two storage devices in a virtual library. The storage management device may continuously monitor the virtual library and detect a change in storage characteristics of the storage devices. When changes in storage characteristics are detected, the storage management device may change associations of the storage device in the virtual library.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: March 19, 2013
    Assignee: CommVault Systems, Inc.
    Inventors: Rajiv Kottomtharayil, Ho-Chi Chen
  • Patent number: 8402219
    Abstract: A system for performing storage operations using hierarchically configured storage operation cells. The system includes a first storage manager component and a first storage operation cell. The first storage operation cell has a second storage manager component directed to performing storage operations in the first storage operation cell. Moreover, the first storage manager component is programmed to instruct the second storage manager regarding performance of storage operations in the first storage operation cell.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: March 19, 2013
    Assignee: CommVault Systems, Inc.
    Inventors: Srinivas Kavuri, Andre Duque Madeira
  • Patent number: 8386734
    Abstract: A method and apparatus for constructing a memory-based database service platform, in which database can be on-loaded and off-loaded or unloaded as needed, and can reserve schedule and size of memory and other resources, including CPUs, network, backup, mirroring and recovery recourses. With the service platform, multiple different types of databases can be chosen by specifying data storage type and data operation interfaces, such as Relational Database (RDB), Biometric Database (BDB), Time Series Database (TDB), Data Driven Database (DDDB) and File-based Database (FDB) etc. Database types can be chosen either by user directly or by platform automatically or semi-automatically based on data types and data operation characteristics.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: February 26, 2013
    Assignee: Intelitrac Inc.
    Inventor: Tianlong Chen
  • Patent number: 8386741
    Abstract: Embodiments of the invention relate to block layout and block allocation in a file system to support write transactions. Regions in a cluster file system are defined to support a block allocation, include both write affinity and wide striping region. An allocation map is maintained to define and support the block allocation regions. For each write transaction, a copy of data is written to both regions, and in the event there is a shortage of blocks in one of the regions, at least one block in the other region is dynamically converted to support the write transaction.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Karan Gupta, Reshu Jain, Prashant Pandey, Himabindu Pucha
  • Patent number: 8380919
    Abstract: The invention provides a flash storage device. In one embodiment, the flash storage device comprises a flash memory and a controller. The flash memory comprises a plurality of storage units for data storage, wherein the total capacity of each of the storage units is equal to a storage unit capacity. When the flash storage device receives a read capacity command from a host, the controller determines the size of a logical block to be a specific multiple of the storage unit capacity, and sends information about the logical block size to the host in response to the read capacity command, wherein the specific multiple is a natural number. After the host receives the information from the flash storage device, the host retrieves the logical block size from the information, and sends only write data with an amount equal to a multiple of the logical block size to the flash storage device.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: February 19, 2013
    Assignee: Silicon Motion, Inc.
    Inventor: I-Pao Chen
  • Patent number: 8380935
    Abstract: An atomic memory operation cache comprises a cache memory operable to cache atomic memory operation data, a write timer, and a cache controller. The cache controller is operable to update main memory with one or more dirty atomic memory operation cache entries stored in the cache memory upon expiration of the write timer, and is further operable to update main memory with one or more dirty atomic memory operation cache entries stored in the cache memory upon eviction of the one or more dirty atomic memory operation cache entries from the cache memory.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: February 19, 2013
    Assignee: Cray Inc.
    Inventors: Dennis C. Abts, Steven L. Scott
  • Patent number: 8375192
    Abstract: The present application includes methods and system for managing a storage device. In one implementation, a storage allocator that is present in a host or a storage device receives a request to store a file in a storage area of the storage device. The storage allocator marks the file as discardable in a file system structure associated with the storage device and updates a primary file allocation table (“FAT”) to associate a cluster chain that is allocated to the file with the file. The storage allocator additionally updates a discardable FAT or a database to reflect a physical location of the file, or may generate one or more location files that store the physical location of the file. The storage allocator then manages the storage area device based on the FAT and a discardable FAT, database, or one more location files indicating the physical location of the file.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: February 12, 2013
    Assignee: SanDisk IL Ltd.
    Inventors: Judah Gamliel Hahn, Baddireddi Kalyan Venkannadora Jagannadha, Natarajanja Raja Subramanian
  • Patent number: 8375189
    Abstract: A method and apparatus for configuring a memory device, such as a flash memory device, is herein described. Features/functional modules of a memory device, are selectable by a manufacturer, customer, or user. Instead of a manufacturer having to complete numerous redesigns of a memory product to meet multiple customer's special needs, a single all inclusive device is manufactured and the customized features are selected/configured, by the manufacturer, or by the customer themselves. By using one time programmable (OTP) flags, the features are enabled or disabled, by the manufacturer, customer, or user, and may potentially not be altered by a user later. Moreover, after configuring a memory device, a manufacturer, customer, or end user may also lock down a configuration module to ensure the configuration itself is not later intentionally or inadvertently altered.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: February 12, 2013
    Assignee: Intel Corporation
    Inventors: Shekoufeh Qawami, Joel T. Jorgensen, Geoffrey A. Gould
  • Patent number: 8375163
    Abstract: One embodiment of the invention sets forth a mechanism to transmit commands received from an L2 cache to a bank page within the DRAM. An arbiter unit determines which commands from a command sorter to transmit to a command queue. An activate command associated with the bank page related to the commands is also transmitted to an activate queue. The last command in the command queue is marked as “last.” An interlock counter stores a count of “last” commands in the read/write command queue. A DRAM controller transmits activate and commands from the activate queue and the command queue to the DRAM. Each time a command marked as “last” is encountered, the DRAM controller decrements the interlock counter. If the count in the interlock counter is zero, then the command marked as “last” is marked as “auto-precharge.” The “auto-precharge” command, when processed, causes the bank page to be closed.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: February 12, 2013
    Assignee: NVIDIA Corporation
    Inventors: John H. Edmondson, Shane Keil
  • Patent number: 8370588
    Abstract: A host computer is coupled to a first fabric, a source storage apparatus is coupled to a second fabric, and a destination storage apparatus is coupled to a third fabric. A destination port of the destination storage apparatus comprises a same WWPN as a WWPN of a source port, and is logged in to the fabric beforehand. Duplicate WWPNs are allowed to exist because an inter fabric router separately manages the second fabric and the third fabric. When a switchover is instructed, the inter fabric router switches a coupling destination of the host computer to the destination storage apparatus.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: February 5, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Akio Nakajima, Akira Fujibayashi
  • Patent number: 8370592
    Abstract: A technique migrates data from source arrays to target arrays. The array devices operate in either active mode, passive mode, or stalled-active mode. The technique involves providing active-to-passive instructions to transition the source devices from active to passive while a host initially accesses host data from the source arrays using MPIO software (the target devices being in stalled-active mode), and monitoring whether the source devices successfully transition to passive during a predefined time period. If so, the technique involves operating the target devices in active mode and transferring data from the source devices to the target devices to enable the host to access the host data from the target arrays using the MPIO software. However, if a source device remains passive, the technique involves providing passive-to-active instructions to transition the source devices back to active to enable the host to access the host data from the source arrays.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: February 5, 2013
    Assignee: EMC Corporation
    Inventors: Michael Specht, Steven Goldberg, Ian Wigmore, Patrick Brian Riordan, Arieh Don
  • Patent number: 8359429
    Abstract: System and method for distributing volume status information in a storage system. According to one embodiment, a system may include a plurality of volumes configured to store data, where the volumes are configured as mirrors of one another, and a plurality of hosts configured to access the plurality of volumes. A first one of the plurality of hosts may be configured to execute a mirror recovery process and to maintain a progress indication of the mirror recovery process, and the first host may be further configured to distribute the progress indication to another one or more of the plurality of hosts.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: January 22, 2013
    Assignee: Symantec Operating Corporation
    Inventors: Gopal Sharma, Richard Gorby, Santosh S. Rao, Aseem Asthana
  • Patent number: 8359456
    Abstract: Testing a circuit in a post-silicon stage is performed by enabling the different processing entities of the circuit to determine a consistent access permissions schema in a random manner. Based upon the consistent access permissions schema, addresses to be accessed during the testing of the circuit may be determined. The addresses may be determined in a random manner. The consistent permissions schema may be determined based on a template representative of repetitive portions of access permissions schema. The disclosed subject matter may utilize biasing modules to bias the test generation to provide a test having a predetermined characteristic. The disclosed subject matter may utilize a joint random seed or other techniques to provide for consistent random decisions by the different processing entities.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: January 22, 2013
    Assignee: International Business Machines Corporation
    Inventors: Allon Adir, Gil Shurek
  • Patent number: 8356158
    Abstract: One or more methods and systems of improving performance and reducing the size of a translation lookaside buffer are presented. In one embodiment, the method comprises using a bit obtained from a virtual page number to store even and odd page frame numbers into a single page frame number field of a miniature translation lookaside buffer (mini-TLB). In one embodiment, even and odd page frame number fields are consolidated into a single page frame number field. In one embodiment, the mini-TLB facilitates the use of a buffer or memory of reduced size. Furthermore, in one or more embodiments, aspects of the invention may be found in a system and method that easily incorporates and adapts the use of existing control processor instruction sets or commands of a typical translation lookaside buffer.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: January 15, 2013
    Assignee: Broadcom Corporation
    Inventors: Kimming So, Jane Lu