Patents Examined by Yaima Rigol
  • Patent number: 9891825
    Abstract: According to one embodiment, a memory system includes a first storage area and a controller. The first storage area configured to store therein data sent from a host. The size of the first storage area is a first size larger than a second size. The second size is a size of a logical address space which is assigned to a memory system by the host. The controller is configured to change the second size in response to a request from the host while at least a part of data in the logical address space stays valid.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: February 13, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Takahiro Nango, Yoshihisa Kojima, Tohru Fukuda
  • Patent number: 9875187
    Abstract: A first operation associated with a request for a page miss handler may be identified. A second operation associated with a current execution of the page miss handler may also be identified. An age of the first operation and an age of the second operation may be determined. The page miss handler may be interrupted based on the age of the first operation and the age of the second operation by stopping the current execution of the page miss handler for the second operation and starting execution of the page miss handler for the first operation.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: January 23, 2018
    Assignee: Intel Corporation
    Inventors: Christopher D. Bryant, Stephen J. Robinson
  • Patent number: 9870160
    Abstract: A method of operating a nonvolatile memory (NVM) is provided which includes calculating an assignment interval between successive assignments of erase blocks to free blocks from among a plurality of memory blocks of the NVM, and adjusting a number of erase blocks of the plurality of memory blocks according to the assignment interval. The erase blocks are memory blocks, having an erased state, from among the plurality of memory blocks, and the free blocks are memory blocks, which are selected to write data, from among the erase blocks.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: January 16, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In-Hwan Choi, ByungJune Song
  • Patent number: 9852066
    Abstract: A method includes determining a first logical block address (LBA) range of a first set of data units of a first candidate block of the memory. The method also includes determining a second LBA range of a second set of data units of a relocation block of the memory. The method also includes determining that the first LBA range matches the second LBA range. The method further includes relocating first valid data of the first candidate block to the relocation block of the memory in response to determining that the first LBA range matches the second LBA range, where the first LBA range corresponds to multiple LBAs.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: December 26, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Amir Shaharabany, Alon Marcu, Hadas Oshinsky
  • Patent number: 9852078
    Abstract: Sensing techniques and associated circuitry are provided for use with a memory device. The techniques are suited for sensing operations involving even-numbered or odd-numbered bit lines. In one approach, a mapping between caches and sense amplifiers in a sensing circuit is modified by using dual data buses. One bus is used for same-tier transfers and the other is used for cross-tier transfers. Each tier comprises a set of sense amplifiers and a corresponding set of caches. This approach does not require a modification of the input/output path which is connected to the sensing circuitry.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: December 26, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Shingo Zaitsu, Yosuke Kato, Naoki Ookuma
  • Patent number: 9836413
    Abstract: For maintaining consistency for a cache that contains dependent objects in a computing environment, object dependencies for cached objects are managed by defining and maintaining object dependency lists for each one of the cached objects for identifying objects upon which the cached objects are dependent. Maintaining cache consistency for 2 types of cache eviction policies is supported by maintaining an object dependency lists for each one of the cached objects for identifying objects dependent upon the cached object. Each of the objects in an object dependency list is updated when the object is updated.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: December 5, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yariv Bachar, Aviv Kuvent, Asaf Levy, Konstantin Muradov
  • Patent number: 9830097
    Abstract: A method, a computing device, and a non-transitory machine-readable medium for identifying a set of transactions directed to a contiguous chunk of data, even if received out of order, determining the data chunk size from the set of transactions, and for sequentially retrieving data chunks using the data chunk size is provided. In some embodiments, the method includes receiving, by a storage system, a set of data transactions from an initiator. The storage system identifies a subset of the set of data transactions that is directed to accessing a first chunk of data and determines, from the subset of transactions, a chunk size of the first chunk of data. The storage system sequentially retrieves a second chunk of data based on the determined chunk size.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: November 28, 2017
    Assignee: NetApp, Inc.
    Inventors: Sai Susarla, Sandeep Ummadi
  • Patent number: 9830078
    Abstract: A method includes booting an information handling system, providing by an EFI of the information handling system a memory segment for a first EFI type memory access, reserving a first portion of the segment from access by an operating system of the information handling system, determining a size of the first portion, determining a size of a second portion of the segment based upon the size of the first portion, allocating a third portion of the segment for the first EFI type memory access, the third portion including the first portion and the second portion, and passing a memory map to the operating system, the memory map including the third portion, wherein the third portion is reserved from access by the operating system.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: November 28, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Kurt D. Gillespie, Gregory S. Hudgins
  • Patent number: 9823846
    Abstract: Systems and methods are disclosed for expanding memory for a system on chip (SoC). A memory card is loaded in an expandable memory socket electrically and is coupled to a system on chip (SoC) via an expansion bus. The memory card comprises a first volatile memory device. In response to detecting the memory card, an expanded virtual memory map is configured. The expanded virtual memory map comprises a first virtual memory space associated the first volatile memory device and a second virtual memory space associated with a second volatile memory device electrically coupled to the SoC via a memory bus. One or more peripheral images associated with the second virtual memory space are relocated to a first portion of the first virtual memory space. A second portion of the first virtual memory space is configured as a block device for performing swap operations associated with the second virtual memory space.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: November 21, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Dexter Tamio Chun, Suryanarayana China Chittuluri, Yanru Li
  • Patent number: 9823857
    Abstract: A computer-implemented method for end-to-end quality of service control in distributed systems may include (1) identifying a plurality of computing systems, wherein each computing system (a) is coupled to a storage resource for the computing system, (b) hosts a plurality of applications that share the storage resource coupled to the computing system, (c) hosts a quality of service agent that limits throughput utilization of the storage resource by each of the plurality of applications, and (d) copies input/output data generated by the applications to a secondary computing system, (2) determining a throughput capacity of the secondary computing system, and (3) providing feedback to at least one quality of service agent hosted by at least one computing system to further limit throughput utilization of at least one of a plurality of applications hosted by the computing system. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: November 21, 2017
    Assignee: Veritas Technologies LLC
    Inventors: Niranjan Pendharkar, Prasanna Wakhare
  • Patent number: 9817590
    Abstract: A PLC data log module with backup function is proposed, the module including an internal memory configured to store the log data and to transmit the stored log data to the external memory, a backup memory configured to back-up the log data transmitted from the internal memory to the external memory and to store the backup data, and a controller configured to transmit the backup data stored in the backup memory to the external memory by controlling the backup memory when the PLC is turned off or reset.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: November 14, 2017
    Assignee: LSIS CO., LTD.
    Inventor: Seung Jong Kim
  • Patent number: 9817750
    Abstract: A method for storing user data is provided. The method includes distributing the user data throughout a plurality of storage nodes through erasure coding, wherein the plurality of storage nodes are housed within a single chassis that couples the storage nodes as a cluster, each of the plurality of storage nodes having nonvolatile solid-state memory for user data storage. The method includes performing analytics on user data and grouping portions of the user data according to results of the analytics. The method includes writing the user data to blocks of flash memory in the non-volatile solid-state memory, wherein each block receives portions of the user data grouped according to at least one of the results of the analytics.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: November 14, 2017
    Assignee: Pure Storage, Inc.
    Inventors: John Hayes, Shantanu Gupta, John Davis, Brian Gold, Zhangxi Tan
  • Patent number: 9811524
    Abstract: An apparatus comprising a processor component to: provide, to a control device, an indication of availability to perform a processing task with one or more data set portions as a node device; perform a processing task specified by the control device with the one or more data set portions; and request a pointer to a location at which to store the one or more data set portions as a data block within a data file. In response to the data set including partitioned data, for each data set portion, include a data sub-block size of the data set portion and a hashed identifier derived from a partition label of a partition in the request; receive, from the control device, the requested pointer to the location; and store each data set portion as a data sub-block within the data block starting at the location within the data file.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: November 7, 2017
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Steven E. Krueger, Richard Todd Knight, Chih-Wei Ho
  • Patent number: 9811460
    Abstract: Provided is a system including a multi channel memory and an operating method for the same. The multi channel memory may include a respective set of memories, wherein each set may include one or more memories. The operating method includes receiving access requests including system addresses for a multi channel memory having 2n channels, where n is a natural number greater than 0, allocating a first channel of the 2n channels based on n+1 or more bits of a first address of the system addresses, and performing an access of a respective set of memory devices through the allocated first channel.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: November 7, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Hong Jeon, Hyeok-Man Kwon, Nak-Hee Seong
  • Patent number: 9804784
    Abstract: A hybrid drive and associated methods provide low-overhead storage of a hibernation file in the hybrid hard disk drive. During operation, the hybrid drive allocates a portion of solid-state memory in the drive that is large enough to accommodate a hibernation file associated with a host device of the hybrid drive. In addition to the erased memory blocks that are normally present during operation of the hybrid drive, the portion of solid-state memory allocated for accommodating the hibernation file may include over-provisioned memory blocks, blocks used to store a previous hibernation file that has been trimmed, and/or non-dirty blocks.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: October 31, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Richard M. Ehrlich, Eric R. Dunn, Fernando Anibal Zayas, Thorsten Schmidt
  • Patent number: 9804778
    Abstract: Provided are a computer program product, system, and method for pre-allocating storage space for an application operation in a space efficient volume where a host system transmits writes to the space efficient volume. Physical storage space is allocated to the space efficient volume when the host system submits a write request. An amount of space needed by the write request is allocated to the volume in response to receiving the write request. A space allocation request is received from the host system for an application operation indicating a requested amount of space to allocate in the space efficient volume for the application operation. The requested amount of space is pre-allocated in the space efficient volume for the application operation in advance of the application operation needing the requested amount of space for a series of write operations that will be generated during the execution of the application operation.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: October 31, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert S. Gensler, Jr., Lisa J. Gundy, Christopher J. Miller, Jeffrey R. Suarez
  • Patent number: 9798494
    Abstract: Provided are a computer program product, system, and method for pre-allocating storage space for an application operation in a space efficient volume. To transmit application requests to a storage controller managing a space efficient volume, a determination is made of an amount of space required for an application operation requiring a series of write operations over a period of time to the space efficient volume. A space pre-allocation request for the application operation is transmitted to the storage controller. The space pre-allocation request indicates a requested amount of physical space to pre-allocate to the application operation to cause the storage controller to pre-allocate the requested amount of space in advance of the application operation needing the requested amount of space in the volume for the series of write operations.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: October 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert S. Gensler, Jr., Lisa J. Gundy, Christopher J. Miller, Jeffrey R. Suarez
  • Patent number: 9798499
    Abstract: A hybrid storage device that includes a hard-disk drive (HDD) and a flash memory is described. When control logic in the hybrid storage device receives a request from an external device to write a block of data to a logical address in a first portion of an address space that maps to the HDD, the control logic writes the block of data to the HDD. However, if there is a change in environmental state information of the hybrid storage device during the write operation, the control logic writes at least a portion of the block of data to a logical address for the block of data in a second portion of the address space which maps to the flash memory. Note that the address space may be common to the external device and the hybrid storage device.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: October 24, 2017
    Assignee: Apple Inc.
    Inventor: Khalu Bazzani
  • Patent number: 9778845
    Abstract: Disclosed herein is a file management system that includes an unformatted raw data area storing a plurality of raw data files at respective locations within the unformatted raw data area. The storage medium also includes a formatted partitioned area that includes a plurality of partitions each associated with a different file system. Each partition includes a plurality of metadata files each corresponding with one of the plurality of raw data files. Each metadata file includes metadata regarding the corresponding one of the plurality of raw data files.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: October 3, 2017
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Zhang Yang, Wang Hongming, Tatsuya Hirai
  • Patent number: 9772953
    Abstract: An apparatus and method for protecting kernel data integrity in an electronic device are provided. The method includes mapping a specified type of data to a read-only memory area, detecting a write attempt to the specified type of data, determining whether a process attempting to write to the specified type of data is permitted according to a specified condition, and allowing the write attempt if the process attempting to write to the specified type of data satisfies the specified condition.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: September 26, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Quan Chen, Ahmed Azab, Peng Ning, Guruprasad Ganesh