Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes a first transistor. The first transistor includes a first semiconductor layer, and the first semiconductor layer includes bismuth selenium oxide materials to enhance mobility of the first transistor and improve electrical performance of the display panel, so that the display panel meets requirements of high refresh rate and high transmittance.

Abstract: A semiconductor substrate includes a first semiconductor layer, a first dielectric layer coupled to the first semiconductor layer, and a second semiconductor layer coupled to the first dielectric layer. The second semiconductor layer includes a base portion substantially aligned with the first dielectric layer and a cantilever portion protruding from an end of the first dielectric layer. The cantilever portion includes a tapered surface tapering from a bottom surface of the second semiconductor layer toward a top surface of the second semiconductor layer.

Abstract: A novel comparison circuit, a novel amplifier circuit, a novel battery control circuit, a novel battery protection circuit, a power storage device, a semiconductor device, an electronic device, and the like are provided.

Abstract: A production line device prepares a superconducting circuit layer on a substrate. The device prepares an under bump metallization (UBM) layer on an upper surface of the superconducting circuit layer. A superconducting connection is formed between the UBM layer and the superconducting circuit layer. The production device prepares a welding spot on an upper surface of the UBM layer to obtain a qubit assembly configured for a flip-chip superconducting quantum chip. A superconducting electrical connection is formed between the welding spot and the UBM layer.

Abstract: An active matrix LED array precursor forming a precursor to a micro LED array is provided. The active matrix LED array precursor comprises a common first semiconducting layer comprising a substantially undoped Group III-nitride, a plurality of transistor-driven LED precursors, and a common source contact. Each transistor-driven LED precursor comprises a monolithic light emitting diode (LED) structure comprising a plurality of III-nitride semiconducting layers, a barrier semiconducting layer, and a gate contact. Each monolithic LED structure is formed on a portion of the common semiconducting layer. The barrier semiconducting is layer formed on a portion of the common semiconducting layer encircling the LED structure and configured to induce a two-dimensional electron channel layer at the interface between the common semiconducting layer and the barrier semiconducting layer. The gate contact is formed over a portion of the two-dimensional electron channel layer, the gate contact encircling the LED structure.

Abstract: Provided are a method for preparing an organic electroluminescent device, an organic electroluminescent device and a display apparatus.

Abstract: A semiconductor device includes a substrate, a body structure and an electronic component. The body structure is disposed above the substrate and includes a semiconductor die, a molding compound, a conductive component and a lower redistribution layer (RDL). The semiconductor die has an active surface. The molding compound encapsulates the semiconductor die and has a lower surface, an upper surface opposite to the lower surface and a through hole extending to the upper surface from the lower surface. The conductive component is formed within the through hole. The lower RDL is formed on the lower surface of the molding compound, the active surface of the semiconductor die and the conductive component exposed from the lower surface. The electronic component is disposed above the upper surface of the molding compound and electrically connected to the lower RDL through the conductive component.

Abstract: An array substrate is disclosed and includes: a base substrate (1); an excitation light source (2) on a side of the base substrate (1); and a sub pixel on a side of the excitation light source (2) facing away from the base substrate (1). The sub pixel at least includes a first-kind sub pixel (3). The first-kind sub pixel (3) includes a first quantum dot conversion layer (31), a first recycling component layer (32) and a first color film layer (33) sequentially located on the side of the excitation light source (2) facing away from the base substrate (1), and the first recycling component layer (32) is configured to limit at least part of light with a wavelength smaller than a wavelength of emergent light of the first-kind sub pixel (3) into the first recycling component layer (32) and the first quantum dot conversion layer (31).

Abstract: The present disclosure relates to magnetic devices. In particular, the disclosure relates to magnetic memory and logic devices that employ the voltage control of magnetic anisotropy (VCMA) effect for magnetization switching. The present disclosure provides a method for manufacturing a magnetic structure for such a magnetic device. The method comprising the following steps: providing a bottom electrode layer, forming a SrTiO3 (STO) stack on the bottom electrode layer by atomic layer deposition (ALD) of at least two different STO nanolaminates, forming a magnetic layer on the STO stack, and forming a perpendicular magnetic anisotropy (PMA) promoting layer on the magnetic layer, the PMA promoting layer being configured to promote PMA in the magnetic layer.

Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.

Abstract: A semiconductor package that contains an application-specific integrated circuit (ASIC) die and a micro-electromechanical system (MEMS) die. The MEMS die and the ASIC die are coupled to a substrate that includes an opening that extends through the substrate and is in fluid communication with an air cavity positioned between and separating the MEMS die from the substrate. The opening exposes the air cavity to an external environment and, following this, the air cavity exposes a MEMS element of the MEMS die to the external environment. The air cavity separating the MEMS die from the substrate is formed with a method of manufacturing that utilizes a thermally decomposable die attach material.

Abstract: The invention relates to a sensing module and a manufacturing method thereof, which firstly provides a transparent substrate, and then a sensor, a colloid, and an optical cover body disposed on a first surface of the transparent substrate. The colloid is surrounded the encrypted chip and is connected with the transparent substrate and the optical cover. Finally, a light source irradiates the colloid through a second surface of the transparent substrate to cure the colloid for obtaining the sensing module.

Abstract: The invention provides a laser rapid fabrication method for flexible gallium nitride (GaN) photodetector which comprises the following steps: (1) bonding a flexible substrate to a GaN epitaxial wafer; (2) adjusting the focal plane position of a light beam, and ensuring that the light beam is incident from the side of a GaN epitaxial wafer substrate; (3) enabling the light beam to perform scanning irradiation from the edge of a sample structure obtained in the step (1); (4) adjusting the process parameters, and scanning irradiation in the reverse direction along the path in the step (3); (5) remove the original rigid transparent substrate of the epitaxial wafer to obtain a Ga metal nanoparticle/GaN film/flexible substrate structure; and (6) preparing interdigital electrodes on the surfaces of the Ga metal nanoparticles obtained in the step (5).

Abstract: Provided is a semiconductor device including: a semiconductor substrate including a bulk donor; and a first buffer region of a first conductivity type, the first buffer region being provided on a lower surface side of the semiconductor substrate and having one or more doping concentration peaks and one or more hydrogen concentration peaks in a depth direction of the semiconductor substrate, in which a doping concentration at a shallowest concentration peak, out of the doping concentration peaks of the first buffer region, closest to the lower surface of the semiconductor substrate is 50 times as high as a concentration of the bulk donor of the semiconductor substrate or lower. The doping concentration at the shallowest concentration peak may be lower than a reference carrier concentration obtained when current that is 1/10 of rated current flows between an upper surface and the lower surface of the semiconductor substrate.

Abstract: A manufacturing method for memory includes: providing a substrate, and forming a first isolation layer and discrete bit lines on the substrate; removing part of the first isolation layer by a thickness to form discrete first trenches; forming word lines filling the first trenches, wherein the word lines each has a first side wall and a second side wall opposite to each other; forming discrete through holes each being between adjacent word lines; forming a first dielectric layer on surface of exposed first side wall, and forming a second dielectric layer on surface of exposed second side wall; and forming an active layer filling the through holes.

Abstract: A method of forming an ultrasonic transducer device involves depositing a first layer on a substrate, depositing a second layer on the first layer, patterning the second layer at a region corresponding to a location of a transducer cavity, depositing a third layer that refills regions created by patterning the second layer, planarizing the third layer to a top surface of the second layer, removing the second layer, conformally depositing a fourth layer over the first layer and the third layer, defining the transducer cavity in a support layer formed over the fourth layer; and bonding a membrane to the support layer.

Abstract: This light detecting element has a simple configuration, and is highly sensitive to a prescribed wavelength region. The light detecting element comprises a positive electrode, a negative electrode, and an active layer that is provided between the positive electrode and the negative electrode, and that includes a p-type semiconductor material and n-type semiconductor material. The thickness of the active layer is at least 800 nm. The weight ratio between the p-type semiconductor material and the n-type semiconductor material included in the active layer (p/n ratio) is at most 99/1. The work function of the negative electrode side surface in contact with the active layer is lower than the absolute value of the LUMO energy level of the n-type semiconductor material.

Abstract: The present disclosure provides a method and system for manufacturing a semiconductor layer. The method includes: placing a first wafer in a cavity to form a metal film on the first wafer; before forming the metal film, the temperature inside the cavity is a first temperature; transferring the first wafer on which the metal film has been formed out of the cavity; the temperature in the cavity is a second temperature, and the second temperature is greater than the first temperature; introducing an inert gas into the cavity to cool the cavity, such that the temperature in the cavity is equal to the first temperature; after the temperature in the cavity is equal to the first temperature, placing a second wafer in the cavity to form the metal film on the second wafer. The manufacturing method can reduce the defects on the surface of the metal film.

Abstract: A semiconductor structure includes a substrate, word lines, bit line contact plugs, and first isolation layers. The word lines are located in the substrate. A bit line contact hole is provided between two adjacent word lines. The bit line contact plugs are located in the bit line contact holes. The first isolation layers are located on side walls of the bit line contact holes and cover side walls of the bit line contact plugs.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body, memory pillars, first and second insulation layers and an isolation region. The stacked body above a substrate includes conductive layers isolated from each other and stacked along a first direction crossing the substrate surface. The memory pillars extend through the stacked body along the first direction. The first insulation layer is provided above the memory pillars. The isolation region is provided higher than upper surfaces of the memory pillars in the stacked body along the first direction, and isolates the stacked body in a second direction crossing the first direction. The second insulation layer is provided on the first insulation layer and a side wall of the isolation region.