Patents by Inventor A J Lambert

A J Lambert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230095608
    Abstract: A embedded passive structure, a microelectronic system, and an integrated circuit device assembly, and a method of forming the embedded passive structure. The embedded passive structure includes a base layer; a passive device attached to the base layer; a first power plane comprising metal and adjacent an upper surface of the base layer, the first power plane having a portion electrically coupled to a terminal of the passive device, wherein an upper surface of a combination of the first power plane and the passive device defines a recess; a second power plane comprising metal, the second power plane at least partially within the recess and having a lower surface that conforms with the upper surface of the combination; and a liner including a dielectric layer between the first power plane and the second power plane.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Adel Elsherbini, Aleksandar Aleksov, Feras Eid, Henning Braunisch, Thomas L. Sounart, Johanna Swan, Beomseok Choi, Krishna Bharath, William J. Lambert, Kaladhar Radhakrishnan
  • Publication number: 20230096368
    Abstract: An inductor structure, a package substrate, an integrated circuit device, an integrated circuit device assembly and a method of fabricating the inductor structure. The inductor structure includes: an electrically conductive body; and a magnetic structure including a non-electrically-conductive magnetic material, wherein: one of the magnetic structure or the electrically conductive body wraps around another one of the magnetic structure or the electrically conductive body to form the inductor structure therewith; and at least one of the electrically conductive body or the magnetic structure has a granular microstructure including randomly distributed particles presenting substantially non-linear particle-to-particle boundaries with one another.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Aleksandar Aleksov, Adel Elsherbini, Johanna Swan, Feras Eid, Thomas L. Sounart, Henning Braunisch, Beomseok Choi, Krishna Bharath, Kaladhar Radhakrishnan, William J. Lambert
  • Patent number: 11616283
    Abstract: Embodiments include an electronic package that includes a radio frequency (RF) front end. In an embodiment, the RF front end may comprise a package substrate and a first die attached to a first surface of the package substrate. In an embodiment, the first die may include CMOS components. In an embodiment, the RF front end may further comprise a second die attached to the first surface of the package substrate. In an embodiment, the second die may comprise amplification circuitry. In an embodiment, the RF front end may further comprise an antenna attached to a second surface of the package substrate. In an embodiment, the second surface is opposite from the first surface.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: March 28, 2023
    Assignee: Intel Corporation
    Inventors: Omkar Karhade, William J. Lambert, Xiaoqian Li, Sidharth Dalmia
  • Publication number: 20230088170
    Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first die, having a first surface and an opposing second surface, in a first layer; a redistribution layer (RDL) on the first layer, wherein the RDL is electrically coupled to the second surface of the first die by solder interconnects, and a second die in a second layer on the RDL, wherein the second die is electrically coupled to the RDL by non-solder interconnects.
    Type: Application
    Filed: September 21, 2021
    Publication date: March 23, 2023
    Applicant: Intel Corporation
    Inventors: Xavier Francois Brun, Sanka Ganesan, Holly Sawyer, William J. Lambert, Timothy A. Gosselin, Yuting Wang
  • Patent number: 11608564
    Abstract: Devices and methods including a though-hole inductor for an electronic package are shown herein. Examples of the through-hole inductor include a substrate including at least one substrate layer. Each substrate layer including a dielectric layer having a first surface and a second surface. An aperture included in the dielectric layer is located from the first surface to the second surface. The aperture includes an aperture wall from the first surface to the second surface. A conductive layer is deposited on the first surface, second surface, and the aperture wall. At least one coil is cut from the conductive layer and located on the aperture wall.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: March 21, 2023
    Assignee: Intel Corporation
    Inventors: William J. Lambert, Mihir K Roy, Mathew J Manusharow, Yikang Deng
  • Publication number: 20230082706
    Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first redistribution layer (RDL), having a first surface with first conductive contacts having a first pitch between 170 microns and 400 microns, an opposing second surface, and first conductive pathways between the first and second surfaces; a first die and a conductive pillar in a first layer on the first RDL; a second RDL on the first layer, the second RDL having a first surface, an opposing second surface with second conductive contacts having a second pitch between 18 microns and 150 microns, and second conductive pathways between the first and second surfaces; and a second die, in a second layer on the second RDL, electrically coupled to the first conductive contacts via the first conductive pathways, the conductive pillar, the second conductive pathways, and the second conductive contacts.
    Type: Application
    Filed: September 15, 2021
    Publication date: March 16, 2023
    Applicant: Intel Corporation
    Inventors: Sanka Ganesan, William J. Lambert, Bharat Prasad Penmecha, Xavier Francois Brun
  • Publication number: 20230060727
    Abstract: A microelectronic assembly is provided comprising a first integrated circuit (IC) die having an electrical load circuit, a second IC die having a portion of a voltage regulator (VR), and a third IC die comprising inductors of the VR. The third IC die is between the first IC die and the second IC die, and the VR receives power at a first voltage and provides power at a second voltage to the electrical load circuit, the second voltage being lower than the first voltage. In various embodiments, the inductors in the third IC die comprise magnetic thin films. The third IC die may be a passive die without any active elements in some embodiments. In some embodiments, the microelectronic assembly further comprises a package substrate having conductive pathways, and the second IC die is between the third IC die and the package substrate.
    Type: Application
    Filed: August 26, 2021
    Publication date: March 2, 2023
    Applicant: Intel Corporation
    Inventors: Kaladhar Radhakrishnan, Krishna Bharath, William J. Lambert, Adel A. Elsherbini, Sriram Srinivasan, Christopher Schaef
  • Publication number: 20230068300
    Abstract: A microelectronic assembly is provided, comprising a first IC die having an electrical load circuit, a second IC die having a portion of a voltage regulator (VR) electrically coupled to the first IC die, a package substrate having inductors of the VR electrically coupled to the first IC die and the second IC die, and a mold compound between the first IC die and the package substrate. The VR receives power at a first voltage from the package substrate and provides power at a second voltage to the electrical load circuit, the second voltage being lower than the first voltage. In various embodiments, the second IC die is in the mold compound. In some embodiments, the mold compound and the second IC die are comprised in a discrete interposer electrically coupled to the first IC die with die-to-die interconnects and to the package substrate with die-to-package substrate interconnects.
    Type: Application
    Filed: August 26, 2021
    Publication date: March 2, 2023
    Applicant: INTEL CORPORATION
    Inventors: Krishna Bharath, William J. Lambert, Christopher Schaef, Alexander Lyakhov, Kaladhar Radhakrishnan, Sriram Srinivasan
  • Patent number: 11434481
    Abstract: A device for rapid non-destructive genetic material collection can include a multi-reservoir array (202) and a movement mechanism. The multi-reservoir array (202) can include multiple reservoirs (204). A plurality of the multiple reservoirs (204) can include an abrasive surface (210) capable of retaining a source of genetic material in a liquid carrier. The abrasive surface (210) has a roughness. The movement mechanism can be operable to move the multi-reservoir array (202) in an oscillating motion sufficient to create relative movement between the abrasive surface (210) and the source of the genetic material in order to remove a portion of genetic material from the source of the genetic material without destroying the source of the genetic material or the portion of the genetic material that is removed.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: September 6, 2022
    Assignee: University of Utah Research Foundation
    Inventors: Raheel Samuel, Christopher J. Lambert, Bruce K. Gale, Joshua L. Bonkowsky, Briana Freshner, Tak Chi Arlen Chung
  • Publication number: 20220278439
    Abstract: Disclosed herein are integrated circuit (IC) packages, antenna boards, antenna modules, and communication devices (e.g., for millimeter wave communications). For example, in some embodiments, an antenna module may include: a logic die; a radio frequency front-end (RFFE) die in electrical communication with the logic die; and an antenna patch, wherein the RFFE die is closer to the antenna patch than the logic die is to the antenna patch.
    Type: Application
    Filed: May 9, 2022
    Publication date: September 1, 2022
    Applicant: Intel Corporation
    Inventors: Sidharth Dalmia, Jonathan Jensen, Ozgur Inac, Trang Thai, William J. Lambert, Benjamin Jann
  • Publication number: 20220256715
    Abstract: Embodiments of the invention include a mmWave transceiver and methods of forming such devices. In an embodiment, the mmWave transceiver includes an RF module. The RF module may include a package substrate, a plurality of antennas formed on the package substrate, and a die attached to a surface of the package substrate. In an embodiment, the mmWave transceiver may also include a mainboard mounted to the RF module with one or more solder balls. In an embodiment, a thermal feature is embedded within the mainboard, and the thermal feature is separated from the die by a thermal interface material (TIM) layer. According to an embodiment, the thermal features are slugs and/or vias. In an embodiment, the die compresses the TIM layer resulting in a TIM layer with minimal thickness.
    Type: Application
    Filed: July 30, 2021
    Publication date: August 11, 2022
    Inventors: Divya MANI, William J. LAMBERT, Shawna LIFF, Sergio A. CHAN ARGUEDAS, Robert L. SANKMAN
  • Publication number: 20220238410
    Abstract: An apparatus is provided which comprises: one or more pads comprising metal on a first substrate surface, the one or more pads to couple with contacts of an integrated circuit die, one or more substrate layers comprising dielectric material, one or more conductive contacts on a second substrate surface, opposite the first substrate surface, the one or more conductive contacts to couple with contacts of a printed circuit board, one or more inductors on the one or more substrate layers, the one or more inductors coupled with the one or more conductive contacts and the one or more pads, and highly thermally conductive material between the second substrate surface and a printed circuit board surface, the highly thermally conductive material contacting the one or more inductors. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: April 14, 2022
    Publication date: July 28, 2022
    Applicant: Intel Corporation
    Inventor: William J. Lambert
  • Publication number: 20220225905
    Abstract: A system includes a sensor applicator, a sensor control device arranged within the sensor applicator and including an electronics housing and a sensor extending from a bottom of the electronics housing, and a cap coupled to one of the sensor applicator and the sensor control device, wherein the cap is removable prior to deploying the sensor control device from the sensor applicator.
    Type: Application
    Filed: March 30, 2022
    Publication date: July 21, 2022
    Applicant: ABBOTT DIABETES CARE INC.
    Inventors: Christopher A. Thomas, Louis Pace, Dharmendra Patel, Vincent M. Dipalma, Vivek S. Rao, Steven T. Mitchell, Byron J. Lambert, Peter G. Robinson, Peter M. Voit, Stephen T. Pudjijanto, Matthew Simmons, Hsuehchieh Wu, Vu H. Le, Johnathan D. Manion, Christopher M. Harris, Tuan Nguyen, Carter W. Phillip, Jonathan D. Mccanless
  • Publication number: 20220225904
    Abstract: A system includes a sensor applicator, a sensor control device arranged within the sensor applicator and including an electronics housing and a sensor extending from a bottom of the electronics housing, and a cap coupled to one of the sensor applicator and the sensor control device, wherein the cap is removable prior to deploying the sensor control device from the sensor applicator.
    Type: Application
    Filed: March 30, 2022
    Publication date: July 21, 2022
    Applicant: ABBOTT DIABETES CARE INC.
    Inventors: Christopher A. Thomas, Louis Pace, Dharmendra Patel, Vincent M. Dipalma, Vivek S. Rao, Steven T. Mitchell, Byron J. Lambert, Peter G. Robinson, Peter M. Voit, Stephen T. Pudjijanto, Matthew Simmons, Hsuehchieh Wu, Vu H. Le, Johnathan D. Manion, Christopher M. Harris, Tuan Nguyen, Carter W. Phillip, Jonathan D. Mccanless
  • Publication number: 20220216611
    Abstract: In accordance with disclosed embodiments, there is an antenna package using a ball attach array to connect an antenna and base substrates of the package. One example is an RF module package including an RF antenna package having a stack material in between a top and a bottom antenna layer to form multiple antenna plane surfaces, a base package having alternating patterned conductive and dielectric layers to form routing through the base package, and a bond between a bottom surface of the antenna package and to a top surface of the base package.
    Type: Application
    Filed: March 25, 2022
    Publication date: July 7, 2022
    Applicant: Intel Corporation
    Inventors: Jimin Yao, Robert L. Sankman, Shawna M. Liff, Sri Chaitra Jyotsna Chavali, William J. Lambert, Zhichao Zhang
  • Patent number: 11381599
    Abstract: A method of generating cyber chaff can include determining a cell of a grid of cells to which a first feature and a second feature of user data maps, identifying a cell type of the cell, the cell type indicating whether the cell is an active cell, an inactive cell, or a sub-process cell, and providing cyber chaff based on cyber chaff data associated with either (a) one or more cells of the inactive cell type or (b) one or more cells of the sub-process cell type.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: July 5, 2022
    Assignee: Raytheon Company
    Inventors: Holger M. Jaenisch, James W. Handley, Michael J. Lambert, Brandon Woolley, William L. Cram, Ross MacKinnon, Mark A. Bradbury, Guy G. Swope
  • Patent number: 11351515
    Abstract: A structural improvement for microwave-assisted high temperature high-pressure chemistry vessel systems is disclosed that among other advantages offers dynamic venting and resealing while a reaction proceeds and eliminates the risk of cross contamination associated with systems that use a common pressurized chamber. The improvement includes a relatively thin-walled disposable liner cylinder that includes one closed end and one open end defining a mouth, and a liner cap positioned in the mouth of the rigid liner cylinder for closing the rigid liner cylinder. The liner cap includes a depending column that engages the inside diameter of the rigid liner cylinder, and a disk at one end of the depending column having a diameter sufficient to rest upon the rigid liner cylinder without falling into the rigid cylinder liner so that the cylindrical liner cap can rest in the rigid liner cylinder at the mouth of the rigid liner cylinder.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: June 7, 2022
    Assignee: CEM Corporation
    Inventor: Joseph J. Lambert
  • Patent number: 11355849
    Abstract: In accordance with disclosed embodiments, there is an antenna package using a ball attach array to connect an antenna and base substrates of the package. One example is an RF RF module package including an RF antenna package having a stack material in between a top and a bottom antenna layer to form multiple antenna plane surfaces, a base package having alternating patterned conductive and dielectric layers to form routing through the base package, and a bond between a bottom surface of the antenna package and to a top surface of the base package.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: June 7, 2022
    Assignee: Intel Corporation
    Inventors: Jimin Yao, Shawna M. Liff, William J. Lambert, Zhichao Zhang, Robert L. Sankman, Sri Chaitra J. Chavali
  • Patent number: 11335618
    Abstract: An apparatus is provided which comprises: one or more pads comprising metal on a first substrate surface, the one or more pads to couple with contacts of an integrated circuit die, one or more substrate layers comprising dielectric material, one or more conductive contacts on a second substrate surface, opposite the first substrate surface, the one or more conductive contacts to couple with contacts of a printed circuit board, one or more inductors on the one or more substrate layers, the one or more inductors coupled with the one or more conductive contacts and the one or more pads, and highly thermally conductive material between the second substrate surface and a printed circuit board surface, the highly thermally conductive material contacting the one or more inductors. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: May 17, 2022
    Assignee: Intel Corporation
    Inventor: William J. Lambert
  • Patent number: 11309976
    Abstract: An acoustic communication and messaging system includes an acoustic transducer adapted for communicating signals via a subsurface acoustic medium, and a controller in communication with the acoustic transducer. The controller can include one or more of a signal programmer adapted for defining a limited set of coded signals; e.g., where each of the coded signals selected for low cross-correlation with other coded signals in the limited set, and a signal encoder adapted for defining a set of messages or commands; e.g., where each message is associated with a selected one of the coded signals in the limited set. The acoustic transducer can be adapted to transmit the coded signals associated with identified messages via the subsurface acoustic medium. An interface can be provided for identifying messages for coding and transmission, and for reporting decoded commands to a user.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: April 19, 2022
    Assignee: ION Geophysical Corporation
    Inventors: Dale J. Lambert, Robert H. Kemp, Nicholas Muguira