Patents by Inventor A J Lambert

A J Lambert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220102261
    Abstract: Embodiments of the invention include an electrical package and methods of forming the package. In one embodiment, a transformer may be formed in the electrical package. The transformer may include a first conductive loop that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first conductive loop from a second conductive loop that is formed in the package. Additional embodiments of the invention include forming a capacitor formed in the electrical package. For example, the capacitor may include a first capacitor plate that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first capacitor plate form a second capacitor plate that is formed in the package. The thin dielectric spacer material in the transformer and capacitor allow for increased coupling factors and capacitance density in electrical components.
    Type: Application
    Filed: December 7, 2021
    Publication date: March 31, 2022
    Inventors: Adel A. ELSHERBINI, Mathew J. MANUSHAROW, Krishna BHARATH, William J. LAMBERT, Robert L. SANKMAN, Aleksandar ALEKSOV, Brandon M. RAWLINGS, Feras EID, Javier SOTO GONZALEZ, Meizi JIAO, Suddhasattwa NAD, Telesphor KAMGAING
  • Publication number: 20220094263
    Abstract: Embodiments disclosed herein include inductor arrays. In an embodiment, an inductor array comprises a first inductor with a first inductance. In an embodiment, the first inductor is switched at a first frequency. In an embodiment, the inductor array further comprises a second inductor with a second inductance that is different than the first inductance. In an embodiment, the second inductor is switched at a second frequency that is different than the first frequency.
    Type: Application
    Filed: September 23, 2020
    Publication date: March 24, 2022
    Inventors: Krishna BHARATH, Christopher SCHAEF, William J. LAMBERT, Kaladhar RADHAKRISHNAN
  • Publication number: 20220093314
    Abstract: Embodiments disclosed herein include power transformers for microelectronic devices. In an embodiment, a power transformer comprises a magnetic core that is a closed loop with an inner dimension and an outer dimension, and a primary winding around the magnetic core. In an embodiment, the primary winding has a first number of first turns connected in series around the magnetic core. In an embodiment, a secondary winding is around the magnetic core, and the secondary winding has a second number of second turns around the magnetic core. In an embodiment, individual ones of the second turns comprise a plurality of secondary segments connected in parallel.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 24, 2022
    Inventors: Anuj MODI, Huong DO, William J. LAMBERT, Krishna BHARATH, Harish KRISHNAMURTHY
  • Publication number: 20220093536
    Abstract: Embodiments disclosed herein include coreless interposers with embedded inductors. In an embodiment, a coreless interposer comprises a plurality of buildup layers, where electrical routing is provided in the plurality of buildup layers. In an embodiment, the coreless interposer further comprises an inductor embedded in the plurality of buildup layers. In an embodiment, the inductor comprises a magnetic shell, and a conductive lining over an interior surface of the magnetic shell.
    Type: Application
    Filed: September 23, 2020
    Publication date: March 24, 2022
    Inventors: Krishna BHARATH, William J. LAMBERT, Haifa HARIRI, Siddharth KULASEKARAN, Mathew MANUSHAROW, Anne AUGUSTINE
  • Patent number: 11227825
    Abstract: Embodiments of the invention include an electrical package and methods of forming the package. In one embodiment, a transformer may be formed in the electrical package. The transformer may include a first conductive loop that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first conductive loop from a second conductive loop that is formed in the package. Additional embodiments of the invention include forming a capacitor formed in the electrical package. For example, the capacitor may include a first capacitor plate that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first capacitor plate form a second capacitor plate that is formed in the package. The thin dielectric spacer material in the transformer and capacitor allow for increased coupling factors and capacitance density in electrical components.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: January 18, 2022
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Mathew J. Manusharow, Krishna Bharath, William J. Lambert, Robert L. Sankman, Aleksandar Aleksov, Brandon M. Rawlings, Feras Eid, Javier Soto Gonzalez, Meizi Jiao, Suddhasattwa Nad, Telesphor Kamgaing
  • Publication number: 20210407903
    Abstract: An integrated circuit (IC) die package substrate comprises a first trace upon, or embedded within, a dielectric material. The first trace comprises a first metal and a first via coupled to the first trace. The first via comprises the first metal and a second trace upon, or embedded within, the dielectric material. A second via is coupled to the second trace, and at least one of the second trace or the second via comprises a second metal with a different microstructure or composition than the first metal.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Applicant: Intel Corporation
    Inventors: Adel Elsherbini, Feras Eid, Georgios Dogiamis, Henning Braunisch, Beomseok Choi, William J. Lambert, Stephen Morein, Ahmed Abou-Alfotouh, Johanna Swan
  • Patent number: 11211866
    Abstract: An adjustable inductance system includes a plurality of inductor modules coupled to a corresponding plurality of loads and a pool of at least one floating inductor module that may be coupled in parallel with any one of the plurality of inductor modules. A control circuit monitors the current drawn through the inductor module by the load. If current draw exceeds a threshold, the control circuit couples a floating inductor module to the load. Using the current drawn by the load, the control circuit determines an appropriate inductance value and determines an appropriate inductor configuration for the inductor module, the floating inductor module, or both the inductor module and the floating inductor module to achieve the determined inductance value. The control circuit causes switching elements to transition to a state or position to achieve the inductor configuration.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: December 28, 2021
    Assignee: Intel Corporation
    Inventors: William J. Lambert, Kaladhar Radhakrishnan, Beomseok Choi, Krishna Bharath, Michael J. Hill
  • Patent number: 11163077
    Abstract: A marine seismic sensor system includes a seismic node having at least one seismic sensor. The sensor is configured for sampling seismic energy when towed through a water column on a rope. The coupling can be adapted to modulate transmission of acceleration from the rope to the seismic node.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: November 2, 2021
    Assignee: Ion Geophysical Corporation
    Inventor: Dale J. Lambert
  • Publication number: 20210304952
    Abstract: Devices and methods including a though-hole inductor for an electronic package are shown herein. Examples of the through-hole inductor include a substrate including at least one substrate layer. Each substrate layer including a dielectric layer having a first surface and a second surface. An aperture included in the dielectric layer is located from the first surface to the second surface. The aperture includes an aperture wall from the first surface to the second surface. A conductive layer is deposited on the first surface, second surface, and the aperture wall. At least one coil is cut from the conductive layer and located on the aperture wall.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 30, 2021
    Inventors: William J. Lambert, Mihir K. Roy, Mathew J. Manusharow, Yikang Deng
  • Patent number: 11112841
    Abstract: Embodiments of the invention include a mmWave transceiver and methods of forming such devices. In an embodiment, the mmWave transceiver includes an RF module. The RF module may include a package substrate, a plurality of antennas formed on the package substrate, and a die attached to a surface of the package substrate. In an embodiment, the mmWave transceiver may also include a mainboard mounted to the RF module with one or more solder balls. In an embodiment, a thermal feature is embedded within the mainboard, and the thermal feature is separated from the die by a thermal interface material (TIM) layer. According to an embodiment, the thermal features are slugs and/or vias. In an embodiment, the die compresses the TIM layer resulting in a TIM layer with minimal thickness.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: September 7, 2021
    Assignee: Intel Corporation
    Inventors: Divya Mani, William J. Lambert, Shawna Liff, Sergio A. Chan Arguedas, Robert L. Sankman
  • Publication number: 20210233867
    Abstract: Embodiments herein describe techniques for an IC package including a supporting layer having a first zone and a second zone. An electronic component is placed above the first zone of the supporting layer. An underfill material is formed above the first zone of the supporting layer, around or below the electronic component to support the electronic component. The second zone of the supporting layer includes a base area and multiple micro-pillars above the base area, where any two micro-pillars of the multiple micro-pillars are separated by a gap in between. The second zone has a hydrophobic surface including surfaces of the multiple micro-pillars and surfaces of the base area. The second zone is a keep out zone to prevent the underfill material from entering the second zone. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 29, 2021
    Inventors: Bassam ZIADEH, Joseph VAN NAUSDLE, Zhou YANG, William J. LAMBERT, Mitul MODI
  • Publication number: 20210204841
    Abstract: A system includes a sensor applicator, a sensor control device arranged within the sensor applicator and including an electronics housing and a sensor extending from a bottom of the electronics housing, and a cap coupled to one of the sensor applicator and the sensor control device, wherein the cap is removable prior to deploying the sensor control device from the sensor applicator.
    Type: Application
    Filed: December 4, 2020
    Publication date: July 8, 2021
    Applicant: ABBOTT DIABETES CARE INC.
    Inventors: Christopher A. Thomas, Louis Pace, Dharmendra Patel, Vincent M. Dipalma, Vivek S. Rao, Steven T. Mitchell, Byron J. Lambert, Peter G. Robinson, Peter M. Voit, Stephen T. Pudjijanto, Matthew Simmons, Hsuehchieh Wu, Vu H. Le, Johnathan D. Manion, Christopher M. Harris, Tuan Nguyen, Carter W. Phillip, Jonathan D. Mccanless
  • Publication number: 20210177315
    Abstract: A system includes a sensor applicator, a sensor control device arranged within the sensor applicator and including an electronics housing and a sensor extending from a bottom of the electronics housing, and a cap coupled to one of the sensor applicator and the sensor control device, wherein the cap is removable prior to deploying the sensor control device from the sensor applicator.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 17, 2021
    Applicant: ABBOTT DIABETES CARE INC.
    Inventors: Christopher A. Thomas, Louis Pace, Dharmendra Patel, Vincent M. Dipalma, Vivek S. Rao, Steven T. Mitchell, Byron J. Lambert, Peter G. Robinson, Peter M. Voit, Stephen T. Pudjijanto, Matthew Simmons, Hsuehchieh Wu, Vu H. Le, Johnathan D. Manion, Christopher M. Harris, Tuan Nguyen, Carter W. Phillip, Jonathan D. Mccanless
  • Publication number: 20210161437
    Abstract: A system includes a sensor applicator, a sensor control device arranged within the sensor applicator and including an electronics housing and a sensor extending from a bottom of the electronics housing, and a cap coupled to one of the sensor applicator and the sensor control device, wherein the cap is removable prior to deploying the sensor control device from the sensor applicator.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 3, 2021
    Applicant: ABBOTT DIABETES CARE INC.
    Inventors: Christopher A. Thomas, Louis Pace, Dharmendra Patel, Vincent M. Dipalma, Vivek S. Rao, Steven T. Mitchell, Byron J. Lambert, Peter G. Robinson, Peter M. Voit, Stephen T. Pudjijanto, Matthew Simmons, Hsuehchieh Wu, Vu H. Le, Johnathan D. Manion, Christopher M. Harris, Tuan Nguyen, Carter W. Phillip, Jonathan D. Mccanless
  • Publication number: 20210139885
    Abstract: A device for rapid non-destructive genetic material collection can include a multi-reservoir array (202) and a movement mechanism. The multi-reservoir array (202) can include multiple reservoirs (204). A plurality of the multiple reservoirs (204) can include an abrasive surface (210) capable of retaining a source of genetic material in a liquid carrier. The abrasive surface (210) has a roughness. The movement mechanism can be operable to move the multi-reservoir array (202) in an oscillating motion sufficient to create relative movement between the abrasive surface (210) and the source of the genetic material in order to remove a portion of genetic material from the source of the genetic material without destroying the source of the genetic material or the portion of the genetic material that is removed.
    Type: Application
    Filed: July 3, 2018
    Publication date: May 13, 2021
    Inventors: Raheel Samuel, Christopher J. Lambert, Bruce K. Gale, Johsua L. Bonkowsky, Brianna Freshner, Arlen Chung
  • Patent number: 10998120
    Abstract: Devices and methods including a though-hole inductor for an electronic package are shown herein. Examples of the through-hole inductor include a substrate including at least one substrate layer. Each substrate layer including a dielectric layer having a first surface and a second surface. An aperture included in the dielectric layer is located from the first surface to the second surface. The aperture includes an aperture wall from the first surface to the second surface. A conductive layer is deposited on the first surface, second surface, and the aperture wall. At least one coil is cut from the conductive layer and located on the aperture wall.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: May 4, 2021
    Assignee: Intel Corporation
    Inventors: William J. Lambert, Mihir K Roy, Mathew J Manusharow, Yikang Deng
  • Publication number: 20210125944
    Abstract: Embodiments include inductors and methods to form the inductors. An inductor includes a substrate layer that surrounds a magnetic layer, where the magnetic layer is embedded between the substrate layer. The inductor also includes a dielectric layer that surrounds the substrate and magnetic layers, where the dielectric layer fully embeds the substrate and magnetic layers. The inductor further includes a first conductive layer over the dielectric layer, a second conductive layer below the dielectric layer, and a plurality of plated-through-hole (PTH) vias in the dielectric and substrate layers. The PTH vias vertically extend from the first conductive layer to the second conductive layer, and the magnetic layer in between the PTH vias. The magnetic layer may have a thickness that is substantially equal to a thickness of the substrate layer, where the thickness of the magnetic layer is less than a thickness defined between the first and second conductive layers.
    Type: Application
    Filed: October 28, 2019
    Publication date: April 29, 2021
    Inventors: William J. LAMBERT, Sri Chaitra Jyotsna CHAVALI
  • Publication number: 20210116336
    Abstract: An extraction method for preparing samples for analytical analysis is disclosed. The method includes the steps of placing a sample matrix containing one or more analytes in a heat conductive sample cup, positioning the heat conductive sample cup in a pressure-resistant reaction chamber, dispensing solvent into the heat conductive sample cup, dispersing the solvent and the sample matrix in the sample cup in the reaction chamber, heating the sample matrix and the extraction solvent in the heat conductive sample cup in the reaction chamber to a temperature at which the dispensed solvent generates an above-atmospheric pressure, and releasing the extraction solvent extract from the sample cup at atmospheric pressure.
    Type: Application
    Filed: January 16, 2020
    Publication date: April 22, 2021
    Applicant: CEM Corporation
    Inventors: Michael J. Collins, SR., Joseph J. Lambert, Matthew N. Beard, Paul C. Elliott
  • Publication number: 20210036618
    Abstract: An adjustable inductance system includes a plurality of inductor modules coupled to a corresponding plurality of loads and a pool of at least one floating inductor module that may be coupled in parallel with any one of the plurality of inductor modules. A control circuit monitors the current drawn through the inductor module by the load. If current draw exceeds a threshold, the control circuit couples a floating inductor module to the load. Using the current drawn by the load, the control circuit determines an appropriate inductance value and determines an appropriate inductor configuration for the inductor module, the floating inductor module, or both the inductor module and the floating inductor module to achieve the determined inductance value. The control circuit causes switching elements to transition to a state or position to achieve the inductor configuration.
    Type: Application
    Filed: September 28, 2017
    Publication date: February 4, 2021
    Applicant: Intel Corporation
    Inventors: WILLIAM J. Lambert, Kaladhar Radhakrishnan, Beomseok Choi, Krishna Bharath, Michael J. Hill
  • Patent number: 10868366
    Abstract: Embodiments are generally directed to a package architecture for antenna arrays. An embodiment of an apparatus includes an electronic package, the electronic package including one or more routing layers; a transmitter to drive a signal for wireless transmission; and an assembled phased array antenna to transmit the signal, the assembled phased array antenna including a plurality of separate antenna elements in an array, each antenna element of the array being individually attached to a first side of the electronic package. The antenna elements include a first antenna element and a second antenna element, wherein the first antenna element is separated from the second antenna element by a gap.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: December 15, 2020
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Shawna M. Liff, William J. Lambert