Patents by Inventor A-Ming Chang

A-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088267
    Abstract: A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yi PENG, Chih Chieh YEH, Chih-Sheng CHANG, Hung-Li CHIANG, Hung-Ming CHEN, Yee-Chia YEO
  • Publication number: 20240088691
    Abstract: The battery pack with the plurality of batteries is determined to have been fully charged and set in a stationary state, the discharge operation proceeds according to specified relationships of the voltage of each battery, a first predetermined voltage difference, and a discharge starting voltage, or the balance operation proceeds according to specified relationships of the voltage of each battery, the first predetermined voltage difference, a balance starting voltage and a second predetermined voltage difference.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: CHIH-YU CHUNG, Fong-Ming CHANG, TSUNG-NAN WU
  • Patent number: 11929258
    Abstract: An integrated circuit structure includes a first metal feature formed into a first dielectric layer, a second metal feature formed into a second dielectric layer, the second dielectric layer being disposed on said first dielectric layer, and a via connecting the first metal feature to the second metal feature, wherein a top portion of the via is offset from a bottom portion of the via.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Ming Chang, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau, Chung-Ju Lee, Tien-I Bao, Shau-Lin Shue
  • Patent number: 11926266
    Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: March 12, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Shih-Wei Yeh, Chien-Chih Lin, Yi-Ming Chou, Chun-Chieh Chang
  • Patent number: 11928247
    Abstract: An encryption and signature device for AI model protection is provided. The encryption and signature device for AI model protection includes a key derivation unit, a model encryption unit, a model password encryption unit, an image generation unit and a signature unit. The key derivation unit is configured to derive a model key according to a model password and a derivation function. The model encryption unit is configured to encrypt an AI model according to the model key to generate an encrypted AI model. The model password encryption unit is configured to encrypt the model password to generate an encrypted model password. The image generation unit is configured to generate an image file according to the encrypted model password and the encrypted AI model. The signature unit is configured to sign the image file according to a private key to obtain a signed image file.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: March 12, 2024
    Assignee: CVITEK CO. LTD.
    Inventors: Tsung-Hsien Lin, Jen-Shi Wu, Hsiao-Ming Chang
  • Patent number: 11929767
    Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: March 12, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chieh-Hsun Hsiao, Ming-Chou Wu, Wen-Chang Lee, Narayanan Baskaran, Wei-Hsin Tseng, Jenwei Ko, Po-Sen Tseng, Hsin-Hung Chen, Chih-Yuan Lin, Caiyi Wang
  • Publication number: 20240078833
    Abstract: The fingerprint sensing circuit includes a photo detector, a capacitor, a current mirror and a switch circuit. The capacitor has a first terminal electrically connected to the first terminal of the photo detector. The current mirror has an input terminal electrically connected to the first terminal of the photo detector and an output terminal electrically connected to a sensing line. In an exposure period, the switch circuit turns off the current mirror. In a sensing period, the switch circuit turns on the current mirror to generate a current on the sensing line, and the detecting circuit is configured to generate a fingerprint signal according to the current.
    Type: Application
    Filed: September 5, 2022
    Publication date: March 7, 2024
    Inventors: Yaw-Guang CHANG, Jia-Ming HE, Zong-You HOU
  • Publication number: 20240077875
    Abstract: The present disclosure provides a positioning method, including: obtaining a current local topology map established based on objects in an environment currently observed by a robot, obtaining a full topology map pre-established based on objects in a full environment in a preset area, the current local topology map and the full topology map including nodes representing the objects; matching a node pair to be associated constructed by two nodes in the current local topology map and two nodes in the full topology map; if a degree of association of the node pair to be associated is greater than a threshold, determining that the node pair to be associated is an associated node pair; and determining a pose of the robot according to one of a plurality of search ranches, with a largest number of associated node pairs.
    Type: Application
    Filed: August 25, 2023
    Publication date: March 7, 2024
    Inventors: ZHI-GUANG XIAO, SI-BO LAI, MING-HUI GU, ZHI-CHANG QIU, WEI-LIN LIN
  • Publication number: 20240079050
    Abstract: A memory device is provided, including an array of bit cells and a set of tracking cells. The set of tracking cells is arranged adjacent to the array of bit cells along a first direction. The set of tracking cells includes a set of first tracking cells configured to perform a read tracking operation and a set of second tracking cells configured to perform a write tracking operation and arranged adjacent to the set of first tracking cells along a second direction. First tracking cells in the set of first tracking cells are coupled in series with each other and arranged along the second direction, and second tracking cells in the set of second tracking cells are coupled in series with each other and arranged along the second direction.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuang Ting CHEN, Peijiun LIN, Ching-Wei WU, Feng-Ming CHANG
  • Publication number: 20240077351
    Abstract: A water level detection method via video recognition, includes steps of obtaining an image of a water level gauge from a camera; wherein the water level gauge includes multiple two-dimensional barcodes; and determining a water level according to the two-dimensional barcodes. When a body of water partly covers the water level gauge, the body of water would cover some of the two-dimensional barcodes, leaving the rest of visible two-dimensional barcodes corresponding to the water level. When the water is clear, the two-dimensional barcodes underwater would be visible yet at the same time indecipherable due to distorted barcode scales. This way, the present invention is able to avoid accidentally counting two-dimensional barcodes underwater, and thus more accurately and robustly detect water levels.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: Chia-Ming CHANG, Paul Kuei-Ker SUN
  • Patent number: 11923253
    Abstract: A device includes a first transistor, a second transistor, and a dielectric structure. The first transistor is over a substrate and has a first gate structure. The second transistor is over the substrate and has a second gate structure. The dielectric structure is between the first gate structure and the second gate structure. The dielectric structure has a width increasing from a bottom position of the dielectric structure to a first position higher than the bottom position of the dielectric structure. A width of the first gate structure is less than the width of the dielectric structure at the first position.
    Type: Grant
    Filed: February 10, 2023
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuei-Ming Chang, Rei-Jay Hsieh, Cheng-Han Wu, Chie-luan Lin
  • Patent number: 11923250
    Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Ju Chou, Chih-Chung Chang, Jiun-Ming Kuo, Che-Yuan Hsu, Pei-Ling Gao, Chen-Hsuan Liao
  • Patent number: 11921947
    Abstract: A touch function setting method is provided. The method comprising: receiving a sequence parameter which includes multiple clicks, each of the clicks is corresponding to one of areas of a touch panel or screen; receiving a function parameter corresponding to the sequence parameter, the function parameter is corresponding to activate a function; and storing a group of touch function parameters, which includes the sequence parameter and the function parameter.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: March 5, 2024
    Assignee: EGALAX_EMPIA TECHNOLOGY INC.
    Inventors: Chin-Fu Chang, Shang-Tai Yeh, Chia-Ling Sun, Jia-Ming Chen
  • Patent number: 11923032
    Abstract: The present disclosure provides a circuit for detecting leakage between word lines in a memory device. The circuit includes a first and a second coupling capacitor. A first terminals of the first and second coupling capacitors are connected to a first word line and a second word line, respectively. The first terminals of the first and second coupling capacitors are also connected to a first and a second voltage supply, respectively. The circuit further includes a comparator, wherein a first input of the comparator is connected to a second terminal of the first coupling capacitor and a second input of the comparator is connected to a second terminal of the second coupling capacitor. The comparator is configured to send alarm signal when a differential voltage between the first input and the second input of the comparator is larger than a hysteresis level of the comparator.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: March 5, 2024
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Kun Yang, Min She, Albert I. Ming Chang
  • Patent number: 11923429
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Patent number: 11918892
    Abstract: A gaming system and an operation method of a gaming server thereof are provided. The gaming system includes multiple player devices and the gaming server. The gaming server establishes a network connection with the player devices. In response to one of the player devices initiating a game, the gaming server sends a game notification to the player devices according to a player list. The gaming server determines a common throughput between the player devices based on a response of each of the player devices to the game notification.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: March 5, 2024
    Assignee: Acer Incorporated
    Inventors: Kuan-Ju Chen, Hung-Ming Chang
  • Publication number: 20240065664
    Abstract: A physiological signal measurement device is disclosed. In some implementations, the physiological signal measurement device includes a fixing element, a rack, a first sensor, and a second sensor. The fixing element is configured to be fixed on a limb of a user. The rack is configured to engage the fixing element and includes a first end and a second end distal to the first end. The first sensor is disposed on the first end of the rack. The sensor is disposed on the second end of the rack. The first end of the rack has a first stiffness, the second end of the rack has a second stiffness, and the first stiffness is higher than the second stiffness.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventors: CHENG YAN GUO, KUAN JEN WANG, PEI-MING CHIEN, HAO-CHING CHANG
  • Publication number: 20240069305
    Abstract: An imaging lens assembly module includes an imaging lens element set, a lens carrier and a light blocking structure. The imaging lens element set has an optical axis. At least one lens element of the lens elements is disposed in the lens carrier. The light blocking structure includes a light blocking opening. The optical axis passes through the light blocking opening, and the light blocking opening includes at least two arc portions and a shrinking portion. Each of the arc portions has a first curvature radius for defining a maximum diameter of the light blocking opening. The shrinking portion is connected to the arc portions for forming the light blocking opening into a non-circular shape. The shrinking portion includes at least one protruding arc which extends and shrinks gradually from the shrinking portion to the optical axis, and the protruding arc has a second curvature radius.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Inventors: Lin-An CHANG, Ming-Ta CHOU, Shu-Yun YANG, Cheng-Feng LIN
  • Publication number: 20240069416
    Abstract: A light path folding element includes a first surface, a second surface, a first reflecting surface and a second reflecting surface. A light travels from the first surface into the light path folding element. The second surface is disposed relative to the first surface along a first direction and is parallel to the first surface, and the first direction is perpendicular to the first surface. The first reflecting surface connects the first surface and the second surface, an acute angle is formed between the first reflecting surface and the first surface, and the light forms an internal reflection via the first reflecting surface. The light forms another internal reflection via the second reflecting surface. The light path folding element further includes a light blocking structure, which extends from at least one of the first surface and the second surface into the light path folding element.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 29, 2024
    Inventors: Ssu-Hsin LIU, Wei-Che TUNG, Lin-An CHANG, Ming-Ta CHOU
  • Patent number: D1016698
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: March 5, 2024
    Assignee: Foxtron Vehicle Technologies Co., Ltd.
    Inventors: Tse-Min Cheng, Ming-Chang Lin, Yuan-Jie He, Chiao-Chi Lin, Lu-Han Lee