Abstract: A method for fabricating semiconductor devices is disclosed. The method includes forming a gate trench over a semiconductor channel, the gate trench being surrounded by gate spacers. The method includes sequentially depositing a work function metal, a glue metal, and an electrode metal in the gate trench. The method includes etching respective portions of the electrode metal and the glue metal to form a gate electrode above a metal gate structure. The metal gate structure includes a remaining portion of the work function metal and the gate electrode includes a remaining portion of the electrode metal. The gate electrode has an upper surface extending away from a top surface of the metal gate structure.

Abstract: An interconnect structure and a method of forming the interconnect structure are provided. The interconnect structure includes one or more metal lines in direct contact with a top surface of one or more devices and one or more vias in direct contact with top surfaces of the one or more metal lines. The interconnect structure also includes one or more dielectric pillars in direct contact with the top surface of the one or more devices. A height of a top surface of the one or more dielectric pillars above the one or more devices is equal to a height of a top surface of the one or more vias above the one or more devices.

Abstract: An IC structure includes a first active area including a first plurality of fin structures extending in a first direction, a second active area including a second plurality of fin structures extending in the first direction, an electrical fuse (eFuse) extending in the first direction between the first and second active areas and electrically connected to each of the first and second pluralities of fin structures, a first plurality of gate structures extending over the first active area perpendicular to the first direction, a second plurality of gate structures extending over the second active area in the second direction, a first signal line extending in the first direction adjacent to the first active area and electrically connected to the first plurality of gate structures, and a second signal line extending in the first direction adjacent to the second active area and electrically connected to the second plurality of gate structures.

Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.

Abstract: A robot joint, including: a housing; an output shaft, at least partially housed inside the housing and provided with a shaft portion and a flange portion at a first end of the shaft portion; a first bearing portion, housed in the housing and supporting a first position of the flange portion of the output shaft; a second bearing portion, housed in the housing and supporting a second position of the output shaft in an axial direction; and a motor, housed in the housing, where the second bearing portion is arranged between the motor and the first bearing portion along the axial direction of the output shaft. Further provided is a robot. By effectively supporting the output shaft at multiple points, the output shaft is enabled to more effectively and stably bear the moment or bending moment of a load, and the robot joint structure is enabled to be compact and lighter.

Abstract: Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.

Abstract: A CMOS apparatus includes an n-doped field effect transistor (nFET); and a p-doped field effect transistor (pFET), each of which has a source structure and a drain structure. A common backside drain contact, which is disposed at the backside surface of the nFET and the pFET, electrically connects the nFET drain structure and the pFET drain structure to a backside interconnect layer.

Abstract: An antifuse structure and IC devices incorporating such antifuse structures in which the antifuse structure includes an dielectric antifuse structure formed on an active area having a first dielectric antifuse electrode, a second dielectric antifuse electrode extending parallel to the first dielectric antifuse electrode, a first dielectric composition between the first dielectric antifuse electrode and the second dielectric antifuse electrode, and a first programming transistor electrically connected to a first voltage supply wherein, during a programming operation a programming voltage is selectively applied to certain of the dielectric antifuse structures to form a resistive direct electrical connection between the first dielectric antifuse electrode and the second dielectric antifuse electrode.

Abstract: A station (STA) for communicating with an Access Point (AP) in a wireless communication system is provided. The STA includes a wireless transceiver and a processor. The wireless transceiver performs wireless transmission and reception to and from the AP. The processor receives allocation information indicating a first user block for the STA in a first RU of an MU-PPDU from the AP via the wireless transceiver, and the first RU includes multiple user blocks allocated for different STAs. Also, the processor sends Uplink (UL) data or receives Downlink (DL) data in the first user block to or from the AP via the wireless transceiver according to the allocation information.

Abstract: A key-value store and a file system are integrated together to provide improved operations. The key-value store can include a log engine, a hash engine, a sorting engine, and a garbage collection manager. The features of the key-value store can be configured to reduce the number of I/O operations involving the file system, thereby improving read efficiency, reducing write latency, and reducing write amplification issues inherent in the combined key-value store and file system.

Abstract: A microelectronic structure including a first nano device, where the first nano device includes a plurality of transistors. A bottom dielectric isolation located on the backside of each of the plurality of transistors of the first nano device. A separating dielectric layer located on the backside of the bottom dielectric isolation layer, where the separating dielectric layer is a continuous layer on the backside of each of the plurality of transistors of the first nano device.

Abstract: A Fresnel lens in a lens body, the lens body is provided with a light incident surface and a light exit surface opposite to each other along a first direction, and the light exit surfaces are adjacently arranged in a second direction perpendicular to the first direction. There are several protruding teeth, and the protruding teeth are formed by an effective surface and an ineffective surface, and the ineffective surface is inclined at an acute angle relative to the first direction. The invention makes the light passing through the lens body reach the effective surface as much as possible, thereby reducing stray light and enhancing light efficiency.

Abstract: A mechanically and piezoelectrically anisotropic polymer article is formed from a crystallizable fluoropolymer and a nucleating agent. The polymer article may be a thin film or a fiber, for example. A crystalline phase may constitute at least approximately 50% of the polymer article. In certain examples, a fluoropolymer may include vinylidene fluoride, trifluoroethylene, chlorotrifluoroethylene, hexafluoropropylene, and vinyl fluoride. The polymer article may include up to approximately 10 wt. % of the nucleating agent. Such a polymer article is optically transparent, has an elastic modulus of at least approximately 3 GPa, and an electromechanical coupling factor (k31) of at least approximately 0.15.

Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.

Abstract: An optical fiber network device includes a fiber and a photonic integrated circuit. Fiber receives a first optical signal and transmits a second optical signal. A first wavelength of first optical signal is different from a second wavelength of second optical signal. Photonic integrated circuit includes a laser chip, a photodetector, a wavelength division multiplexing coupler, a first optical modulation element and a second optical modulation element. Laser chip is disposed on photonic integrated circuit, and is configured to generate first optical signal. Photodetector detects second optical signal. Wavelength division multiplexing coupler is configured to couple first optical signal to fiber, and receives second optical signal. First optical modulation element is coupled to wavelength division multiplexing coupler and laser chip, and is configured to modulate first optical signal.

Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.

Abstract: An optical fiber transmission device includes a substrate, a photonic integrated circuit, and an optical fiber assembly. The photonic integrated circuit is disposed on an area of the substrate. The substrate has a protruding structure at an interface with an edge of the photonic integrated circuit. The optical fiber assembly includes an optical fiber and a ferrule that sleeves the optical fiber. The protruding structure of the substrate is configured to abut against the ferrule to limit the position of the optical fiber assembly in a vertical direction of the substrate, such that the protruding structure is a stopper for the optical fiber assembly in the vertical direction.

Abstract: A motor drive system includes an electric motor, a drive circuit and a control unit. The drive circuit provides a driving current to the electric motor. A current command generator of the control unit generates a current command according to a torque command and a motor operating information. The driving current is converted into a d-axis current and/or a q-axis current by the control unit. Consequently, the driving current is close to the d-axis current command and/or the q-axis current command corresponding to the current command. If a value of the torque command is positive, the current command generator generates the corresponding current command according to a MTPA lookup table. If the value of the torque command is negative, the current command generator generates the corresponding current command according to a zero recycle lookup table.

Abstract: A package structure includes a first carrier, a second carrier, and a first electronic device. The first carrier is electrically connected to a first voltage. The second carrier includes a first substrate and a first interconnect structure. The first substrate is in contact with the first carrier, the first interconnect structure is electrically connected to a second voltage, and the first interconnect structure and the first carrier are deposited on two opposite sides of the first substrate. The first electronic device is deposited on the first interconnect structure and away from the first carrier. The first electronic device is in contact with the first interconnect structure.

Abstract: The present disclosure provides an atomization device, which includes a cartridge module, a battery module, and a connection module. The cartridge module includes a heating member. The heating member has a first pin and a second pin. The battery module has a first electrode and a second electrode. The connection module is detachably connected to the cartridge module and the battery module. The connection module has a first conductive member and a second conductive member. A first end of the first conductive member is in contact with the first pin. A second end of the first conductive member is electrically connected to the first electrode. A first end of the second conductive member is in contact with the second pin. A second end of the second conductive member is in contact with the second electrode. False soldering or poor soldering is reduced, thereby reducing the failure of the atomization device.