Patents by Inventor A Sheng Yang

A Sheng Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923433
    Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
  • Publication number: 20240071294
    Abstract: A light emitting display device includes a substrate, a drive power circuit, a gate circuit unit, multiple LEDs and a power switch unit. The power switch unit includes multiple first transistor switches and at least one second transistor switch that cooperatively control current flows through the LEDs. The first transistor switches are respectively connected to first terminals of the LEDs. The at least one second transistor switch is connected to second terminals of the LEDs. The first transistor switches are further connected to the drive power circuit to receive multiple drive currents, and are further connected to the gate circuit unit to receive a timing input. The at least one second transistor switch is further connected to the gate circuit unit to receive a timing input. The light emitting display device can have reduced parasitic capacitance effect, and thus reduced power consumption and have improved display quality.
    Type: Application
    Filed: June 21, 2023
    Publication date: February 29, 2024
    Applicant: MACROBLOCK, INC.
    Inventors: Li-Chang YANG, Yi-Sheng LIN
  • Publication number: 20240071722
    Abstract: Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Inventors: Sheng-Liang Pan, Bing-Hung Chen, Chia-Yang Hung, Jyu-Horng Shieh, Shu-Huei Suen, Syun-Ming Jang, Jack Kuo-Ping Kuo
  • Publication number: 20240068124
    Abstract: An apparatus for producing silicon carbide crystal is provided and includes a composite structure formed by a plurality of graphite layers and silicon carbide seed crystals, wherein a density or thickness of each layer of graphite is gradually adjusted to reduce a difference of a thermal expansion coefficient and Young's modulus between the graphite layers and silicon carbide. The composite structure can be stabilized on a top portion or an upper cover of a crucible made of graphite, thereby preventing the silicon carbide crystal from falling off.
    Type: Application
    Filed: August 23, 2023
    Publication date: February 29, 2024
    Inventors: CHIH-LUNG LIN, PO-FEI YANG, CHIE-SHENG LIU, CHUNG-HAO LIN, HSIN-CHEN YEH, HAO-WEN WU
  • Publication number: 20240071287
    Abstract: An LED display device includes a system board, and multiple daughterboards that are assembled on the system board. The system board includes a drive power circuit, a first gate circuit and a second gate circuit. Each daughterboard includes a substrate, multiple LEDs that are disposed on the substrate, multiple first transistor switches that are respectively connected to the LEDs, and at least one second transistor switch that is connected to the LEDs. With respect to each daughterboard, the first transistor switches and the at least one second transistor switch cooperatively control current flows through the LEDs; the first transistor switches are further connected to the drive power circuit to respectively receive multiple drive currents, and are further connected to the first gate circuit to receive a timing signal; and the at least one second transistor switch is further connected to the second gate circuit to receive a timing signal.
    Type: Application
    Filed: June 21, 2023
    Publication date: February 29, 2024
    Applicant: MACROBLOCK, INC.
    Inventors: Li-Chang YANG, Yi-Sheng LIN
  • Publication number: 20240071536
    Abstract: A memory bit cell includes a first memory cell including a first antifuse transistor and a first selection transistor, the first antifuse transistor being selectable between a first state or a second state in response to a word line program signal, the first selection transistor being configured to provide access to the first antifuse transistor in response to a word line read signal; a second memory cell including a second antifuse transistor and a second selection transistor, the second antifuse transistor being selectable between the first state or the second state in response to the word line program signal, the second selection transistor being configured to provide access to the second antifuse transistor in response to the word line read signal; a first word line to selectively provide the word line program signal; a second word line to selectively provide the word line read signal; and a bit line.
    Type: Application
    Filed: August 10, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Sheng Chang, Yao-Jen Yang, Min-Shin Wu
  • Patent number: 11915054
    Abstract: Techniques are provided for scheduling multiple jobs on one or more cloud computing instances, which provide the ability to select a job for execution from among a plurality of jobs, and to further select a designated instance from among a plurality of cloud computing instances for executing the selected job. The job and the designated instance are each selected based on a probability distribution that a cost of executing the job on the designated instance does not exceed the budget. The probability distribution is based on several factors including a cost of prior executions of other jobs on the designated instance and a utility function that represents a value associated with a progress of each job. By scheduling select jobs on discounted cloud computing instances, the aggregate utility of the jobs can be maximized or otherwise improved for a given budget.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: February 27, 2024
    Assignee: Adobe Inc.
    Inventors: Subrata Mitra, Sunav Choudhary, Sheng Yang, Kanak Vivek Mahadik, Samir Khuller
  • Patent number: 11916018
    Abstract: A connection structure of a semiconductor device is provided in the present invention. The connection structure includes an interlayer dielectric, a top metal structure, and a passivation layer. The interlayer dielectric is disposed on a substrate. The top metal structure is disposed on the interlayer dielectric. The top metal structure includes a bottom portion and a top portion disposed on the bottom portion. The bottom portion includes a first sidewall, and the top portion includes a second sidewall. A slope of the first sidewall is larger than a slope of the second sidewall. The passivation layer is conformally disposed on the second sidewall, the first sidewall, and a top surface of the interlayer dielectric.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chen-Yi Weng, Shih-Che Huang, Ching-Li Yang, Chih-Sheng Chang
  • Patent number: 11913597
    Abstract: A product-display system for displaying and securing a retail product. The system may include a retainer having a retainer bracket and a retainer body coupled to the retainer bracket. A retaining cable may be coupled to the retainer body at an opening in the retainer body. A fastener that may be unfastened to release the product from the retainer may only be accessed through the opening of the retainer body such that when the retaining cable is coupled to the opening, no fasteners of the retainer may be visible or accessible. The system may also include a display stem for holding the retainer and product. The display stem may include a recess for receiving at least a portion of the retainer body. The retaining cable may extend through the display stem and may simultaneously transmit power and data to a displayed product. The retainer may be returned to and held on top of the display stem using a retaining cable.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: February 27, 2024
    Assignee: Apple Inc.
    Inventors: Sheng Yang, Eric W. Wang, Steven C. Michalske, Olivia Ching, Clayton R. Woosley, Samuel Wing Man Yuen, Paul Joseph Hack, Ricardo A Mariano, Chien Tsun Chen, George Tziviskos, Charles A. Schwalbach
  • Patent number: 11906982
    Abstract: A system and a method for drone docking are provided. The method includes: setting a moving platform on a vehicle; obtaining, by the moving platform, current environmental data and historical environmental data corresponding to the moving platform; generating, by the moving platform, a recommended flight parameter according to the current environmental data and the historical environmental data, and transmitting the recommended flight parameter to a drone; and adjusting, by the drone, a flight parameter of the drone according to the recommended flight parameter to dock on the moving platform.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: February 20, 2024
    Assignee: Far EasTone Telecommunications Co., Ltd.
    Inventors: Herman Chunghwa Rao, Chen-Tsan Yu, Hua-Pei Chiang, Chien-Peng Ho, Chyi-Dar Jang, Sheng Yang, Tsung-Jen Wang
  • Patent number: 11899006
    Abstract: A method of indicating a characteristic of a soil sample of a field includes measuring a co-factor in the soil sample and using the co-factor to place the soil sample in a soil sample group. The characteristic of the soil sample is measured and then is scaled based on the soil sample group. The scaled measure is displayed to better represent the characteristic of the soil sample relative to soil samples of the sample group.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: February 13, 2024
    Assignee: Trace Genomics, Inc.
    Inventors: Maria Mooshammer, Sheng-Yang Matthew Goh, David C. Stone, Tyler Barnum, Patrick L. Dumstorff, Ronald O. Zink, Poornima Paramesara
  • Publication number: 20240045093
    Abstract: The present disclosure discloses a denoising method and a system for preserving amplitude variation with offset (AVO) features of pre-stack seismic data. The method includes: acquiring seismic wave data at at least one receiving point through a seismic signal acquisition device, and storing the seismic wave data in a memory; in response to ending of an acquisition operation of the seismic signal with the seismic signal acquisition device, determining, based on the seismic wave data in the memory, pre-denoising angle gather data through a processing device; and obtaining and outputting a denoised angle gather signal through inputting the pre-denoising angle gather data to a denoising device and performing denoising processing on the pre-denoising angle gather data based on the denoising device.
    Type: Application
    Filed: June 5, 2023
    Publication date: February 8, 2024
    Applicant: SOUTHWEST PETROLEUM UNIVERSITY
    Inventors: Weiping CAO, Ran YANG, Xuri HUANG, Xiaoqing CUI, Mengcheng LI, Luo LI, Haoyuan LI, Mengyu REN, Sheng Yang, Moyan LI, Xinwang LI
  • Publication number: 20240048418
    Abstract: Techniques pertaining to transmission methods of resource unit (RU) duplication and tone repetition for Enhanced Long Range (ELR) communications are described. An apparatus (e.g., station (STA)) generates a resource unit (RU) or multi-RU (MRU). The apparatus then performs an ELR communication wirelessly with either or both of: (a) duplication of the RU or MRU; and (b) repetition of tones of the RU or MRU.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 8, 2024
    Inventors: Shengquan Hu, Jianhan Liu, Tung Sheng Yang, Thomas Edward Pare, JR.
  • Publication number: 20240048421
    Abstract: Various schemes pertaining to peak-to-average power ratio (PAPR) reduction for resource unit (RU) duplication and tone repetition in wireless communications are described. An apparatus generates a resource unit (RU) or multi-RU (MRU). The apparatus then performs a wireless communication using the RU or MRU with either or both of a RU duplication and a tone repetition such that a peak-to-average power ratio (PAPR) is reduced.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 8, 2024
    Inventors: Shengquan Hu, Jianhan Liu, Tung Sheng Yang, Thomas Edward Pare, JR.
  • Publication number: 20240037158
    Abstract: The present application discloses a method, system, and computer system for automatically detecting protocol compliance of applications. The method includes determining a URL of a webpage for a software-as-a-service (SaaS) product, extracting body text from the webpage, and using a classifier to determine whether the SaaS product is compliant with one or more protocols.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: Sheng Yang, William Redington Hewlett II, Manish Mradul, Sanchita Dutta
  • Patent number: 11889705
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first interconnect within a first inter-level dielectric (ILD) layer over a substrate. A memory device is disposed over the first interconnect and is surrounded by a second ILD layer. A sidewall spacer is arranged along opposing sides of the memory device and an etch stop layer is arranged on the sidewall spacer. The sidewall spacer and the etch stop layer have upper surfaces that are vertically offset from one another by a non-zero distance. A second interconnect extends from a top of the second ILD layer to an upper surface of the memory device.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: January 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsia-Wei Chen, Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao
  • Publication number: 20240032271
    Abstract: A semiconductor device includes a first insulating layer over a substrate and a contact plug in the first insulating layer and in contact with the surface of the substrate. The semiconductor device further includes a capacitor structure above the contact plug and a second insulating layer on the first insulating layer and covering the capacitor structure. The capacitor structure includes a conductive layer over the first insulating layer. The semiconductor device further includes a capacitor contact over the capacitor structure. The capacitor contact includes a first contact portion and a second contact portion. The first contact portion penetrates through the second insulating layer and is in contact with the conductive layer of the capacitor structure. The second contact portion connects the outer surface of the first contact portion, and surrounds the lower portion of the first contact portion.
    Type: Application
    Filed: July 25, 2022
    Publication date: January 25, 2024
    Inventors: Jiun-Sheng YANG, Yi-Chin CHEN
  • Publication number: 20240016233
    Abstract: The present disclosure provides a cigarette rod and an atomization device, the cigarette rod includes a housing, a first bracket, a power device, a circuit board assembly, a conductive device, a board assembly, a display component, and a display unit. An installation space is defined in the housing, and a display port is defined on the housing. The first bracket is located within the installation space. The power device and the circuit board assembly are respectively installed on the first bracket. The display component includes a screen and a display unit which electrically connected to the circuit board assembly. The display unit is corresponding to the display port, and the screen is located on one of the first bracket and the housing to close the display port. Users observe the display information through the display unit, which improves the intelligence of the circuit board rod.
    Type: Application
    Filed: September 27, 2023
    Publication date: January 18, 2024
    Inventors: YANG-YUN JIN, ZHEN CHEN, SHENG-YANG XU
  • Publication number: 20240022365
    Abstract: Techniques pertaining to enhanced long range (ELR) waveform structures and signal (SIG) subfield in wireless communications are described. An apparatus (e.g., a station (STA)) performs an ELR wireless communication by: (i) transmitting an ELR physical-layer protocol data unit (PPDU); or (ii) receiving the ELR PPDU. The ELR PPDU includes a waveform structure with backward and forward compatibilities with different generations of Wi-Fi standards.
    Type: Application
    Filed: June 5, 2023
    Publication date: January 18, 2024
    Inventors: You-Wei Chen, Jianhan Liu, Shengquan Hu, TingChe Tseng, Lin-Kai Chiu, Tung Sheng Yang, Thomas Edward Pare, JR.
  • Patent number: D1012583
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: January 30, 2024
    Assignee: Apple Inc.
    Inventors: Eugene Antony Whang, Peter Russell-Clarke, Olivia Ching, Sheng Yang, Indhu V. Solayappan, Gabriel J. Lamb, Jean-Marc Gady, Allison Inouye, Mi Zou, Po Huang, Kristy Judy Hsu, Gregory Guillaume Lespinard