Abstract: In one example, a system for parallel output of backup power modules includes a first backup power module coupled to an input and a first output of an enclosure, a second backup power module coupled to the input and a second output of the enclosure, wherein the second backup power module is coupled in parallel with the first backup power module, and a switch coupling the first backup power module and the first output of the enclosure to the second output of the enclosure.

Abstract: Example implementations relate to concurrent alternating-current and direct-current. In one example, a device comprises a power module connected to a first power outlet, the power module connected to a second power outlet, and a controller to the power module to concurrently provide alternating-current (AC) power to the first power outlet and direct-current (DC) power to the second power outlet by switching a transistor including switching circuitry in response to an absence of AC input power to the device.

Abstract: An electronic device can include a HEMT. In an embodiment, a gate electrode, a drain electrode, and an access region including a first portion closer to the gate electrode and a second portion closer to the drain electrode. A lower dielectric film can overlie a portion of the access region, and an upper dielectric region can overlie another portion of the access region. In another embodiment, a dielectric film can have a relatively positive or negative charge and a varying thickness. In a further embodiment, the HEMT can include a gate electrode; a dielectric film overlying the gate electrode and defining openings to the gate electrode, wherein a portion of the dielectric film is disposed between the openings; and a gate interconnect extending into the openings of the dielectric film and contacting the gate electrode and the portion of the dielectric film.

Abstract: Examples disclosed herein relate to dual in-line memory module (DIMM) battery backup. Some examples disclosed herein describe systems that include a backup power source pluggable into a DIMM slot. The backup power source may include a plurality of battery cells electrically connected to a DIMM to provide backup power to the DIMM. Each of the plurality of battery cells supporting the DIMM may be electrically connected to a DC-to-DC converter in series and to each other in parallel.

Abstract: In one example, a system for parallel output of backup power modules includes a first backup power module coupled to an input and a first output of an enclosure, a second backup power module coupled to the input and a second output of the enclosure, wherein the second backup power module is coupled in parallel with the first backup power module, and a switch coupling the first backup power module and the first output of the enclosure to the second output of the enclosure.

Abstract: Example implementations relate to concurrent alternating-current and direct-current. In one example, a device comprises a power module connected to a first power outlet, the power module connected to a second power outlet, and a controller to the power module to concurrently provide alternating-current (AC) power to the first power outlet and direct-current (DC) power to the second power outlet by switching a transistor including switching circuitry in response to an absence of AC input power to the device.

Abstract: An electronic device can include a HEMT. In an embodiment, a gate electrode, a drain electrode, and an access region including a first portion closer to the gate electrode and a second portion closer to the drain electrode. A lower dielectric film can overlie a portion of the access region, and an upper dielectric region can overlie another portion of the access region. In another embodiment, a dielectric film can have a relatively positive or negative charge and a varying thickness. In a further embodiment, the HEMT can include a gate electrode; a dielectric film overlying the gate electrode and defining openings to the gate electrode, wherein a portion of the dielectric film is disposed between the openings; and a gate interconnect extending into the openings of the dielectric film and contacting the gate electrode and the portion of the dielectric film.

Abstract: An electronic device can include a HEMT. In an embodiment, a gate electrode, a drain electrode, and an access region including a first portion closer to the gate electrode and a second portion closer to the drain electrode. A lower dielectric film can overlie a portion of the access region, and an upper dielectric region can overlie another portion of the access region. In another embodiment, a dielectric film can have a relatively positive or negative charge and a varying thickness. In a further embodiment, the HEMT can include a gate electrode; a dielectric film overlying the gate electrode and defining openings to the gate electrode, wherein a portion of the dielectric film is disposed between the openings; and a gate interconnect extending into the openings of the dielectric film and contacting the gate electrode and the portion of the dielectric film.

Abstract: An electronic device can include a drain electrode of a high electron mobility transistor overlying a channel layer; a source electrode overlying the channel layer, wherein a lowermost portion of the source electrode overlies at least a portion of the channel layer; and a gate electrode of the high electron mobility transistor overlying the channel layer; and a current limiting control structure that controls current passing between the drain and source electrodes. The current limiting control structure can be disposed between the source and gate electrodes, the current limiting control structure can be coupled to the source electrode and the first high electron mobility transistor, and the current limiting control structure has a threshold voltage. The current limiting control structure can be a Schottky-gated HEMT or a MISHEMT.

Abstract: Techniques for providing an uninterruptible power supply are disclosed. An example system includes three single-phase Uninterruptible Power Supplies (UPSs) and an adapter. The adapter is to receive three-phase AC power, and separate the three-phase AC power into three separate single-phase outputs. Each single-phase output is coupled to an input of one of the three single-phase UPSs. An output of each one of the single-phase UPSs is coupled to one of three single-phase inputs of the adapter, and the adapter is to combine the three single-phase inputs into a single three-phase output.

Abstract: An electronic device can include a channel layer; an access region having an aluminum content substantially uniform or increasing with distance from the channel layer; and a gate dielectric layer overlying and contacting the channel layer. A process of forming an electronic device can include providing a substrate and a channel layer of a III-V semiconductor material over the substrate; forming a masking feature over the channel layer; and forming an access region over the channel layer. In an embodiment, the channel layer can include GaN, and the access region has an aluminum content that is substantially uniform or increases with distance from the channel layer. In another embodiment, the process can include removing at least a portion the masking feature and forming a gate dielectric layer over the channel layer. A dielectric film of the masking feature or the gate dielectric layer contacts the channel layer.

Abstract: According to an example, a battery is charged using a charge voltage based on a present state of charge of the battery and a present ambient temperature of the battery. Additionally, the charge voltage may be based on the present state of charge of the battery, the present ambient temperature of the battery, and an age of the battery. The charge voltage may be retrieved from a lookup table that includes a plurality of reference charge voltage values at which to charge the battery for different ambient temperatures, different states of charge, or different ages of the battery.

Abstract: An electronic device can include a HEMT that includes a channel layer, a barrier layer, and a gate electrode. The barrier layer can be disposed between the channel layer and the gate electrode and include a first portion, a second portion, and a third portion. The second portion can be spaced apart from the channel layer by the first portion, and the second portion is spaced apart from the gate electrode by the third portion. The second portion of the barrier layer can be configured to trap more charge, more readily recombine electrons and holes, or both as compared to each of the first and third portions of the barrier layer. The HEMT can have a VTH of at least 2 V and a subthreshold slope of at most 50 mV/decade of IDS.

Abstract: A process of forming an electronic device can include forming a channel layer overlying a substrate and forming a barrier layer overlying the channel layer. In an embodiment, the process can further include forming a p-type semiconductor layer over the barrier layer, patterning the p-type semiconductor layer to define at least part of a gate electrode of a transistor structure, and forming an access region layer over the barrier layer. In another embodiment, the process can further include forming an etch-stop layer over the barrier layer, forming a sacrificial layer over the etch-stop layer, patterning the etch-stop and sacrificial layers to define a gate region, forming an access region layer over the barrier layer after patterning the etch-stop and sacrificial layers, and forming a p-type semiconductor layer within the gate region.

Abstract: Oscillation mitigation circuits are implemented in a system for supplying electric power to load circuit boards, for example, load circuit boards entirely immersed into a bath of dielectric heat transfer fluid. The oscillation mitigation circuits can be used to protect the load circuit boards, including the connectors mounted on these load circuit boards, from an anomalous behavior of the electric power. The oscillation mitigation circuits are coupled between wire bundles forming a portion of the electric power supply and the connectors mounted on the load circuit boards.

Abstract: Techniques described herein relate to generating graph-oriented data structures based on cross-channel multi-user transaction and/or interaction data from one or more data sources, Additional techniques relate to analyzing and processing transactions using the graph-oriented data structures. Transaction data may be received from various data sources, and analyzed to determine subsets of the transaction data relating to interactions between specific pairs of users. Graph-oriented data structures may be generated based on the subsets of transaction data relating to the specific pairs of users, and may be used to analyze and process transaction requests.

Abstract: An electronic device including a transistor structure, and a process of forming the electronic device can include providing a workpiece including a substrate, a first layer, and a channel layer including a compound semiconductor material; and implanting a species into the workpiece such that the projected range extends at least into the channel and first layers, and the implant is performed into an area corresponding to at least a source region of the transistor structure. In an embodiment, the area corresponds to substantially all area occupied by the transistor structure. In another embodiment, the implant can form crystal defects within layers between the substrate and source, gate, and drain electrodes. The crystal defects may allow resistive coupling between the substrate and the channel structure within the transistor structure. The resistive coupling allows for better dynamic on-state resistance and potentially other electrical properties.

Abstract: An electronic device can include a high electron mobility transistor that includes a buried region, a channel layer overlying the buried region, a gate electrode, and a drain electrode overlying the buried region. The buried region can extend toward and does not underlie the gate electrode. In a particular aspect, the electronic device can further include a p-type semiconductor member overlying the channel layer. The gate electrode can overlie the channel layer, a p-type semiconductor member overlying the channel layer. The drain electrode can overlie and contact the buried region and the p-type semiconductor member. The p-type semiconductor member can be disposed between the gate and drain electrodes. In another embodiment, a source-side buried region may be used in addition to or in place of the buried region that is coupled to the drain electrode.

Abstract: Systems and methods for, while a user is consuming a first media asset, generating for the user a recommendation of a second media asset based on a viewing history of the user. In some aspects, the systems and methods determine that a user is consuming only video of a first media asset, determine a first category for the first media asset, and retrieve a viewing history corresponding to the user. The viewing history comprises media assets consumed simultaneously with a media asset corresponding to the first category. The systems and methods select a second category corresponding to a highest number of media assets in the viewing history, select a second media asset based on the second category. Alternatively, the user can select the second media asset manually. The systems and methods generate for output the audio of the second media asset for simultaneous consumption with the video of the first media asset.

Abstract: An electronic device can include a channel layer, a first carrier supply layer, a gate electrode of a HEMT, and a drain electrode of the HEMT. The HEMT can have a 2DEG along an interface between the channel and first carrier supply layers. In an aspect, the 2DEG can have a highest density that is the highest at a point between the drain and gate electrodes. In another aspect, the HEMT can further comprise first and second carrier supply layers, wherein the first carrier supply layer is disposed between the channel and second carrier supply layers. The second carrier supply layer be thicker at a location between the drain and gate electrodes. In a further aspect, a process of forming an electronic device can include the HEMT. In a particular embodiment, first and second carrier supply layers can be epitaxially grown from an underlying layer.