Patents by Inventor Akhilesh Kumar

Akhilesh Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190221113
    Abstract: The present disclosure relates to system(s) and method(s) for generating an alert based on change in traffic pattern. The system receives historic traffic data and current traffic data, associated with each road segment, from a set of road segments. Further, the system identifies a change traffic pattern based on analysing the historic traffic pattern and the current traffic pattern, using data analytics and a machine learning algorithm. Furthermore, the system identifies a sub-set of road segments, from the set of road segments, based on comparison of the change in traffic pattern and a pre-defined threshold. The system further determines root cause of change in traffic pattern by analysing the sub-set of road segments. Further, the system generates an alert for updating one or more road segments, from the sub-set of road segments, based on the root cause of change in traffic pattern.
    Type: Application
    Filed: January 15, 2019
    Publication date: July 18, 2019
    Inventors: Arvind Kumar MAURYA, Akhilesh Kumar GUPTA
  • Patent number: 10338915
    Abstract: A first code update is received having a first code change. It is determined whether the first code change of the first code update can be implemented on a first reference code version on which at least one code change of a second code update has been undone.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: July 2, 2019
    Assignee: SAP SE
    Inventors: Setu Saxena, Akhilesh Kumar, Christoph Vehns
  • Publication number: 20190181079
    Abstract: Embodiments are provided herein for a packaged semiconductor device and method of fabricating, the device including: a semiconductor die; a redistribution layer (RDL) structure on an active side of the semiconductor die, the RDL structure including a plurality of contact pads on an outer surface of the RDL structure; a plurality of external connections attached to the plurality of contact pads; and a support structure including an attachment portion and two or more standing members extending from an inner surface of the attachment portion, wherein a back side of the package body is attached to the inner surface of the attachment portion.
    Type: Application
    Filed: January 8, 2018
    Publication date: June 13, 2019
    Inventors: Nishant Lakhera, Gilles Montoriol, Trung Duong, Akhilesh Kumar Singh, Navas Khan Oratti Kalandar
  • Publication number: 20190157222
    Abstract: Embodiments are provided herein for a packaged semiconductor device that includes a semiconductor die; a redistribution layer (RDL) structure on an active side of the semiconductor die, the RDL structure including a plurality of contact pads on an outer surface of the RDL structure; a plurality of external connections attached to the plurality of contact pads; and an isolation structure on the outer surface of the RDL structure around one or more contact pads of the plurality of contact pads, wherein a height of the isolation structure is at least two thirds of a height of the external connections.
    Type: Application
    Filed: November 20, 2017
    Publication date: May 23, 2019
    Inventors: Nishant LAKHERA, Andrew Jefferson MAWER, Akhilesh Kumar SINGH, Navas Khan ORATTI KALANDAR
  • Publication number: 20190103365
    Abstract: Embodiments for a packaged semiconductor device are provided herein, which includes a substrate; an antenna module attached to a top surface of the substrate, the antenna module including an antenna; an electronic component attached to the top surface of the substrate, the electronic component communicatively coupled to the antenna module through electrical connections in the substrate; a first portion of mold body that encapsulates the antenna module; a second portion of mold body that encapsulates the electronic component, wherein the second portion of mold body is separated from the first portion of mold body by at least a first trench; and a shielding layer that covers the second portion of mold body.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Inventors: Akhilesh Kumar SINGH, Nishant Lakhera, Navas Khan Oratti Kalandar
  • Patent number: 10153482
    Abstract: The present invention relates to a method for manufacturing slurry for coating of electrodes for use in lithium ion batteries, wherein the method comprises mixing active materials with a binder into a binder solution, and adding an organic carbonate to the binder solution to generate the slurry. The present invention also relates to a method for manufacturing electrodes for a lithium battery cell, wherein the method comprises mixing active materials with a binder into a binder solution, adding an organic carbonate to the binder solution to generate slurry, wherein the above adding step is carried out at temperature above melting temperature of the organic carbonate, coating electrode material with the slurry, drying the coating on the electrode material by drying the organic carbonate, and surface treatment of the slurry so that the electrode is prepared for use in a lithium ion battery cell.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: December 11, 2018
    Assignee: ELECTROVAYA INC.
    Inventors: Bjorn Haugseter, Tom Henriksen, Lars Ole Valøen, Akhilesh Kumar Srivastava
  • Publication number: 20180142207
    Abstract: The present invention is a method of creating a population of hemogenic endothelial cells with arterial specification and enhanced T cell potential. In one embodiment, the method uses ETS transgene induction at the mesodermal stage of differentiation. In another embodiment, the method activates ERK and NOTCH signaling at the mesodermal stage of differentiation.
    Type: Application
    Filed: November 17, 2017
    Publication date: May 24, 2018
    Inventors: Igor I. Slukvin, Mi Ae Park, Akhilesh Kumar
  • Publication number: 20180136930
    Abstract: A first code update is received having a first code change. It is determined whether the first code change of the first code update can be implemented on a first reference code version on which at least one code change of a second code update has been undone.
    Type: Application
    Filed: November 11, 2016
    Publication date: May 17, 2018
    Applicant: SAP SE
    Inventors: Setu Saxena, Akhilesh Kumar, Christoph Vehns
  • Publication number: 20180119104
    Abstract: The present invention relates generally to methods and compositions useful for therapeutic vascular tissue engineering. In particular, the present invention provides methods for generating substantially pure populations of vasculogenic cells from human mesenchymal progenitors, and methods and compositions for clinical applications in the field of regenerative medicine.
    Type: Application
    Filed: December 8, 2017
    Publication date: May 3, 2018
    Inventors: Igor Slukvin, Akhilesh Kumar
  • Publication number: 20180114745
    Abstract: An electronic component package that includes a heat spreader with a die pad. An electronic component is attached to each side of the die pad where each electronic component includes conductive terminals on a side facing away from the die pad. Conductive terminals of the top electronic component are wirebonded to conductive surfaces of a package substrate and conductive terminals of the bottom electronic component are physically and electrically attached to conductive surfaces of the package substrate. The heat spreader structure includes tie structures that extend in a direction away from the second electronic component.
    Type: Application
    Filed: October 25, 2016
    Publication date: April 26, 2018
    Inventors: NAVAS KHAN ORATTI KALANDAR, AKHILESH KUMAR SINGH, NISHANT LAKHERA
  • Patent number: 9953904
    Abstract: An electronic component package that includes a heat spreader with a die pad. An electronic component is attached to each side of the die pad where each electronic component includes conductive terminals on a side facing away from the die pad. Conductive terminals of the top electronic component are wirebonded to conductive surfaces of a package substrate and conductive terminals of the bottom electronic component are physically and electrically attached to conductive surfaces of the package substrate. The heat spreader structure includes tie structures that extend in a direction away from the second electronic component.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: April 24, 2018
    Assignee: NXP USA, INC.
    Inventors: Navas Khan Oratti Kalandar, Akhilesh Kumar Singh, Nishant Lakhera
  • Publication number: 20180053753
    Abstract: A stackable package assembly and method of manufacturing is provided. The method includes attaching a plurality of interconnect balls to a first surface of a substrate, and encapsulating the first surface of the substrate and the plurality of interconnect balls with an encapsulant. A trench is formed in a first surface of the encapsulant exposing a portion the interconnect balls. An interposer is provided having a first interconnect layer. An assembly is formed by attaching connection sites of a first interconnect layer to the exposed portion of the interconnect balls, the first surface of the second substrate extending into the trench.
    Type: Application
    Filed: August 16, 2016
    Publication date: February 22, 2018
    Inventors: Akhilesh Kumar Singh, Nishant Lakhera, Navas Khan Oratti Kalandar
  • Patent number: 9887849
    Abstract: Techniques for power gating. A first on-die router has an output port to receive data from a switching fabric. The output port is placed in a power-gated state if there is no activity in the output port for a current cycle and no messages are to be received by the output port during a subsequent cycle. A second on-die router has an input port coupled with the output port of the first on-die router. The input port is placed in a power-gated state if an input port buffer is empty and the output port is not active. Power-gating of the input port and the output port are independent of each other.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: February 6, 2018
    Assignee: Intel Corporation
    Inventors: Dongkook Park, Akhilesh Kumar, Donglai Dai
  • Patent number: 9868939
    Abstract: The present invention relates generally to methods and compositions useful for therapeutic vascular tissue engineering. In particular, the present invention provides methods for generating substantially pure populations of vasculogenic cells from human mesenchymal progenitors, and methods and compositions for clinical applications in the field of regenerative medicine.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: January 16, 2018
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Igor Slukvin, Akhilesh Kumar
  • Patent number: 9798556
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: October 24, 2017
    Assignee: INTEL CORPORATION
    Inventors: Mani Ayyar, Eric Richard Delano, Ioannis Y. Schoinas, Akhilesh Kumar, Doddaballapur Jayasimha, Jose A. Vargas
  • Patent number: 9674114
    Abstract: Layout-aware modular decoupled crossbar and router for on-chip interconnects and associated micro-architectures and methods of operation. A crossbar and router architecture called MoDe-X (Modular Decoupled Crossbar) is disclosed that supports 5-port routing for use in 2D mesh interconnects and is implemented through use of decoupled row and column sub-crossbar modules in combination with feeder wiring and control logic that enables routing between ports on the row and column sub-crossbar modules. The corresponding MoDe-X router supports 5-port routing between various router input and output port combinations while reducing both router area and power consumption when compared with a conventional 5×5 crossbar design and implementation. The MoDe-X micro-architecture can be configured to support both single and dual local port injection configurations.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: June 6, 2017
    Assignee: Intel Corporation
    Inventors: Dongkook Park, Aniruddha Vaidya, Akhilesh Kumar, Mani Azimi
  • Patent number: 9528001
    Abstract: The present invention relates a novel approach to prepare Polymer Modified Bitumen by using terephthalamide additives, derived from PET, for improving bitumen quality. Particularly, the present invention provides a process to utilize waste PET, which is a threat to environment and is available commercially in different physical forms, for conversion into industrially useful additive for bituminous product.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: December 27, 2016
    Assignee: INDIAN OIL CORPORATION LTD.
    Inventors: Akhilesh Kumar Bhatnagar, Rabindra Kumar Padhan, Anurag Ateet Gupta, Naduhatty Selai Raman
  • Publication number: 20160365568
    Abstract: The present invention relates to a method for manufacturing slurry for coating of electrodes for use in lithium ion batteries, wherein the method comprises mixing active materials with a binder into a binder solution, and adding an organic carbonate to the binder solution to generate the slurry. The present invention also relates to a method for manufacturing electrodes for a lithium battery cell, wherein the method comprises mixing active materials with a binder into a binder solution, adding an organic carbonate to the binder solution to generate slurry, wherein the above adding step is carried out at temperature above melting temperature of the organic carbonate, coating electrode material with the slurry, drying the coating on the electrode material by drying the organic carbonate, and surface treatment of the slurry so that the electrode is prepared for use in a lithium ion battery cell.
    Type: Application
    Filed: April 26, 2016
    Publication date: December 15, 2016
    Inventors: Bjorn Haugseter, Tom Henriksen, Lars Ole Valøen, Akhilesh Kumar Srivastava
  • Patent number: 9418011
    Abstract: In one embodiment, the present invention includes a processor comprising a page tracker buffer (PTB), the PTB including a plurality of entries to store an address to a cache page and to store a signature to track an access to each cache line of the cache page, and a PTB handler, the PTB handler to load entries into the PTB and to update the signature. Other embodiments are also described and claimed.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: August 16, 2016
    Assignee: Intel Corporation
    Inventors: Livio B. Soares, Naveen Cherukuri, Akhilesh Kumar, Mani Azimi
  • Publication number: 20160196153
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Application
    Filed: December 28, 2015
    Publication date: July 7, 2016
    Applicant: INTEL CORPORATION
    Inventors: MANI AYYAR, ERIC RICHARD DELANO, IOANNIS Y. SCHOINAS, AKHILESH KUMAR, DODDABALLAPUR JAYASIMHA, JOSE A. VARGAS