Patents by Inventor Akinobu Teramoto

Akinobu Teramoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230175115
    Abstract: A selective film forming method includes: preparing a substrate including a first film having a first surface and a second film having a second surface, the second film being different from the first film; selectively adsorbing a secondary alcohol gas and/or a tertiary alcohol gas to the second surface; and selectively forming a film on the first surface by supplying at least a raw material gas.
    Type: Application
    Filed: March 29, 2021
    Publication date: June 8, 2023
    Inventors: Shuji AZUMO, Kota UMEZAWA, Katsutoshi ISHII, Akira SHIMIZU, Akinobu TERAMOTO, Tomoyuki SUWA, Yasuyuki SHIRAI, Takezo MAWAKI
  • Patent number: 11495452
    Abstract: A method for preparing a silicon nitride film with a high deposition rate and a reduced damage to the substrate and/or the underlying layer formed under the silicon nitride film. The method for preparing a silicon nitride film contains the steps of irradiating a nitride with an ultraviolet light, and contacting the nitride irradiated with the ultraviolet light and a hydrogenated cyclic silane represented by a general formula SinH2n, wherein n is 5, 6, or 7.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: November 8, 2022
    Assignees: TOHKU UNIVERSITY, NIPPON SHOKUBAI CO., LTD.
    Inventors: Akinobu Teramoto, Yoshinobu Shiba, Takashi Abe, Akira Nishimura
  • Patent number: 10927454
    Abstract: A method of forming a nitride film wherein (a) a silane-based gas is supplied to a processing chamber through a gas supply port; (b) a nitrogen radical gas from a radical generator is supplied to the processing chamber through a radical gas pass-through port; and (c) the silane-based gas supplied in (a) is reacted with the nitrogen radical gas supplied in (b), without causing a plasma phenomenon in the processing chamber, to form a nitride film on a wafer.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: February 23, 2021
    Assignees: Toshiba Mitsubishi-Electric Industrial Systems Corporation, Tohoku University
    Inventors: Shinichi Nishimura, Kensuke Watanabe, Yoshihito Yamada, Akinobu Teramoto, Tomoyuki Suwa, Yoshinobu Shiba
  • Publication number: 20200335322
    Abstract: A method for preparing a silicon nitride film with a high deposition rate and a reduced damage to the substrate and/or the underlying layer formed under the silicon nitride film. The method for preparing a silicon nitride film contains the steps of irradiating a nitride with an ultraviolet light, and contacting the nitride irradiated with the ultraviolet light and a hydrogenated cyclic silane represented by a general formula SinH2n, wherein n is 5, 6, or 7.
    Type: Application
    Filed: March 3, 2020
    Publication date: October 22, 2020
    Applicants: TOHOKU UNIVERSITY, NIPPON SHOKUBAI CO., LTD.
    Inventors: Akinobu TERAMOTO, Yoshinobu SHIBA, Takashi ABE, Akira NISHIMURA
  • Patent number: 10559460
    Abstract: There is provided a film forming apparatus for forming a silicon nitride film on a substrate by having a precursor gas containing silicon to react with a reaction gas containing nitrogen, including: a processing container configured to form a vacuum atmosphere; a substrate mounting part installed in the processing container; a precursor gas supply part configured to supply a precursor gas into the processing container; a reaction gas supply part configured to supply a reaction gas containing nitrogen into the processing container; and an ultraviolet irradiating part configured to excite the reaction gas before the reaction gas reacts with the precursor gas, wherein a substrate on the substrate mounting part is not irradiated with an ultraviolet ray emitted from the ultraviolet irradiating part.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: February 11, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akira Shimizu, Katsutoshi Ishii, Akinobu Teramoto, Tomoyuki Suwa, Yoshinobu Shiba
  • Publication number: 20190390332
    Abstract: A method of forming a nitride film wherein (a) a silane-based gas is supplied to a processing chamber through a gas supply port; (b) a nitrogen radical gas from a radical generator is supplied to the processing chamber through a radical gas pass-through port; and (c) the silane-based gas supplied in (a) is reacted with the nitrogen radical gas supplied in (b), without causing a plasma phenomenon in the processing chamber, to form a nitride film on a wafer.
    Type: Application
    Filed: February 14, 2017
    Publication date: December 26, 2019
    Applicants: Toshiba Mitsubishi-Electric Industrial Systems Corporation, Tohoku University
    Inventors: Shinichi NISHIMURA, Kensuke WATANABE, Yoshihito YAMADA, Akinobu TERAMOTO, Tomoyuki SUWA, Yoshinobu SHIBA
  • Publication number: 20190074177
    Abstract: There is provided a film forming apparatus for forming a silicon nitride film on a substrate by having a precursor gas containing silicon to react with a reaction gas containing nitrogen, including: a processing container configured to form a vacuum atmosphere; a substrate mounting part installed in the processing container, a precursor gas supply part configured to supply a precursor gas into the processing container, a reaction gas supply part configured to supply a reaction gas containing nitrogen into the processing container, and an ultraviolet irradiating part configured to excite the reaction gas before the reaction gas reacts with the precursor gas, wherein a substrate on the substrate mounting part is not irradiated with an ultraviolet ray emitted from the ultraviolet irradiating part.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 7, 2019
    Inventors: Akira SHIMIZU, Katsutoshi ISHII, Akinobu TERAMOTO, Tomoyuki SUWA, Yoshinobu SHIBA
  • Patent number: 10043654
    Abstract: A method for rinsing a compound semiconductor, the method including a step of rinsing a compound semiconductor at a temperature of 80 degrees centigrade or higher with an aqueous solution of sulfuric acid of 50 wt % or less in purified water, the aqueous solution having a hydrogen ion concentration of pH 2 or less and an oxidation-reduction potential of 0.6 volts or higher, the compound semiconductor containing gallium as a constituent element, and the compound semiconductor having a surface of gallium nitride (GaN).
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: August 7, 2018
    Assignees: Sumitomo Electric Industries, Ltd., TOHOKU UNIVERSITY
    Inventors: Kenji Nagao, Kenichi Nakamura, Akinobu Teramoto
  • Patent number: 9875899
    Abstract: The semiconductor transistor according the present invention includes an active layer composed of a GaN-based semiconductor and a gate insulating film formed on the active layer. The gate insulating film has a first insulating film including one or more compounds selected from the group consisting of Al2O3, HfO2, ZrO2, La2O3, and Y2O3 formed on the active layer, and a second insulating film composed of SiO2 formed on the first insulating film.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: January 23, 2018
    Assignees: FUJI ELECTRIC CO., LTD., TOHOKU UNIVERSITY
    Inventors: Hiroshi Kambayashi, Katsunori Ueno, Takehiko Nomura, Yoshihiro Sato, Akinobu Teramoto, Tadahiro Ohmi
  • Publication number: 20170178893
    Abstract: A method for rinsing a compound semiconductor, the method including a step of rinsing a compound semiconductor at a temperature of 80 degrees centigrade or higher with an aqueous solution of sulfuric acid of 50 wt % or less in purified water, the aqueous solution having a hydrogen ion concentration of pH 2 or less and an oxidation-reduction potential of 0.6 volts or higher, the compound semiconductor containing gallium as a constituent element, and the compound semiconductor having a surface of gallium nitride (GaN).
    Type: Application
    Filed: February 18, 2015
    Publication date: June 22, 2017
    Applicants: Sumitomo Electric Industries, Ltd., Tohoku University
    Inventors: Kenji Nagao, Kenichi Nakamura, Akinobu Teramoto
  • Patent number: 9543191
    Abstract: Provided are a semiconductor device and semiconductor-device manufacturing method that make it possible to improve the contact between an insulating film and a wiring member and the reliability thereof. This method for manufacturing a semiconductor device (100) includes a step in which a CF film (106) is formed on top of a semiconductor substrate (102), a step in which grooves (C) corresponding to a wiring pattern (P) are formed in the CF film (106), and a step in which a copper wiring member (114) is embedded in the grooves (C).
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: January 10, 2017
    Assignees: ZEON CORPORATION, TOHOKU UNIVERSITY
    Inventors: Takenao Nemoto, Takehisa Saito, Yugo Tomita, Hirokazu Matsumoto, Akihide Shirotori, Akinobu Teramoto, Xun Gu
  • Publication number: 20160276171
    Abstract: In a silicon wafer which has a surface with a plurality of terraces formed stepwise by single-atomic-layer steps, respectively, no slip line is formed.
    Type: Application
    Filed: September 17, 2015
    Publication date: September 22, 2016
    Applicant: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Tadahiro OHMI, Akinobu TERAMOTO, Tomoyuki SUWA
  • Patent number: 9299844
    Abstract: There is provided an accumulation-mode MOSFET. The accumulation-mode MOSFET has a tunnel electron emission portion and a thermionic emission portion which are provided in a source region portion.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: March 29, 2016
    Assignee: TOHOKU UNIVERSITY
    Inventor: Akinobu Teramoto
  • Patent number: 9230799
    Abstract: A method for fabricating a semiconductor device including GaN (gallium nitride) that composes a semiconductor layer and includes forming a gate insulating film, in which at least one film selected from the group of a SiO2 film and an Al2O3 film is formed on a nitride layer containing GaN by using microwave plasma and the formed film is used as at least a part of the gate insulating film.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: January 5, 2016
    Assignees: TOHOKU UNIVERSITY, Fuji Electric Co., Ltd., TOKYO ELECTRON LIMITED
    Inventors: Akinobu Teramoto, Hiroshi Kambayashi, Hirokazu Ueda, Yuichiro Morozumi, Katsushige Harada, Kazuhide Hasebe, Tadahiro Ohmi
  • Patent number: 9157681
    Abstract: In a silicon wafer which has a surface with a plurality of terraces formed stepwise by single-atomic-layer steps, respectively, no slip line is formed.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: October 13, 2015
    Assignee: National University Corporation Tohoku University
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Tomoyuki Suwa
  • Patent number: 9153658
    Abstract: A gate insulating film of a conventional semiconductor device is subjected to dielectric breakdown at a low electric field strength and thus its service life is short. This is because since the size of the asperity of at least one of a semiconductor layer-side interface and an electrode-side interface is large and, an electric field applied to the gate insulating film is locally concentrated and has a variation in its strength. This problem is solved by specifying the sizes of the asperities of both interfaces of the gate insulating film.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: October 6, 2015
    Assignee: TOHOKU UNIVERSITY
    Inventors: Rihito Kuroda, Akinobu Teramoto, Shigetoshi Sugawa
  • Publication number: 20150179788
    Abstract: There is provided an accumulation-mode MOSFET. The accumulation-mode MOSFET has a tunnel electron emission portion and a thermionic emission portion which are provided in a source region portion.
    Type: Application
    Filed: March 3, 2015
    Publication date: June 25, 2015
    Applicant: TOHOKU UNIVERSITY
    Inventor: Akinobu Teramoto
  • Patent number: 8999788
    Abstract: Provided is a method of manufacturing a gallium-nitride-based semiconductor device, comprising forming a first semiconductor layer of a gallium-nitride-based semiconductor; and forming a recessed portion by dry etching a portion of the first semiconductor layer via a microwave plasma process using a bromine-based gas.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: April 7, 2015
    Assignees: Tohoku University, Furukawa Electric Co., Ltd.
    Inventors: Hiroshi Kambayashi, Akinobu Teramoto, Tadahiro Ohmi
  • Publication number: 20150041983
    Abstract: Provided are a semiconductor device and semiconductor-device manufacturing method that make it possible to improve the contact between an insulating film and a wiring member and the reliability thereof. This method for manufacturing a semiconductor device (100) includes a step in which a CF film (106) is formed on top of a semiconductor substrate (102), a step in which grooves (C) corresponding to a wiring pattern (P) are formed in the CF film (106), and a step in which a copper wiring member (114) is embedded in the grooves (C).
    Type: Application
    Filed: February 21, 2013
    Publication date: February 12, 2015
    Applicants: TOKYO ELECTRON LIMITED, TOHOKU UNIVERSITY, ZEON CORPORATION
    Inventors: Takenao Nemoto, Takehisa Saito, Yugo Tomita, Hirokazu Matsumoto, Akihide Shirotori, Akinobu Teramoto, Xun Gu
  • Publication number: 20140367699
    Abstract: The method for fabricating a semiconductor device is to fabricate a semiconductor device including GaN (gallium nitride) that composes a semiconductor layer and includes a step of forming a gate insulating film. In the step, at least one film selected from the group consisting of a SiO2 film and an Al2O3 film is formed on a nitride layer containing GaN by using microwave plasma and the formed film is used as at least a part of the gate insulating film.
    Type: Application
    Filed: September 2, 2014
    Publication date: December 18, 2014
    Applicants: TOHOKU UNIVERSITY, FUJI ELECTRIC CO., LTD., TOKYO ELECTRON LIMITED
    Inventors: Akinobu TERAMOTO, Hiroshi KAMBAYASHI, Hirokazu UEDA, Yuichiro MOROZUMI, Katsushige HARADA, Kazuhide HASEBE, Tadahiro OHMI