Patents by Inventor Akio Furusawa

Akio Furusawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8227090
    Abstract: A bonding material that has a melting temperature of 270° C. or higher and that does not contain lead is inexpensively provided. An electronic element and an electrode of an electronic component are bonded using a bonding material containing an alloy that contains Bi as the main component and that contains 0.2 to 0.8 wt % Cu and 0.02 to 0.2 wt % Ge.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: July 24, 2012
    Assignee: Panasonic Corporation
    Inventors: Akio Furusawa, Kenichiro Suetsugu, Shigeki Sakaguchi, Kimiaki Nakaya
  • Publication number: 20120153461
    Abstract: A semiconductor component of the present invention includes a semiconductor element and a joining layer formed on one surface of the semiconductor element and consisting of a joining material containing Bi as an essential ingredient, and projecting sections are formed on a surface of the joining layer on a side opposite to a surface in contact with the semiconductor element. By joining the semiconductor component to an electrode arranged so as to face the joining layer, the generation of a void can be suppressed.
    Type: Application
    Filed: July 20, 2010
    Publication date: June 21, 2012
    Applicant: Panasonic Corporation
    Inventors: Hidetoshi Kitaura, Akio Furusawa, Shigeaki Sakatani, Taichi Nakamura, Takahiro Matsuo
  • Publication number: 20120018890
    Abstract: A semiconductor device of the present invention includes a supporting board, an electrode surface processing layer formed on the supporting board, a semiconductor element, and a solder material containing a first metal composed mainly of bismuth and a second metal having a higher melting point than the first metal and joining the electrode surface processing layer and the semiconductor element, the first metal containing particles of the second metal inside the first metal. The composition ratio of the second metal is higher than the first metal in a region of the solder material corresponding to the center portion of the semiconductor element, and the composition ratio of the second metal is at least 83.8 atomic percent in the region corresponding to the center portion.
    Type: Application
    Filed: April 22, 2010
    Publication date: January 26, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Taichi Nakamura, Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Takahiro Matsuo
  • Publication number: 20110284278
    Abstract: A mounting structure includes an insulating substrate having a substrate electrode on which at least one electrode notch is provided and a resist, an electronic component having an electronic component electrode to be electrically connected to the substrate electrode, and solder paste printed on a surface of the substrate electrode. The substrate electrode has a following relation, 0<h (?m)?x (?m)+75 (?m), where h (?m) is a width and x (?m) is a depth of the electrode notch, and the electrode notch is formed from an end of an area, which is located under of the electronic component electrode, of the substrate electrode, or from inside of the area to a peripheral side of the substrate electrode, and the electrode notch does not reach a peripheral side, which is located under the electronic component, of the substrate electrode.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 24, 2011
    Applicant: Panasonic Corporation
    Inventors: Kiyohiro Hine, Shigeaki Sakatani, Akio Furusawa
  • Publication number: 20110175224
    Abstract: A manufacturing method for a bonded structure, in which a semiconductor device is bonded to an electrode by a bonding portion, the method including: first mounting a solder ball, in which a surface of a Bi ball is coated with Ni plating, on the electrode that is heated to a temperature equal to or more than a melting point of Bi; second pressing the solder ball against the heated electrode, cracking the Ni plating, spreading molten Bi on a surface of the heated electrode, and forming a bonding material containing Bi-based intermetallic compound of Bi and Ni; and third mounting the semiconductor device on the bonding material.
    Type: Application
    Filed: January 17, 2011
    Publication date: July 21, 2011
    Applicant: Panasonic Corporation
    Inventors: Taichi NAKAMURA, Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Takahiro Matsuo
  • Patent number: 7973412
    Abstract: In a semiconductor device bonded to a motherboard with a bonding material having a melting point of 200° C. to 230° C., a bonding material 15 which is a die bonding material for bonding a semiconductor element 13 to a semiconductor substrate 11 is a Bi alloy containing 0.8 wt % to 10 wt % of Cu and 0.02 wt % to 0.2 wt % of Ge, so that the bonding material 15 for bonding the semiconductor element 13 to the semiconductor substrate 11 is not melted when the semiconductor device is bonded to the motherboard by reflowing. It is therefore possible to suppress poor connection on the semiconductor element 13, thereby securing the mountability and electrical reliability of the semiconductor device.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: July 5, 2011
    Assignee: Panasonic Corporation
    Inventors: Seiji Fujiwara, Yoshihiro Tomita, Akio Furusawa, Kenichirou Suetugu
  • Publication number: 20110120769
    Abstract: A lead-free solder material is provided, which shows a high thermal fatigue resistance and is able to effectively reduce occurrence of connection failure that would cause a function of a product to stop. A solder material comprises 1.0-4.0% by weight of Ag, 4.0-6.0% by weight of In, 0.1-1.0% by weight of Bi, 1% by weight or less (excluding 0% by weight) of a sum of one or more elements selected from the group consisting of Cu, Ni, Co, Fe and Sb, and a remainder of Sn. When a copper-containing electrode part (3a) of an electronic component (3) is connected to a copper-containing electrode land (1a) of a substrate (1) by using this solder material, a part (5b) having an excellent stress relaxation property can be formed in the solder-connecting part and a Cu—Sn intermetallic compound (5a) can be rapidly grown from the electrode land (1a) and the electrode part (3a) to form a strong blocking structure.
    Type: Application
    Filed: April 19, 2010
    Publication date: May 26, 2011
    Inventors: Shigeaki Sakatani, Akio Furusawa, Kenichiro Suetsugu, Taichi Nakamura
  • Publication number: 20110108996
    Abstract: The present invention provides a semiconductor component having a joint structure including a semiconductor device, an electrode disposed opposite the semiconductor device, and a joining material which contains Bi as main component and connects the semiconductor device to the electrode. Since the joining material contains a carbon compound, joint failure due to the difference in linear expansion coefficient between the semiconductor device and the electrode can be reduced compared with conventional materials. The joining material which contains Bi as main component enables provision of a joint structure in which a semiconductor device and an electrode are joined by a joint more reliable than a conventional joint.
    Type: Application
    Filed: June 17, 2010
    Publication date: May 12, 2011
    Inventors: Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Taichi Nakamura, Takahiro Matsuo
  • Publication number: 20110042817
    Abstract: A layer (105) of a metal having a crystal lattice different from the crystal lattice of a joining material (106) mainly containing Bi is placed on a surface (102b) of a semiconductor device (102), and a layer (104) of an element having a positive value of heat of formation of a compound with the joining material (106) is placed between the layer (105) of the metal having the crystal lattice different from the crystal lattice of the joining material (106) and the surface (102b) of the semiconductor device (102), thereby preventing the component of the layer (105) of the metal having the crystal lattice different from the crystal lattice of the joining material (106) from being diffused in the semiconductor device (102).
    Type: Application
    Filed: April 27, 2010
    Publication date: February 24, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Taichi Nakamura, Takahiro Matsuo
  • Publication number: 20100301481
    Abstract: A joint structure joins an electronic element 12 included in an electronic component to an electrode 14 included in that electronic component. The joint structure includes a solder layer, which contains 0.2 to 6% by weight of copper, 0.02 to 0.2% by weight of germanium and 93.8 to 99.78% by weight of bismuth, a nickel layer provided between the solder layer and the electrode, and a barrier layer provided between the nickel layer and the solder layer. Here, the barrier layer is formed so as to have an average thickness of from 0.5 to 4.5 ?m after the electronic element and the electrode are joined by the solder layer.
    Type: Application
    Filed: May 22, 2009
    Publication date: December 2, 2010
    Inventors: Akio Furusawa, Shigeaki Sakatani, Taichi Nakamura, Takahiro Matsuo
  • Publication number: 20100294550
    Abstract: A bonding material containing 2 to 10.5% by weight of Cu, 0.02 to 0.2% by weight of Ge and 89.3 to 97.98% by weight of Bi has heat resistance of up to 275° C. and superior wettability, and a bonding material containing 2 to 10.5% by weight of Cu, 0.02 to 0.2% by weight of Ge, 0.02 to 0.11% by weight of Ni and 89.19 to 97.96% by weight of Bi has more superior heat resistance.
    Type: Application
    Filed: December 9, 2008
    Publication date: November 25, 2010
    Inventors: Akio Furusawa, Shigeki Sakaguchi, Kenichiro Suetsugu
  • Publication number: 20100148367
    Abstract: A semiconductor device includes a die pad having a surface on which a first solder bonding layer is formed, and made of metal; and a semiconductor element fixed on the first solder bonding layer on the die pad by a solder material made mostly of bismuth. The first solder bonding layer is made of a softer material than the solder material, a recess is formed in a part of the first solder bonding layer by pressing the solder material against the first solder bonding layer, and the solder material partially fills the recess.
    Type: Application
    Filed: February 24, 2010
    Publication date: June 17, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiro MATSUO, Akio Furusawa, Shigeaki Sakatani
  • Publication number: 20090242249
    Abstract: A bonding material that has a melting temperature of 270° C. or higher and that does not contain lead is inexpensively provided. An electronic element and an electrode of an electronic component are bonded using a bonding material containing an alloy that contains Bi as the main component and that contains 0.2 to 0.8 wt % Cu and to 0.2 wt % Ge.
    Type: Application
    Filed: May 18, 2007
    Publication date: October 1, 2009
    Inventors: Akio Furusawa, Kenichiro Suetsugu, Shigeki Sakaguchi, Kimiaki Nakaya
  • Publication number: 20090166876
    Abstract: In a semiconductor device bonded to a motherboard with a bonding material having a melting point of 200° C. to 230° C., a bonding material 15 which is a die bonding material for bonding a semiconductor element 13 to a semiconductor substrate 11 is a Bi alloy containing 0.8 wt % to 10 wt % of Cu and 0.02 wt % to 0.2 wt % of Ge, so that the bonding material 15 for bonding the semiconductor element 13 to the semiconductor substrate 11 is not melted when the semiconductor device is bonded to the motherboard by reflowing. It is therefore possible to suppress poor connection on the semiconductor element 13, thereby securing the mountability and electrical reliability of the semiconductor device.
    Type: Application
    Filed: December 23, 2008
    Publication date: July 2, 2009
    Applicant: Panasonic Corporation
    Inventors: Seiji Fujiwara, Yoshihiro Tomita, Akio Furusawa, Kenichirou Suetugu
  • Patent number: 7176402
    Abstract: An electronic part processing method for peeling off a resin coating of an electronic part having a terminal section. The method includes a step of irradiating, with plasma, a coated wire having copper as a principal constituent and a surface coated with a resin.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: February 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomohiro Okumura, Kenichiro Suetsugu, Hiroshi Kawazoe, Mitsuo Saitoh, Akio Furusawa
  • Publication number: 20050179171
    Abstract: An electronic part processing method for peeling off a resin coating of an electronic part having a terminal section, which includes a step of irradiating, with plasma, a coated wire having copper as a principal constituent and a surface coated with a resin.
    Type: Application
    Filed: October 21, 2004
    Publication date: August 18, 2005
    Inventors: Tomohiro Okumura, Kenichiro Suetsugu, Hiroshi Kawazoe, Mitsuo Saitoh, Akio Furusawa
  • Patent number: 6428745
    Abstract: Disclosed are a solder and a solder paste used for soldering an electronic part to a circuit board. This solder comprises 2.0 to 3.5 wt % of Ag, 5 to 18 wt % of Bi and Sn for the rest. Alternatively, it further contains at least one element selected from the group consisting of 0.1 to 1.5 wt % of In, 0.1 to 0.7 wt % of Cu and 0.1 to 10 wt % of Zn.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: August 6, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Tetsuo Fukushima, Kenichiro Suetsugu, Akio Furusawa
  • Publication number: 20010025875
    Abstract: Disclosed are a solder and a solder paste used for soldering an electronic part to a circuit board. This solder comprises 2.0 to 3.5 wt % of Ag, 5 to 18 wt % of Bi and Sn for the rest. Alternatively, it further contains at least one element selected from the group consisting of 0.1 to 1.5 wt % of In, 0.1 to 0.7 wt % of Cu and 0.1 to 10 wt % of Zn.
    Type: Application
    Filed: May 16, 2001
    Publication date: October 4, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Tetsuo Fukushima, Kenichiro Suetsugu, Akio Furusawa
  • Publication number: 20010018030
    Abstract: Disclosed are a solder and a solder paste used for soldering an electronic part to a circuit board. This solder comprises 2.0 to 3.5 wt % of Ag, 5 to 18 wt % of Bi and Sn for the rest. Alternatively, it further contains at least one element selected from the group consisting of 0.1 to 1.5 wt % of In, 0.1 to 0.7 wt % of Cu and 0.1 to 10 wt % of Zn.
    Type: Application
    Filed: March 28, 2001
    Publication date: August 30, 2001
    Applicant: Matsushita Electic Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Tetsuo Fukushima, Kenichiro Suetsugu, Akio Furusawa
  • Patent number: 6267823
    Abstract: Disclosed are a solder and a solder paste used for soldering an electronic part to a circuit board. This solder comprises 2.0 to 3.5 wt % of Ag, 5 to 18 wt % of Bi and Sn for the rest. Alternatively, it further contains at least one element selected from the group consisting of 0.1 to 1.5 wt % of In, 0.1 to 0.7 wt % of Cu and 0.1 to 10 wt % of Zn.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: July 31, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Yamaguchi, Tetsuo Fukushima, Kenichiro Suetsugu, Akio Furusawa