Patents by Inventor Akira Mase
Akira Mase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7462515Abstract: A display and a driving method for the same capable of constructing clear visual images is described. In the display, a plurality of conductive pads are opposed to a back electrode with a light influencing medium such as a liquid crystal layer. Control signals are supplied to the conductive pads through complimentary transistors comprise a p-channel field effect transistor and an n-channel field effect transistor connected between VDD and VSS lines of a control circuit, which also supplies a bias voltage to the back electrode and gate control signals to the gate terminals of the p-channel field effect transistor and the n-channel field effect transistor. During operation, the bias voltage is inverted in order to invert the polarity of control signal applied across the light influencing medium.Type: GrantFiled: May 5, 2005Date of Patent: December 9, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
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Patent number: 7423290Abstract: A grey tone display and a driving method are described. The display comprises a light influencing layer, an electrode pad located adjacent to the layer at one side of the layer in order to define a pixel in the layer, an n-channel field effect transistors connected to the electrode pad at its source terminal, a p-channel field effect transistors connected to the electrode pad at its source terminal, a first control line connected to the drain terminal of the n-channel field effect transistor, a second control line connected to the drain terminal of the p-channel field effect transistor, a third control line connected to the gate terminals of the n-channel field effect transistor and the p-channel field effect transistor, and a control circuit for supplying control signals to the first, second and third control lines. By this configuration, the voltage of the electrode pad can be arbitrarily controlled by adjusting the input level at the gate terminals.Type: GrantFiled: March 14, 2006Date of Patent: September 9, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
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Patent number: 7420628Abstract: An electro-optical device comprising a display drive system with the display timing related to the unit time t for writing-in a picture element and to the time F for writing-in one picture is disclosed. In the device, a gradated display corresponding to the ratio of the division can be obtained by time-sharing the signal during a write-in of time t without changing the time F.Type: GrantFiled: October 3, 1997Date of Patent: September 2, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masaaki Hiroki, Akira Mase, Shunpei Yamazaki
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Patent number: 7288437Abstract: An improved method of forming an electrode pattern on a substrate is described. The substrate is coated with a first conductive film and subjected to baking. On the first conductive film is then overlied a second conductive film which mends possible fissures of the first conductive film which, besides, would produce open circuits in the pattern.Type: GrantFiled: February 3, 2005Date of Patent: October 30, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Akira Mase
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Publication number: 20070176915Abstract: An electro-optical device and method for displaying an image are disclosed. A clear image with a clear profile can be displayed therein by processing input image data, for example input image data of TV broadcasting received by the device.Type: ApplicationFiled: March 12, 2007Publication date: August 2, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunepi Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura
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Patent number: 7190409Abstract: An electro-optical device and a method for displaying an image are disclosed. A clear image with a clear profile can be displayed therein by processing input image data, for example input image data of TV broadcasting received by the device.Type: GrantFiled: November 18, 2002Date of Patent: March 13, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunepi Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura
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Patent number: 7154147Abstract: A grey tone display and a driving method are described. The display comprises a light influencing layer, an electrode pad located adjacent to the layer at one side of the layer in order to define a pixel in the layer, an n-channel field effect transistors connected to the electrode pad at its source terminal, a p-channel field effect transistors connected to the electrode pad at its source terminal, a first control line connected to the drain terminal of the n-channel field effect transistor, a second control line connected to the drain terminal of the p-channel field effect transistor, a third control line connected to the gate terminals of the n-channel field effect transistor and the p-channel field effect transistor, and a control circuit for supplying control signals to the first, second and third control lines. By this configuration, the voltage of the electrode pad can be arbitrarily controlled by adjusting the input level at the gate terminals.Type: GrantFiled: June 2, 1999Date of Patent: December 26, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
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Publication number: 20060151792Abstract: A grey tone display and a driving method are described. The display comprises a light influencing layer, an electrode pad located adjacent to the layer at one side of the layer in order to define a pixel in the layer, an n-channel field effect transistors connected to the electrode pad at its source terminal, a p-channel field effect transistors connected to the electrode pad at its source terminal, a first control line connected to the drain terminal of the n-channel field effect transistor, a second control line connected to the drain terminal of the p-channel field effect transistor, a third control line connected to the gate terminals of the n-channel field effect transistor and the p-channel field effect transistor, and a control circuit for supplying control signals to the first, second and third control lines. By this configuration, the voltage of the electrode pad can be arbitrarily controlled by adjusting the input level at the gate terminals.Type: ApplicationFiled: March 14, 2006Publication date: July 13, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
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Publication number: 20060074884Abstract: Provided are a search device and a search program for searching an identifier of a site server, which provides information corresponding to a search format including an inputted keyword.Type: ApplicationFiled: November 8, 2004Publication date: April 6, 2006Applicant: NewsWatch, Inc.Inventors: Nobuyuki Sawashima, Takashi Suzuoka, Akira Mase
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Publication number: 20060060860Abstract: An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.Type: ApplicationFiled: August 17, 2005Publication date: March 23, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura, Hongyong Zhang, Hideki Uochi, Hideki Nemoto
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Publication number: 20060060852Abstract: A thin-film semiconductor device or integrated circuit comprising an insulating substrate, TFTs (thin-film transistors) formed on the substrate, and multilayer conductive interconnections. The circuit has a first metallization layer becoming gate electrodes and gate interconnections. The surface of the first metallization layer is oxidized by anodic oxidation to form an insulating coating on the surface of the first metallization layer. A second metallization layer becoming source and drain electrodes or conductive interconnections is then formed on the insulating coating directly or via an interlayer insulator. An improvement in the production yield and improved reliability are accomplished.Type: ApplicationFiled: August 18, 2005Publication date: March 23, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Akira Mase, Hideki Uochi
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Publication number: 20060033873Abstract: A liquid crystal device and a manufacturing method thereof are described. The device comprises a liquid crystal panel and an auxiliary panel formed with an IC circuit for supplying driving signals to the liquid crystal device. The auxiliary substrate is separately provided with the circuit and the function thereof is tested in advance of the assembling with the liquid crystal panel. By this procedure, the yield is substantially improved.Type: ApplicationFiled: October 17, 2005Publication date: February 16, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Akira Mase
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Patent number: 6979840Abstract: A thin-film semiconductor device or integrated circuit comprising an insulating substrate, TFTs (thin-film transistors) formed on the substrate, and multilayer conductive interconnections. The circuit has a first metallization layer becoming gate electrodes and gate interconnections. The surface of the first metallization layer is oxidized by anodic oxidation to form an insulating coating on the surface of the first metallization layer. A second metallization layer becoming source and drain electrodes or conductive interconnections is then formed on the insulating coating directly or via an interlayer insulator. An improvement in the production yield and improved reliability are accomplished.Type: GrantFiled: April 6, 1994Date of Patent: December 27, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Akira Mase, Hideki Uochi
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Patent number: 6977392Abstract: An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.Type: GrantFiled: March 18, 2003Date of Patent: December 20, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura, Hongyong Zhang, Hideki Uochi, Hideki Nemoto
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Patent number: 6975296Abstract: The method of fine gradation display by an electro-optical device with little influence by difference in elemental devices, is disclosed, which is an object of the present invention. In case of an active matrix electro-optical device, a visual gradation display can be carried out by digitizing an analog image signal externally supplied by means of binary notation, by temporarily storing the digital signal thus obtained, by outputting the digital signal to a circuit of next step in a proper order, and by controlling the output timing of the signal so as to output the signal to the active matrix electro-optical device, and whereby digitally controlling the time for applying voltage to a picture element.Type: GrantFiled: March 31, 2000Date of Patent: December 13, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
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Publication number: 20050237442Abstract: A display and a driving method for the same capable of constructing clear visual images is described. In the display, a plurality of conductive pads are opposed to a back electrode with a light influencing medium such as a liquid crystal layer. Control signals are supplied to the conductive pads through complimentary transistors comprise a p-channel field effect transistor and an n-channel field effect transistor connected between VDD and VSS lines of a control circuit, which also supplies a bias voltage to the back electrode and gate control signals to the gate terminals of the p-channel field effect transistor and the n-channel field effect transistor. During operation, the bias voltage is inverted in order to invert the polarity of control signal applied across the light influencing medium.Type: ApplicationFiled: May 5, 2005Publication date: October 27, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
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Patent number: 6956635Abstract: A liquid crystal device and a manufacturing method thereof are described. The device comprises a liquid crystal panel and an auxiliary panel formed with an IC circuit for supplying driving signals to the liquid crystal device. The auxiliary substrate is separately provided with the circuit and the function thereof is tested in advance of the assembling with the liquid crystal panel. By this procedure, the yield is substantially improved.Type: GrantFiled: November 19, 2001Date of Patent: October 18, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Akira Mase
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Publication number: 20050148165Abstract: An improved method of forming an electrode pattern on a substrate is described. The substarate is coated with a first conductive film and subjected to baking. On the first conductive film is then overlied a second conductive film which mends possible fissures of the first conductive film which, besides, would produce open circuits in the pattern.Type: ApplicationFiled: February 3, 2005Publication date: July 7, 2005Applicant: Semiconductor Energy LaboratoryInventor: Akira Mase
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Patent number: 6893906Abstract: A display and a driving method for the same capable of constructing clear visual images is described. In the display, a plurality of conductive pads are opposed to a back electrode with a light influencing medium such as a liquid crystal layer. Control signals are supplied to the conductive pads through complimentary transistors comprise a p-channel field effect transistor and an n-channel field effect transistor connected between VDD and VSS lines of a control circuit, which also supplies a bias voltage to the back electrode and gate control signals to the gate terminals of the p-channel field effect transistor and the n-channel field effect transistor. During operation, the bias voltage is inverted in order to invert the polarity of control signal applied across the light influencing medium.Type: GrantFiled: December 8, 2003Date of Patent: May 17, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
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Publication number: 20050052391Abstract: The method of fine gradation display by an electro-optical device with little influence by difference in elemental devices, is disclosed, which is an object of the present invention. In case of an active matrix electro-optical device, a visual gradation display can be carried out by digitizing an analog image signal externally supplied by means of binary notation, by temporarily storing the digital signal thus obtained, by outputting the digital signal to a circuit of next step in a proper order, and by controlling the output timing of the signal so as to output the signal to the active matrix electro-optical device, and whereby digitally controlling the time for applying voltage to a picture element.Type: ApplicationFiled: September 15, 2004Publication date: March 10, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki