Patents by Inventor Akira Mase

Akira Mase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050052391
    Abstract: The method of fine gradation display by an electro-optical device with little influence by difference in elemental devices, is disclosed, which is an object of the present invention. In case of an active matrix electro-optical device, a visual gradation display can be carried out by digitizing an analog image signal externally supplied by means of binary notation, by temporarily storing the digital signal thus obtained, by outputting the digital signal to a circuit of next step in a proper order, and by controlling the output timing of the signal so as to output the signal to the active matrix electro-optical device, and whereby digitally controlling the time for applying voltage to a picture element.
    Type: Application
    Filed: September 15, 2004
    Publication date: March 10, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
  • Patent number: 6853431
    Abstract: An improved liquid crystal device and manufacturing method for same are described. In the device, a pair of substrates, between which a liquid crystal layer is disposed, is joined with pillars inbetween functioning as spacers which are provided of photocurable resin by photolithography. With this structure, the spacers can be in surface contact with the inside surfaces of the substrates on which electrode arrangement and active devices are formed.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: February 8, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiko Sato, Masakazu Odaka, Akira Mase, Toru Takayama, Kaoru Tabata, Chizuru Ishigaki, Ippei Kobayashi, Toshimitsu Konuma, Toshiharu Yamaguchi, Toshio Watanabe, Osamu Aoyagi, Hiroyuki Sakayori, Akio Osabe, Shunpei Yamazaki
  • Publication number: 20050007329
    Abstract: An electro-optical device comprising a display drive system with the display timing related to the unit time t for writing-in a picture element and to the time F for writing-in one picture is disclosed. In the device, a gradated display corresponding to the ratio of the division can be obtained by time-sharing the signal during a write-in of time t without changing the time F.
    Type: Application
    Filed: May 13, 2004
    Publication date: January 13, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Akira Mase
  • Publication number: 20050001965
    Abstract: An electro-optical device comprising a display drive system with the display timing related to the unit time t for writing-in a picture element and to the time F for writing-in one picture is disclosed. In the device, a gradated display corresponding to the ratio of the division can be obtained by time-sharing the signal during a write-in of time t without changing the time F.
    Type: Application
    Filed: May 3, 2004
    Publication date: January 6, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Akira Mase
  • Patent number: 6822261
    Abstract: An insulated gate field effect semiconductor device comprising a substrate having provided thereon a thin-film structured insulated gate field effect semiconductor device, said device being characterized by that it comprises a metal gate electrode and at least the side thereof is coated with an oxide of the metal. The insulated gate field effect semiconductor device according to the present invention is also characterized by that the contact holes for the extracting contacts of the source and drain regions are provided at about the same position of the end face of the anodically oxidized film established at the side of the gate. Furthermore, the present invention provides a method for forming insulated gate field effect semiconductor devices using less masks.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: November 23, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Toshiji Hamatani
  • Publication number: 20040207777
    Abstract: An electro-optical device comprising a display drive system with the display timing related to the unit time t for writing-in a picture element and to the time F for writing-in one picture is disclosed. In the device, a gradated display corresponding to the ratio of the division can be obtained by time-sharing the signal during a write-in of time t without changing the time F.
    Type: Application
    Filed: May 13, 2004
    Publication date: October 21, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Akira Mase
  • Patent number: 6778231
    Abstract: A display device including a substrate and at least one thin film transistor formed over the substrate, wherein the thin film transistor includes a semiconductor film. An insulating film including an inorganic material is provided over the thin film transistor. A leveling film including an organic resin is formed over the substrate and covers the thin film transistor. A pixel electrode is formed on the leveling film and is directly connected to the semiconductor film of the thin film transistor through an opening provided in the leveling film, wherein an edge of the organic resin film at a periphery of the opening is round.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: August 17, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura
  • Patent number: 6777711
    Abstract: An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: August 17, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura, Hongyong Zhang, Hideki Uochi, Hideki Nemoto
  • Publication number: 20040115953
    Abstract: A display and a driving method for the same capable of constructing clear visual images is described. In the display, a plurality of conductive pads are opposed to a back electrode with a light influencing medium such as a liquid crystal layer. Control signals are supplied to the conductive pads through. complimentary transistors comprise a p-channel field effect transistor and an n-channel field effect transistor connected between VDD and VSS lines of a control circuit, which also supplies a bias voltage to the back electrode and gate control signals to the gate terminals of the p-channel field effect transistor and the n-channel field effect transistor. During operation, the bias voltage is inverted in order to invert the polarity of control signal applied across the light influencing medium.
    Type: Application
    Filed: December 8, 2003
    Publication date: June 17, 2004
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
  • Patent number: 6713783
    Abstract: A liquid-crystal electro-optical device capable of compensating for the operation of any malfunctioning one of TFTs (thin-film transistors) existing within the device if such a malfunction occurs. Plural complementary TFT configurations are provided per pixel electrode. Each complementary TFT configuration consists of at least one p-channel TFT and at least one n-channel TFT. The input and output terminals of the plural complementary TFT configurations are connected in series. One of the input and output terminals is connected to the pixel electrode, while the other is connected to a first signal line. All the gate electrodes of the p-channel and n-channel TFTs included in said plural complementary TFT configurations are connected to a second signal line.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: March 30, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akira Mase, Masaaki Hiroki
  • Publication number: 20030173570
    Abstract: An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 18, 2003
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura, Hongyong Zhang, Hideki Uochi, Hideki Nemoto
  • Patent number: 6566711
    Abstract: An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: May 20, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura, Hongyong Zhang, Hideki Uochi, Hideki Nemoto
  • Publication number: 20030071957
    Abstract: An improved liquid crystal device and manufacturing method for same are described. In the device, a pair of substrates, between which a liquid crystal layer is disposed, is joined with pillars inbetween functioning as spacers which are provided of photocurable resin by photolithography. With this structure, the spacers can be in surface contact with the inside surfaces of the substrates on which electrode arrangement and active devices are formed.
    Type: Application
    Filed: November 27, 2002
    Publication date: April 17, 2003
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiko Sato, Masakazu Odaka, Akira Mase, Toru Takayama, Kaoru Tabata, Chizuru Ishigaki, Ippei Kobayashi, Toshimitsu Konuma, Toshiharu Yamaguchi, Toshio Watanabe, Osamu Aoyagi, Hiroyuki Sakayori, Akio Osabe, Shunpei Yamazaki
  • Publication number: 20030071924
    Abstract: An electro-optical device and a method for displaying an image are disclosed. A clear image with a clear profile can be displayed therein by processing input image data, for example input image data of TV broadcasting received by the device.
    Type: Application
    Filed: November 18, 2002
    Publication date: April 17, 2003
    Applicant: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Shunepi Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura
  • Patent number: 6493057
    Abstract: An improved liquid crystal device and manufacturing method for same are described. In the device, a pair of substrates, between which a liquid crystal layer is disposed, is joined with pillars inbetween functioning as spacers which are provided of photocurable resin by photolithography. With this structure, the spacers can be in surface contact with the inside surfaces of the substrates on which electrode arrangement and active devices are formed.
    Type: Grant
    Filed: July 2, 1999
    Date of Patent: December 10, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiko Sato, Toshimitsu Konuma, Masakazu Odaka, Toshiharu Yamaguchi, Toshio Watanabe, Osamu Aoyagi, Kaoru Tabata, Chizuru Isigaki, Hiroyuki Sakayori, Ippei Kobayashi, Akio Osabe, Shunpei Yamazaki, Toru Takayama, Akira Mase
  • Patent number: 6483551
    Abstract: An electro-optical device and a method for displaying an image are disclosed. A clear image with a clear profile can be displayed therein by processing input image data, for example input image data of TV broadcasting received by the device.
    Type: Grant
    Filed: March 16, 1998
    Date of Patent: November 19, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunepi Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura
  • Patent number: 6476447
    Abstract: A transistor adapted to be used in an active-matrix liquid-crystal display, the channel length, of the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric fields is applied to these offset regions from the gate electrode.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: November 5, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura, Hongyong Zhang, Hideki Uochi
  • Patent number: 6437367
    Abstract: A novel structure of an active electro-optical device is disclosed. The device is provided with complementary thin film insulated gate field effect transistors (TFTs) therein which comprise a P-TFT and an N-TFT. P-TFT and N-TFT are connected to a common signal line by the gate electrodes thereof, while the source (or drain) electrodes thereof are connected to a common signal line as well as to one of the picture element electrodes. In case of driving the active electro-optical device, a gradation display can be carried out in a driving method having a display timing determined in relation to a time F for writing one screen and a time (t) for writing in one picture element, by applying a reference signal in a cycle of the time (t), to the signal line used for a certain picture element driving selection, and by applying the select signal to the other signal line at a certain timing within the time (t), and whereby setting the value of the voltage to be applied to a liquid crystal.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: August 20, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
  • Patent number: 6436815
    Abstract: A novel structure of an active electro-optical device is disclosed. The device is provided with complementary thin film insulated gate field effect transistors (TFTs) therein which comprise a P-TFT and an N-TFT. P-TFT and N-TFT are connected to a common signal line by the gate electrodes thereof, while the source (or drain) electrodes thereof are connected to a common signal line as a well as to one of the picture element electrodes. In case of driving the active electro-optical device, a gradation display can be carried out in a driving method having a display timing determined in relation to a time F for writing one screen and a time (t) for writing in one picture element, by applying a reference signal in a cycle of the time (t), to the signal line used for a certain picture element driving selection, and by applying the select signal to the other signal line at a certain timing within the time (t), and whereby setting the value of the voltage to be applied to a liquid crystal.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: August 20, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki
  • Publication number: 20020110637
    Abstract: An improved method of forming an electrode pattern on a substrate is described. The substrate is coated with a first conductive film and subjected to baking. On the first conductive film is then overlied a second conductive film which mends possible fissures of the first conductive film which, besides, would produce open circuits in the pattern.
    Type: Application
    Filed: November 26, 2001
    Publication date: August 15, 2002
    Inventor: Akira Mase