Patents by Inventor Akira Muto

Akira Muto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140367739
    Abstract: A semiconductor device and an electronic device are improved in performances by supporting a large current. An emitter terminal protrudes from a first side of a sealing body, and signal terminals protrude from a second sides of the sealing body. Namely, the side of the sealing body from which the emitter terminal protrudes and the side of the sealing body from which the signal terminals protrude are different. More particularly, the signal terminals protrude from the side of the sealing body opposite the side thereof from which the emitter terminal protrudes. Further, a second semiconductor chip including a diode formed therein is mounted over a first surface of a chip mounting portion in such a manner as to be situated between the emitter terminal and the a first semiconductor chip including an IGBT formed therein in plan view.
    Type: Application
    Filed: May 26, 2014
    Publication date: December 18, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Akira Muto, Nobuya Koike, Masaki Kotsuji, Yukihiro Narita
  • Publication number: 20130127032
    Abstract: To prevent, in a resin-sealed type semiconductor package, generation of cracks in a die bonding material used for mounting of a semiconductor chip. A semiconductor chip is mounted over the upper surface of a die pad via a die bonding material, followed by sealing with an insulating resin. The top surface of the die pad to be brought into contact with the insulating resin is surface-roughened, while the bottom surface of the die pad and an outer lead portion are not surface-roughened.
    Type: Application
    Filed: January 14, 2013
    Publication date: May 23, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroyuki NAKAMURA, Akira MUTO, Nobuya KOIKE, Atsushi NISHIKIZAWA, Yukihiro SATO, Katsuhiko FUNATSU
  • Patent number: 8367479
    Abstract: To prevent, in a resin-sealed type semiconductor package, generation of cracks in a die bonding material used for mounting of a semiconductor chip. A semiconductor chip is mounted over the upper surface of a die pad via a die bonding material, followed by sealing with an insulating resin. The top surface of the die pad to be brought into contact with the insulating resin is surface-roughened, while the bottom surface of the die pad and an outer lead portion are not surface-roughened.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: February 5, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyuki Nakamura, Akira Muto, Nobuya Koike, Atsushi Nishikizawa, Yukihiro Sato, Katsuhiko Funatsu
  • Patent number: 8138600
    Abstract: A semiconductor device is provided, which is capable of improving mounting flexibility relatively and increasing general versatility, as well as realizing heat radiation characteristics and low on-resistance. Moreover, the semiconductor device is provided, which is capable of improving reliability, performing processing in manufacturing processes easily and reducing manufacturing costs. Also, the semiconductor device capable of decreasing the mounting area is provided. A semiconductor chip in which an IGBT is formed and a semiconductor chip in which a diode is formed are mounted over a die pad. Then, the semiconductor chip and the semiconductor chip are connected by using a clip. The clip is arranged so as not to overlap with bonding pads formed at the semiconductor chip in a flat state. The bonding pads formed at the semiconductor chip are connected to electrodes by using wires.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: March 20, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Akira Muto, Ichio Shimizu, Tetsuo Iljima, Toshiyuki Hata, Katsuo Ishizaka
  • Patent number: 8130504
    Abstract: A method of manufacturing a flexible printed circuit board having an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: March 6, 2012
    Assignee: Sony Corporation
    Inventors: Akira Muto, Tomokazu Tanaka
  • Patent number: 8125675
    Abstract: A recording/reproducing apparatus performs labeling that matches the information recorded on a recording medium. The recording/reproducing apparatus labels the content stored on a recording medium, and includes a control unit that acquires label information for labeling the content. A printing unit labels the label information on the recording medium.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: February 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Mamoru Shoji, Toyoji Gushima, Akira Muto, Takeshi Nakajima
  • Patent number: 8114710
    Abstract: The radiation performance of a resin sealed semiconductor package is enhanced and further the fabrication yield thereof is enhanced. A drain terminal coupled to the back surface drain electrode of a semiconductor chip is exposed at the back surface of an encapsulation resin section. Part of the following portion and terminal is exposed at the top surface of the encapsulation resin section: the first portion of a source terminal coupled to the source pad electrode of the semiconductor chip and a gate terminal coupled to the gate pad electrode of the semiconductor chip. The remaining part of the second portion of the source terminal and the gate terminal is exposed at the back surface of the encapsulation resin section. When this semiconductor device is manufactured, bonding material and a film member are placed between the drain terminal and the semiconductor chip.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: February 14, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Akira Muto, Nobuya Koike, Katsuo Arai, Atsushi Fujiki
  • Publication number: 20110089558
    Abstract: There is provided a technology capable of reducing the mounting burden on the part of a customer which is a recipient of a package. Over a metal board, a single package and another single package are mounted together via an insulation adhesion sheet, thereby to form one composite package. As a result, as compared with the case where six single packages are mounted, the number of packages to be mounted is smaller in the case where three sets of the composite packages are mounted. This can reduce the mounting burden on the part of a customer.
    Type: Application
    Filed: October 17, 2010
    Publication date: April 21, 2011
    Inventors: Akira MUTO, Akira Mishima, Takuro Kanazawa, Ochi Kentaro, Tetsuo Iijima, Katsuo Ishizaka
  • Patent number: 7869338
    Abstract: A position detection device, a position detection method, a position detection control device, a position detection control method, a position detection control program, an access authentication device, an access authentication method, an access authentication control device, an access authentication control method, an access authentication control program, an information storage device, and an optical disk are provided, all of which make it possible to prevent illegal copying of the information recorded in a recording medium. An information recording/playback device detects the position on an optical disk of an RFID tag provided to the optical disk, and writes the detected position on the optical disk of the RFID tag into the RFID tag as the position information.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: January 11, 2011
    Assignee: Panasonic Corporation
    Inventors: Harumitsu Miyashita, Toyoji Gushima, Akira Muto, Masaru Yamaoka
  • Publication number: 20100308421
    Abstract: The size of a semiconductor device is reduced. A semiconductor chip in which a power MOSFET is placed above a semiconductor chip in which another power MOSFET is formed and they are sealed with an encapsulation resin portion. The semiconductor chips are so arranged that the upper semiconductor chip does not overlap with the area positioned directly above a gate pad electrode of the lower semiconductor chip. The semiconductor chips are identical in size and the respective source pad electrodes and gate pad electrodes of the lower semiconductor chip and the upper semiconductor chip are identical in shape and arrangement. The lower semiconductor chip and the upper semiconductor chip are arranged with their respective centers displaced from each other.
    Type: Application
    Filed: April 26, 2010
    Publication date: December 9, 2010
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Akira MUTO, Yuichi MACHIDA, Nobuya KOIKE, Atsushi FUJIKI, Masaki TAMURA
  • Publication number: 20100258922
    Abstract: To prevent, in a resin-sealed type semiconductor package, generation of cracks in a die bonding material used for mounting of a semiconductor chip. A semiconductor chip is mounted over the upper surface of a die pad via a die bonding material, followed by sealing with an insulating resin. The top surface of the die pad to be brought into contact with the insulating resin is surface-roughened, while the bottom surface of the die pad and an outer lead portion are not surface-roughened.
    Type: Application
    Filed: March 5, 2010
    Publication date: October 14, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Hiroyuki NAKAMURA, Akira MUTO, Nobuya KOIKE, Atsushi NISHIKIZAWA, Yukihiro SATO, Katsuhiko FUNATSU
  • Publication number: 20100175251
    Abstract: A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.
    Type: Application
    Filed: March 29, 2010
    Publication date: July 15, 2010
    Applicant: SONY CORPORATION
    Inventors: Akira MUTO, Tomokazu TANAKA
  • Patent number: 7741162
    Abstract: This invention is a method for manufacturing a high-frequency module device. A high-frequency circuit unit (2) in which first to third unit wiring layers (5) to (7), each having a capacitor (12) or the like at a part, are stacked and formed on flattened one surface of a dummy board (30) so that a third pattern wiring is exposed from a connection surface (2a) of an uppermost layer is mounted on a mounting surface (3a) of a base board (3) where an input/output terminal part (18) is exposed, in such a manner that the third pattern wiring and the input/output terminal part are connected with each other, and after that, the dummy board is removed. A high-frequency module device is thus manufactured.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: June 22, 2010
    Assignee: Sony Corporation
    Inventors: Tsuyoshi Ogawa, Takahiko Kosemura, Akira Muto, Akihiko Okubora
  • Patent number: 7688594
    Abstract: A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 30, 2010
    Assignee: Sony Corporation
    Inventors: Akira Muto, Tomokazu Tanaka
  • Patent number: 7656262
    Abstract: There is provided a balun transformer, in which first to fourth layer coils are stacked and coupled magnetically; one end of each coil of the first to fourth layer coils is grounded; the second and third layer coils are connected in parallel, an unbalanced signal is input/output to/from a common terminal of the second and third layer coils; a first balanced signal is input/output to/from the other end of the first layer coil; and a second balanced signal is input/output to/from the other end of the fourth layer coil.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: February 2, 2010
    Assignee: Sony Corporation
    Inventor: Akira Muto
  • Publication number: 20090215230
    Abstract: The radiation performance of a resin sealed semiconductor package is enhanced and further the fabrication yield thereof is enhanced. A drain terminal coupled to the back surface drain electrode of a semiconductor chip is exposed at the back surface of an encapsulation resin section. Part of the following portion and terminal is exposed at the top surface of the encapsulation resin section: the first portion of a source terminal coupled to the source pad electrode of the semiconductor chip and a gate terminal coupled to the gate pad electrode of the semiconductor chip. The remaining part of the second portion of the source terminal and the gate terminal is exposed at the back surface of the encapsulation resin section. When this semiconductor device is manufactured, bonding material and a film member are placed between the drain terminal and the semiconductor chip.
    Type: Application
    Filed: January 23, 2009
    Publication date: August 27, 2009
    Inventors: Akira MUTO, Nobuya Koike, Katsuo Arai, Atsushi Fujiki
  • Patent number: 7555105
    Abstract: The memory cartridge which has identification data corresponding to its appearance is inserted to the mail exchange apparatus. The mail exchange apparatus displays a content of mail read from the inserted memory cartridge and an animal image corresponding to its identification data on the television monitor.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: June 30, 2009
    Assignee: SSD Company Limited
    Inventors: Hiromu Ueshima, Akira Muto
  • Publication number: 20080268577
    Abstract: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.
    Type: Application
    Filed: June 30, 2008
    Publication date: October 30, 2008
    Inventors: Hidemasa KAGII, Akira Muto, Ichio Shimizu, Katsuo Arai, Hiroshi Sato, Hiroyuki Nakamura, Masahiko Osaka, Takuya Nakajo, Keiichi Okawa, Hiroi Oka
  • Publication number: 20080253251
    Abstract: A position detection device, a position detection method, a position detection control device, a position detection control method, a position detection control program, an access authentication device, an access authentication method, an access authentication control device, an access authentication control method, an access authentication control program, an information storage device, and an optical disk are provided, all of which make it possible to prevent illegal copying of the information recorded in a recording medium. An information recording/playback device detects the position on an optical disk of an RFID tag provided to the optical disk, and writes the detected position on the optical disk of the RFID tag into the RFID tag as the position information.
    Type: Application
    Filed: February 21, 2006
    Publication date: October 16, 2008
    Inventors: Harumitsu Miyashita, Toyoji Gushima, Akira Muto, Masaru Yamaoka
  • Patent number: 7432594
    Abstract: A semiconductor device has a semiconductor chip including first and second surfaces opposed to each other in a thickness direction of the semiconductor chip, wherein the first and second surfaces include first and second electrode surfaces respectively, and first and second electrically conductive members covering the first and second electrode surfaces respectively as seen in the thickness direction to be electrically connected to the first and second electrode surfaces respectively.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: October 7, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kisho Ashida, Akira Muto, Ichio Shimizu, Toshiyuki Hata, Kenya Kawano, Naotaka Tanaka, Nae Hisano