Abstract: A technique for preventing cracks and residual resin on a semiconductor chip in a molding process in the assembly of semiconductor devices is provided. A distance from a bottom surface of a cavity of a lower mold die to a ceiling surface of a cavity of an upper mold die of a resin molding die is made same as or smaller than a distance from a lower surface of a die pad to an upper surface of a plate terminal, and an U-shape elastic body is arranged on semiconductor elements between the plate terminal and the die pad, thereby mitigating a load due to a clamp pressure of mold dies in the molding process by an elastic deformation of the elastic body. Consequently, a load applied on the semiconductor devices is reduced, thereby preventing formation of cracks on the semiconductor elements.

Abstract: A semiconductor device in the form of a resin sealed semiconductor package is disclosed, wherein a gate terminal connected to a gate pad electrode formed on a surface of a semiconductor chip and a source terminal connected to a source pad electrode formed on the chip surface exposed to a back surface of a sealing resin portion, a first portion of a drain terminal connected to a back-surface drain electrode of the semiconductor chip is exposed to an upper surface of the sealing resin portion, and a second portion of the drain terminal formed integrally with the first portion of the drain terminal is exposed to the back surface of the sealing resin portion.

Abstract: There is provided a balun transformer, in which first to fourth layer coils are stacked and coupled magnetically; one end of each coil of the first to fourth layer coils is grounded; the second and third layer coils are connected in parallel, an unbalanced signal is input/output to/from a common terminal of the second and third layer coils; a first balanced signal is input/output to/from the other end of the first layer coil; and a second balanced signal is input/output to/from the other end of the fourth layer coil.

Abstract: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.

Abstract: The present invention performs labeling that matches the information recorded on a recording medium. A recording/reproducing apparatus (10) is an apparatus that labels the content stored on a recording medium (20) on the recording medium (20), and includes a control unit (11) that acquires label information for labeling the content and a printing unit (12) that labels the label information on the recording medium (20).

Abstract: A semiconductor device in the form of a resin sealed semiconductor package is disclosed, wherein a gate terminal connected to a gate pad electrode formed on a surface of a semiconductor chip and a source terminal connected to a source pad electrode formed on the chip surface exposed to a back surface of a sealing resin portion, a first portion of a drain terminal connected to a back-surface drain electrode of the semiconductor chip is exposed to an upper surface of the sealing resin portion, and a second portion of the drain terminal formed integrally with the first portion of the drain terminal is exposed to the back surface of the sealing resin portion.

Abstract: A conventional video recorder has a problem that when dubbing a program recorded on a recording medium onto another recording medium, it cannot perform other processing (for example, a program being currently broadcasted cannot be recorded). It has another problem that it cannot accurately calculate an amount of time required for dubbing. Content management information is reproduced from a recording medium A (104) and inputted to a control unit (110) via a recording and reproducing processing unit A (103). An image generation unit (108) generates a menu screen using content information in the management information extracted by the control unit (110), and outputs the menu screen via a display processing unit (107). When the content to be dubbed by the user, the content dubbing destination, and the preset time to dub the content are entered to the control unit (110) via an operation unit (111), these entries are held in a schedule management unit (112).

Abstract: A semiconductor device is provided, which is capable of improving mounting flexibility relatively and increasing general versatility, as well as realizing heat radiation characteristics and low on-resistance. Moreover, the semiconductor device is provided, which is capable of improving reliability, performing processing in manufacturing processes easily and reducing manufacturing costs. Also, the semiconductor device capable of decreasing the mounting area is provided. A semiconductor chip in which an IGBT is formed and a semiconductor chip in which a diode is formed are mounted over a die pad. Then, the semiconductor chip and the semiconductor chip are connected by using a clip. The clip is arranged so as not to overlap with bonding pads formed at the semiconductor chip in a flat state. The bonding pads formed at the semiconductor chip are connected to electrodes by using wires.

Abstract: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals 6G, 6S via connection materials 5b, 5c. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals 6G, 6S being exposed. Mounting surfaces of the metal plate terminals 6G, 6S and a third part of the metal cap are bonded to electrodes on a mounting board 10 via connection materials 5e, 5f and 5g.

Abstract: In a semiconductor device having a package structure in which lead terminals connected to electrodes on both of the upper and lower surfaces of a semiconductor chip are exposed from both of the upper and lower surfaces and side surfaces of a sealing body formed of resin, electrodes of the semiconductor chip and the lead terminals are connected by Pb-free connection parts each having a configuration of connection layer/stress buffer layer/connection layer. In each connection part, the connection layer is formed of an inter-metallic compound layer having a melting point of 260° C. or higher or Pb-free solder having a melting point of 260° C. or higher, and the stress buffer layer is formed of a metal layer having a melting point of 260° C. or higher and having a function to buffer the thermal stress.

Abstract: One pair of resonant electrodes is formed in a loop shape or a spiral shape in a substrate stacking direction symmetrically to each other. This allows a longitudinal space in substrate to be reduced. A first capacitor having an electrode connected to the grounding conductor layer, an electrode connected to an open-end side of the resonant electrode, and a dielectric layer is provided. A second capacitor having an electrode connected to the grounding conductor layer, an electrode connected to an open-end side of the resonant electrode, and a dielectric layer is also provided. This results in having a desired characteristic even if a length of the resonant electrode is short.

Abstract: This invention is a method for manufacturing a high-frequency module device. A high-frequency circuit unit (2) in which first to third unit wiring layers (5) to (7), each having a capacitor (12) or the like at a part, are stacked and formed on flattened one surface of a dummy board (30) so that a third pattern wiring is exposed from a connection surface (2a) of an uppermost layer is mounted on a mounting surface (3a) of a base board (3) where an input/output terminal part (18) is exposed, in such a manner that the third pattern wiring and the input/output terminal part are connected with each other, and after that, the dummy board is removed. A high-frequency module device is thus manufactured.

Abstract: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals. In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.

Abstract: A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.

Abstract: This invention is a method for manufacturing a high-frequency module device. A high-frequency circuit unit (2) in which first to third unit wiring layers (5) to (7), each having a capacitor (12) or the like at a part, are stacked and formed on flattened one surface of a dummy board (30) so that a third pattern wiring is exposed from a connection surface (2a) of an uppermost layer is mounted on a mounting surface (3a) of a base board (3) where an input/output terminal part (18) is exposed, in such a manner that the third pattern wiring and the input/output terminal part are connected with each other, and after that, the dummy board is removed. A high-frequency module device is thus manufactured.

Abstract: A semiconductor device in the form of a resin sealed semiconductor package is disclosed, wherein a gate terminal connected to a gate pad electrode formed on a surface of a semiconductor chip and a source terminal connected to a source pad electrode formed on the chip surface exposed to a back surface of a sealing resin portion, a first portion of a drain terminal connected to a back-surface drain electrode of the semiconductor chip is exposed to an upper surface of the sealing resin portion, and a second portion of the drain terminal formed integrally with the first portion of the drain terminal is exposed to the back surface of the sealing resin portion.

Abstract: A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals In addition, the semiconductor chip is sealed by a resin sealing body with mounting-surfaces of the metal plate terminals being exposed. Mounting surfaces of the metal plate terminals and a third part of the metal cap are bonded to electrodes on a mounting board.

Abstract: In a semiconductor device having a package structure in which lead terminals connected to electrodes on both of the upper and lower surfaces of a semiconductor chip are exposed from both of the upper and lower surfaces and side surfaces of a sealing body formed of resin, electrodes of the semiconductor chip and the lead terminals are connected by Pb-free connection parts each having a configuration of connection layer/stress buffer layer/connection layer. In each connection part, the connection layer is formed of an inter-metallic compound layer having a melting point of 260° C. or higher or Pb-free solder having a melting point of 260° C. or higher, and the stress buffer layer is formed of a metal layer having a melting point of 260° C. or higher and having a function to buffer the thermal stress.

Abstract: A semiconductor device has a semiconductor chip including first and second surfaces opposed to each other in a thickness direction of the semiconductor chip, wherein the first and second surfaces include first and second electrode surfaces respectively, and first and second electrically conductive members covering the first and second electrode surfaces respectively as seen in the thickness direction to be electrically connected to the first and second electrode surfaces respectively.

Abstract: There is provided a semiconductor device with enhanced reliability having a heat sink mounting a plurality of semiconductor chips, a plurality of inner leads connected electrically to the semiconductor chips, a molding body for resin molding the plurality of semiconductor chips and the plurality of inner leads, a plurality of wires for providing electrical connections between the respective electrodes of the semiconductor chips and the inner leads corresponding thereto, and wide outer leads connecting to the inner leads and exposed outside the molding body. A plurality of slits are formed in the respective portions of the outer leads located outside the molding body to extend lengthwise in directions in which the outer leads are extracted. This achieves a reduction in lead stress which is placed on the outer leads by thermal stress or the like after the mounting of a MOSFET and thereby enhances the reliability of the MOSFET.