Patents by Inventor Akira Takashima
Akira Takashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230413554Abstract: According to one embodiment, a semiconductor device includes a stacked body of alternating conductor layers and insulator layers stacked in a first direction and a columnar body extending through the stacked body in the first direction. The columnar body includes a first insulating layer extending in the first direction and comprising aluminum and oxygen, a semiconductor layer between the first insulating layer and the conductor layers of the stacked body, a charge storage film between the semiconductor layer and the conductor layers, and a second insulating layer between the semiconductor layer and the first insulating layer and comprising silicon and oxygen. An interface between the semiconductor layer and the second insulating layer contains nitrogen to eliminate defects which may reduce channel mobility or the like.Type: ApplicationFiled: March 1, 2023Publication date: December 21, 2023Inventors: Yusuke NAKAJIMA, Akira TAKASHIMA, Tsunehiro INO, Atsushi MURAKOSHI, Masaki NOGUCHI
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Patent number: 11769838Abstract: A semiconductor device includes a semiconductor layer, a charge storage layer disposed on the surface of the semiconductor layer via a first insulating film, and an electrode layer disposed on the surface of the charge storage layer via a second insulating film. The charge storage layer includes a first layer containing elemental aluminum and elemental nitrogen, a second layer containing elemental silicon and elemental nitrogen, and a third layer containing elemental oxygen.Type: GrantFiled: April 28, 2022Date of Patent: September 26, 2023Assignee: KIOXIA CORPORATIONInventors: Masaki Noguchi, Akira Takashima, Tatsunori Isogai
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Publication number: 20230301089Abstract: A method for manufacturing an oxide film according to an embodiment includes forming a first film containing aluminum (Al) and nitrogen (N), and forming a second film containing aluminum (Al) and oxygen (O) by oxidizing the first film in an atmosphere containing heavy water (D2O).Type: ApplicationFiled: August 11, 2022Publication date: September 21, 2023Applicant: Kioxia CorporationInventors: Tsunehiro INO, Yusuke NAKAJIMA, Akira TAKASHIMA
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Patent number: 11735673Abstract: In one embodiment, a semiconductor device includes a stacked film including electrode layers and insulating layers that are alternately stacked in a first direction. The device further includes a first insulator, a charge storage layer, a second insulator and a semiconductor layer that are provided in the stacked film. The device further includes a third insulator provided between an electrode layer and an insulating layer and between the electrode layer and the first insulator, and including aluminum oxide having an ? crystal phase.Type: GrantFiled: September 14, 2020Date of Patent: August 22, 2023Assignee: Kioxia CorporationInventors: Masaki Noguchi, Akira Takashima
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Publication number: 20230187203Abstract: A semiconductor device manufacturing method of embodiments includes: forming an aluminum nitride film; forming an aluminum hydroxide film containing diaspore-type aluminum hydroxide by performing treatment in a fluid containing water to the aluminum nitride film; and forming an aluminum oxide film containing ?-type aluminum oxide by performing heat treatment to the aluminum hydroxide film at a temperature equal to or more than 500° C. and equal to or less than 800° C.Type: ApplicationFiled: June 10, 2022Publication date: June 15, 2023Applicant: Kioxia CorporationInventors: Tsunehiro Ino, Akira Takashima
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SEMICONDUCTOR DEVICE, SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Publication number: 20230086074Abstract: A semiconductor device of an embodiment includes a semiconductor layer, a gate electrode layer, and a first insulating layer provided between the semiconductor layer and the gate electrode layer, the first insulating layer including aluminum oxide including at least one crystal phase selected from the group consisting of alpha (?)-aluminum oxide and theta (?)-aluminum oxide, the first insulating layer having a thickness of equal to or less than 2.5 nm in a first direction from the semiconductor layer toward the gate electrode layer.Type: ApplicationFiled: March 14, 2022Publication date: March 23, 2023Applicant: Kioxia CorporationInventors: Yusuke NAKAJIMA, Akira TAKASHIMA, Tsunehiro INO, Yasushi NAKASAKI, Koji USUDA, Masaki NOGUCHI -
Publication number: 20230085754Abstract: A memory device according to an embodiment includes a semiconductor layer, a gate electrode layer, and a first dielectric layer provided between the semiconductor layer and the gate electrode layer. The first dielectric layer contains aluminum (Al), a first element, nitrogen (N), and silicon (Si). The first element is at least one element selected from the group consisting of scandium (Sc), yttrium (Y), lanthanoid (Ln), boron (B), gallium (Ga), and indium (In).Type: ApplicationFiled: February 24, 2022Publication date: March 23, 2023Applicant: Kioxia CorporationInventors: Tsunehiro INO, Akira TAKASHIMA
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Publication number: 20220406809Abstract: A semiconductor memory device according to an embodiment includes: a semiconductor layer extending in a first direction; a first gate electrode layer; a charge storage layer between the semiconductor layer and the first gate electrode layer, the charge storage layer containing a first element, a second element, and oxygen, the first element being at least one element selected from the group consisting of hafnium and zirconium, and the second element being at least one element selected from the group consisting of nitrogen and aluminum; a first insulating layer between the charge storage layer and the first gate electrode layer; and a second insulating layer between the semiconductor layer and the first gate electrode layer, the second insulating layer containing silicon and nitrogen, the second insulating layer surrounding the charge storage layer in a cross section that being parallel to the first direction and including the charge storage layer.Type: ApplicationFiled: December 20, 2021Publication date: December 22, 2022Applicant: Kioxia CorporationInventors: Akira TAKASHIMA, Tsunehiro INO
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Publication number: 20220254935Abstract: A semiconductor device includes a semiconductor layer, a charge storage layer disposed on the surface of the semiconductor layer via a first insulating film, and an electrode layer disposed on the surface of the charge storage layer via a second insulating film. The charge storage layer includes a first layer containing elemental aluminum and elemental nitrogen, a second layer containing elemental silicon and elemental nitrogen, and a third layer containing elemental oxygen.Type: ApplicationFiled: April 28, 2022Publication date: August 11, 2022Applicant: Kioxia CorporationInventors: Masaki NOGUCHI, Akira TAKASHIMA, Tatsunori ISOGAI
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Patent number: 11355511Abstract: A semiconductor memory device of an embodiment includes: a semiconductor layer; a gate electrode layer; a first insulating layer provided between the semiconductor layer and the gate electrode layer; a second insulating layer provided between the first insulating layer and the gate electrode layer; and an intermediate layer provided between the first insulating layer and the second insulating layer, the intermediate layer containing a first crystal of a space group Pbca (space group number 61), a space group P42/nmc (space group number 137), or a space group R-3m (space group number 166), and the intermediate layer containing hafnium (Hf), oxygen (O), and nitrogen (N).Type: GrantFiled: August 24, 2020Date of Patent: June 7, 2022Assignee: Kioxia CorporationInventors: Tsunehiro Ino, Akira Takashima, Reika Tanaka
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Patent number: 11342468Abstract: A semiconductor device includes a semiconductor layer, a charge storage layer disposed on the surface of the semiconductor layer via a first insulating film, and an electrode layer disposed on the surface of the charge storage layer via a second insulating film. The charge storage layer includes a first layer containing elemental aluminum and elemental nitrogen, a second layer containing elemental silicon and elemental nitrogen, and a third layer containing elemental oxygen.Type: GrantFiled: August 26, 2019Date of Patent: May 24, 2022Assignee: KIOXIA CORPORATIONInventors: Masaki Noguchi, Akira Takashima, Tatsunori Isogai
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Publication number: 20220093634Abstract: According to one embodiment, a semiconductor memory device includes a stacked structure including conductive layers arranged in a first direction, and a columnar structure extending in the first direction in the first stacked structure. The columnar structure includes a semiconductor layer extending in the first direction, a charge storage layer between the semiconductor layer and the stacked structure, a first insulating layer between the semiconductor layer and the charge storage layer, and a second insulating layer between the stacked structure and the charge storage layer. The charge storage layer is aluminum nitride with a wurtzite crystal structure in which the c-axis is oriented in a direction towards the first insulating layer from the second insulating layer.Type: ApplicationFiled: March 1, 2021Publication date: March 24, 2022Inventors: Akira TAKASHIMA, Tsunehiro INO, Yasushi NAKASAKI, Yoshihiko MORIYAMA
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Patent number: 11282850Abstract: A semiconductor memory device includes: a first and a second electrodes aligned in a first direction; a first semiconductor layer provided between the first and the second electrodes; a second semiconductor layer provided between the first semiconductor layer and the second electrode; a first charge accumulating layer provided between the first electrode and the first semiconductor layer; and a second charge accumulating layer provided between the second electrode and the second semiconductor layer. At least one of the first and the second charge accumulating layers include: a first and a second regions including nitrogen, aluminum, and oxygen and having different positions in a second direction; and a third region provided between the first and the second regions in the second direction. Oxygen is not included in the third region or a concentration of oxygen in the third region is lower than that in the first and the second regions.Type: GrantFiled: September 9, 2019Date of Patent: March 22, 2022Assignee: KIOXIA CORPORATIONInventors: Akira Takashima, Tsunehiro Ino, Ayaka Suko
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Publication number: 20210335816Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor layer, a first electrode, first to third layers, and nitride portions of nitride molecules. The first layer is provided between the semiconductor layer and the first electrode. The second layer is provided between the first layer and the first electrode. The second energy of a conduction band edge of the second layer is lower than a first energy of a conduction band edge of the first layer. The second layer includes a first region and a second region. The first region is provided between the first layer and the second region. The third layer is provided between the second layer and the first electrode. The third energy of a conduction band edge of the third layer is higher than the second energy.Type: ApplicationFiled: July 2, 2021Publication date: October 28, 2021Applicant: Toshiba Memory CorporationInventors: Akira TAKASHIMA, Kenichiro TORATAI, Masayuki TANAKA
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Publication number: 20210296326Abstract: A semiconductor memory device of an embodiment includes: a semiconductor layer; a gate electrode layer; a first insulating layer provided between the semiconductor layer and the gate electrode layer; a second insulating layer provided between the first insulating layer and the gate electrode layer; and an intermediate layer provided between the first insulating layer and the second insulating layer, the intermediate layer containing a first crystal of a space group Pbca (space group number 61), a space group P42/nmc (space group number 137), or a space group R-3m (space group number 166), and the intermediate layer containing hafnium (Hf), oxygen (O), and nitrogen (N).Type: ApplicationFiled: August 24, 2020Publication date: September 23, 2021Applicant: Kioxia CorporationInventors: Tsunehiro INO, Akira TAKASHIMA, Reika TANAKA
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Publication number: 20210257500Abstract: In one embodiment, a semiconductor device includes a stacked film including electrode layers and insulating layers that are alternately stacked in a first direction. The device further includes a first insulator, a charge storage layer, a second insulator and a semiconductor layer that are provided in the stacked film. The device further includes a third insulator provided between an electrode layer and an insulating layer and between the electrode layer and the first insulator, and including aluminum oxide having an ? crystal phase.Type: ApplicationFiled: September 14, 2020Publication date: August 19, 2021Applicant: Kioxia CorporationInventors: Masaki NOGUCHI, Akira TAKASHIMA
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Patent number: 10907988Abstract: The invention provides a rotation sensor enabling simplification of manufacturing process, such as an inspection step, while maintaining measurement accuracy of the rotation sensor. Lead frames of a rotation sensor have positioning sections which contact a side surface section of a case and, in this state of contact, keep the insertion depth dimension of a magnetism detection unit in the internal space of the case to a prescribed dimension; a flange lower flat surface of a flange section is provided further towards the case bottom surface side than a flange lower flat surface of a ring-shaped rib, a portion of the outer peripheral section of the case and the ring-shaped rib are exposed in a ring shape from an exterior molding section, and the case is provided with a plurality of projections along the inner side surface of the case which constitutes the internal space.Type: GrantFiled: September 29, 2016Date of Patent: February 2, 2021Assignee: Mitsubishi Electric CornorationInventors: Tomoki Kuwamura, Akira Takashima, Hiroshi Fujita, Hideki Shimauchi, Akira Koshimizu
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Patent number: 10833098Abstract: According to one embodiment, a semiconductor memory device includes a first conductive member, a first semiconductor member, and a first stacked member provided between the first conductive member and the first semiconductor member. The first stacked member includes a first insulating film, a second insulating film provided between the first insulating film and the first semiconductor member, first and second layers. The first layer includes aluminum and nitrogen and is provided between the first and second insulating films. A first thickness of the first layer along a first direction is 3 nm or less. The first direction is from the first semiconductor member toward the first conductive member. The second layer contacts the first layer, includes silicon and nitrogen, and is provided at one of a position between the first layer and the second insulating film or a position between the first layer and the first insulating film.Type: GrantFiled: March 12, 2019Date of Patent: November 10, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Akira Takashima, Tsunehiro Ino, Yuuichi Kamimuta, Ayaka Suko
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Publication number: 20200303382Abstract: A semiconductor memory device includes: a first and a second electrodes aligned in a first direction; a first semiconductor layer provided between the first and the second electrodes; a second semiconductor layer provided between the first semiconductor layer and the second electrode; a first charge accumulating layer provided between the first electrode and the first semiconductor layer; and a second charge accumulating layer provided between the second electrode and the second semiconductor layer. At least one of the first and the second charge accumulating layers include: a first and a second regions including nitrogen, aluminum, and oxygen and having different positions in a second direction; and a third region provided between the first and the second regions in the second direction. Oxygen is not included in the third region or a concentration of oxygen in the third region is lower than that in the first and the second regions.Type: ApplicationFiled: September 9, 2019Publication date: September 24, 2020Applicant: Toshiba Memory CorporationInventors: Akira TAKASHIMA, Tsunehiro INO, Ayaka SUKO
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Publication number: 20200279957Abstract: A semiconductor device includes a semiconductor layer, a charge storage layer disposed on the surface of the semiconductor layer via a first insulating film, and an electrode layer disposed on the surface of the charge storage layer via a second insulating film. The charge storage layer includes a first layer containing elemental aluminum and elemental nitrogen, a second layer containing elemental silicon and elemental nitrogen, and a third layer containing elemental oxygen.Type: ApplicationFiled: August 26, 2019Publication date: September 3, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Masaki NOGUCHI, Akira TAKASHIMA, Tatsunori ISOGAI