Patents by Inventor Akira Takashima

Akira Takashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6972487
    Abstract: The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor Substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second Semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: December 6, 2005
    Assignee: Fujitsu Limited
    Inventors: Yoshiharu Kato, Satoru Kawamoto, Fumihiko Taniguchi, Tetsuya Hiraoka, Akira Takashima
  • Patent number: 6960827
    Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: November 1, 2005
    Assignee: Fujitsu Limited
    Inventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
  • Patent number: 6952961
    Abstract: An air flow rate measuring device serves to measure a flow rate of air flowing through a main passage inside an intake pipe of an engine. A base has its one end directed axially of the main passage toward an upstream side of air flowing therein, and its other end directed toward a downstream side thereof, with a bent groove being formed in the base. A circuit module includes a support substrate and a detection element installed one surface of the support substrate for detecting the flow rate of air, the module being joined to the base in a face-to-face relation with respect to each other to form an auxiliary passage in cooperation with the groove. The detection element on the one surface of the support substrate is exposed to air in the auxiliary passage, and the other surface of the support substrate is exposed to air in the main passage.
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: October 11, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masahiro Kawai, Fumiyoshi Yonezawa, Akira Takashima, Hiroyuki Uramachi
  • Patent number: 6937010
    Abstract: A magnetic detector capable of being easily assembled and diminishing fluctuation in magnetic detection accuracy includes: magnetic resistance elements whose resistance value changes according to change in magnetic field generated by rotation of a multi-polarized rotor; an IC formed by integrating a signal processing circuit section that outputs a signal corresponding to multi-polarization of the rotor based on change in resistance values of the magnetic resistance elements; a lead frame mounted with the IC and connected to an external output terminal for externally outputting an output signal from the signal processing circuit section; a magnet applying a bias magnetic field to the magnetic resistance elements; and a magnetic guide for correcting lines of magnetic force from the magnet. The IC, lead frame and magnetic guide are preliminarily assembled to serve as a first assembly, and the magnet and external output terminal are preliminarily assembled to serve as a second assembly.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: August 30, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Takashima, Masahiro Yokotani, Izuru Shinjo
  • Publication number: 20050167812
    Abstract: A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.
    Type: Application
    Filed: February 23, 2005
    Publication date: August 4, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Eiji Yoshida, Takao Ohno, Yoshito Akutagawa, Koji Sawahata, Masataka Mizukoshi, Takao Nishimura, Akira Takashima, Mitsuhisa Watanabe
  • Patent number: 6923965
    Abstract: The present invention provides peptides with a specific affinity for glycosaminoglycan molecules. These peptides may have any number of functions, including but not limited to use as inhibitors of glycosaminoglycan-mediated processes, enhancers of glycosaminoglycan-mediated processes, and as molecular probes to identify the presence of a specific glycosaminoglycan. Peptides of the invention may be directed against any glycosaminoglycan, including hyaluronic acid, chondroitin sulfate A, chondroitin sulfate C, dermatan sulfate, heparin, keratan sulfate, keratosulfate, chitin, chitosan 1, and chitosan 2. These isolated peptides may have therapeutic uses in the treatment or prevention of diseases involving infection, inflammatory diseases, cancer, infections, etc. The peptides may also have other biological functions such as contraception.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: August 2, 2005
    Assignee: The University of Texas System
    Inventors: Akira Takashima, Mark E. Mummert, Mansour Mohamadzadeh
  • Publication number: 20050161794
    Abstract: The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.
    Type: Application
    Filed: March 16, 2005
    Publication date: July 28, 2005
    Applicant: Fujitsu Limited
    Inventors: Yoshiharu Kato, Satoru Kawamoto, Fumihiko Taniguchi, Tetsuya Hiraoka, Akira Takashima
  • Publication number: 20050159343
    Abstract: The present invention provides peptide derivatives with a specific affinity for glycosaminoglycan molecules. These peptide derivatives include multimers as well as chemically modified peptides and may be prepared by a variety of methods. The peptides of the invention have numerous functions, including but not limited to use as inhibitors of glycosaminoglycan-mediated signaling events and targeting agents. Peptides of the invention may be directed against any glycosaminoglycan, including hyaluronic acid, chondroitin sulfate A, chondroitin sulfate C, dermatan sulfate, heparin, keratan sulfate, keratosulfate, chitin, chitosan 1, and chitosan 2. The peptide derivatives of the invention also have therapeutic uses in the treatment and prevention of diseases involving inflammatory diseases, cancer, and cancer metastasis, autoimmune diseases, etc.
    Type: Application
    Filed: December 13, 2004
    Publication date: July 21, 2005
    Inventors: Akira Takashima, Mark Mummert
  • Publication number: 20050150290
    Abstract: An air flow rate measuring device serves to measure a flow rate of air flowing through a main passage inside an intake pipe of an engine. A base has its one end directed axially of the main passage toward an upstream side of air flowing therein, and its other end directed toward a downstream side thereof, with a bent groove being formed in the base. A circuit module includes a support substrate and a detection element installed one surface of the support substrate for detecting the flow rate of air, the module being joined to the base in a face-to-face relation with respect to each other to form an auxiliary passage in cooperation with the groove. The detection element on the one surface of the support substrate is exposed to air in the auxiliary passage, and the other surface of the support substrate is exposed to air in the main passage.
    Type: Application
    Filed: April 9, 2004
    Publication date: July 14, 2005
    Inventors: Masahiro Kawai, Fumiyoshi Yonezawa, Akira Takashima, Hiroyuki Uramachi
  • Publication number: 20050082684
    Abstract: A semiconductor chip is secured in a state deformed into a substantially cylinder shape by a coating material formed on its surface. The deformed semiconductor chip is flip-chip connected to an interposer and sealed with sealing resin onto the interposer. Solder balls are provided, as external terminals, on the other side of the interposer.
    Type: Application
    Filed: December 8, 2004
    Publication date: April 21, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Kazuyuki Aiba, Akira Takashima, Kaname Ozawa, Tetsuya Hiraoka, Takaaki Suzuki, Yasurou Matsuzaki
  • Patent number: 6869819
    Abstract: A high-contrast image recognition can be performed by recognizing an image of a recognition mark from a back surface of a wafer by a visible-light camera by irradiating a visible light from a circuit pattern surface of a silicon substrate. A thickness of the silicon substrate is set to 5 ?m to 50 ?m. A white or visible light having a wavelength equal to or less than 800 nm is irradiated onto the circuit-pattern forming surface of the substrate. A visible light that has transmitted through the silicon substrate is received by a visible-light camera on a side of a back surface of the silicon substrate. An image of a recognition mark formed on the circuit-pattern forming surface of the silicon substrate is recognized by the visible-light camera.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: March 22, 2005
    Assignee: Fujitsu Limited
    Inventors: Mitsuhisa Watanabe, Yoshikazu Kumagaya, Akira Takashima
  • Patent number: 6852696
    Abstract: The present invention provides peptide derivatives with a specific affinity for glycosaminoglycan molecules. These peptide derivatives include multimers as well as chemically modified peptides and may be prepared by a variety of methods. The peptides of the invention have numerous functions, including but not limited to use as inhibitors of glycosaminoglycan-mediated signaling events and targeting agents. Peptides of the invention may be directed against any glycosaminoglycan, including hyaluronic acid, chondroitin sulfate A, chondroitin sulfate C, dermatan sulfate, heparin, keratan sulfate, keratosulfate, chitin, chitosan 1, and chitosan 2. The peptide derivatives of the invention also have therapeutic uses in the treatment and prevention of diseases involving inflammatory diseases, cancer, and cancer metastasis, autoimmune diseases, etc.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: February 8, 2005
    Assignee: The University of Texas System
    Inventors: Akira Takashima, Mark E. Mummert
  • Patent number: 6812066
    Abstract: A semiconductor device comprises: a semiconductor element; an external terminal used for an external connection; an interposer having the semiconductor element mounted on a first surface thereof and having the external terminal formed on a second surface thereof opposite to the first surface so as to electrically connect the semiconductor element and the external terminal; a resin sealing the semiconductor element on the first surface; and an interconnecting portion formed within the resin, the interconnecting portion having a first connecting part electrically connected to the external terminal and having a second connecting part exposed on an outer surface of the resin.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: November 2, 2004
    Assignee: Fujitsu Limited
    Inventors: Fumihiko Taniguchi, Akira Takashima
  • Publication number: 20040188855
    Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.
    Type: Application
    Filed: April 6, 2004
    Publication date: September 30, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
  • Publication number: 20040178508
    Abstract: A stacked semiconductor device is disclosed that has a three-dimensional structure using general-purpose semiconductor device units (semiconductor devices) that are stacked with an interposer substrate being provided between an upper device unit and a lower device unit. The upper device unit includes a semiconductor device, a first wiring substrate, and an external connection terminal. The lower device unit includes a semiconductor device, a second wiring substrate, and a connection electrode that is prepared on the upper surface of the second wiring substrate. The interposer substrate includes a circuit board, a first conductive material connecting to the connection electrode, a second conductive material formed in a form position of the external connection terminal that is electrically connected to the second conductive material, and a third conductive material for electrically connecting the first conductive material and the second conductive material.
    Type: Application
    Filed: January 26, 2004
    Publication date: September 16, 2004
    Applicant: Fujitsu Limited
    Inventors: Takao Nishimura, Kazuyuki Aiba, Akira Takashima
  • Patent number: 6781241
    Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: August 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
  • Patent number: 6777799
    Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: August 17, 2004
    Assignee: Fujitsu Limited
    Inventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Takao Nishimura
  • Publication number: 20040155353
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Application
    Filed: February 6, 2004
    Publication date: August 12, 2004
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Publication number: 20040138105
    Abstract: The present invention provides peptides with a specific affinity for glycosaminoglycan molecules. These peptides may have any number of functions, including but not limited to use as inhibitors of glycosaminoglycan-mediated processes, enhancers of glycosaminoglycan-mediated processes, and as molecular probes to identify the presence of a specific glycosaminoglycan. Peptides of the invention may be directed against any glycosaminoglycan, including hyaluronic acid, chondroitin sulfate A, chondroitin sulfate C, dermatan sulfate, heparin, keratan sulfate, keratosulfate, chitin, chitosan 1, and chitosan 2. These isolated peptides may have therapeutic uses in the treatment or prevention of diseases involving infection, inflammatory diseases, cancer, infections, etc. The peptides may also have other biological functions such as contraception.
    Type: Application
    Filed: October 6, 2003
    Publication date: July 15, 2004
    Inventors: Akira Takashima, Mark E. Mummert, Mansour Mohamadzadeh
  • Patent number: 6740970
    Abstract: A semiconductor device is configured of a first semiconductor chip mounted on a substrate, a plate member arranged on the first semiconductor chip, and a second semiconductor chip arranged on the plate member. Bonding wires electrically connect the pads of the first semiconductor chip and the pads of the second semiconductor chip to the pads of the substrate, and a sealing resin seals the first semiconductor chip and the second semiconductor chip. A first portion of the plate member is displaced away from the ends of the first and second semiconductor chips, and a second portion of the plate member extending perpendicular to the first portion, projects outward from the first and second semiconductor chips to be exposed to the outside.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: May 25, 2004
    Assignee: Fujitsu Limited
    Inventors: Tetsuya Hiraoka, Akira Takashima